SYSMEMREMAP

USBPLLCTRL

PIOPORCAP0

PIOPORCAP1

USBPLLSTAT

BODCTRL

SYSTCKCAL

IRQLATENCY

NMISRC

PINTSEL0

PINTSEL1

PINTSEL2

PINTSEL3

PINTSEL4

PINTSEL5

PINTSEL6

PINTSEL7

USBCLKCTRL

USBCLKST

SYSOSCCTRL

STARTERP0

STARTERP1

PDSLEEPCFG

PDAWAKECFG

PDRUNCFG

WDTOSCCTRL

SYSRSTSTAT

DEVICE_ID

PRESETCTRL

SYSPLLCLKSEL

SYSPLLCLKUEN

USBPLLCLKSEL

USBPLLCLKUEN

MAINCLKSEL

MAINCLKUEN

SYSAHBCLKDIV

SYSPLLCTRL

SYSAHBCLKCTRL

SSP0CLKDIV

UARTCLKDIV

SSP1CLKDIV

SYSPLLSTAT

USBCLKSEL

USBCLKUEN

USBCLKDIV

CLKOUTSEL

CLKOUTUEN

CLKOUTDIV

MAP : System memory remap. Value 0x3 is reserved.
bits : 0 - 1 (2 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 2 - 33 (32 bit)

MSEL : Feedback divider value. The division value M is the programmed MSEL value + 1. 00000: Division ratio M = 1 to 11111: Division ratio M = 32
bits : 0 - 4 (5 bit)

PSEL : Post divider ratio P. The division ratio is 2 x P.
bits : 5 - 11 (7 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved. Do not write ones to reserved bits.
bits : 7 - 38 (32 bit)

PIOSTAT : State of PIO0_23 through PIO0_0 at power-on reset
bits : 0 - 23 (24 bit)

RESERVED : Reserved.
bits : 24 - 55 (32 bit)

PIOSTAT : State of PIO1_31 through PIO1_0 at power-on reset
bits : 0 - 31 (32 bit)

LOCK : PLL lock status
bits : 0 - 0 (1 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 1 - 32 (32 bit)

BODRSTLEV : BOD reset level
bits : 0 - 1 (2 bit)

Enumeration: ENUM

End of enumeration elements list.

BODINTVAL : BOD interrupt level
bits : 2 - 5 (4 bit)

Enumeration: ENUM

End of enumeration elements list.

BODRSTENA : BOD reset enable
bits : 4 - 8 (5 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 5 - 36 (32 bit)

CAL : System tick timer calibration value
bits : 0 - 25 (26 bit)

RESERVED : Reserved
bits : 26 - 57 (32 bit)

LATENCY : 8-bit latency value
bits : 0 - 7 (8 bit)

RESERVED : Reserved
bits : 8 - 39 (32 bit)

IRQNO : The IRQ number of the interrupt that acts as the Non-Maskable Interrupt (NMI) if bit 31 is 1. See Table 58 for the list of interrupt sources and their IRQ numbers.
bits : 0 - 4 (5 bit)

RESERVED : Reserved
bits : 5 - 35 (31 bit)

NMIEN : Write a 1 to this bit to enable the Non-Maskable Interrupt (NMI) source selected by bits 4:0.
bits : 31 - 62 (32 bit)

INTPIN : Pin number select for pin interrupt. (PIO0_0 to PIO0_23 correspond to numbers 0 to 23 and PIO1_0 to PIO1_31 correspond to numbers 24 to 55).
bits : 0 - 5 (6 bit)

RESERVED : Reserved
bits : 6 - 37 (32 bit)

INTPIN : Pin number select for pin interrupt. (PIO0_0 to PIO0_23 correspond to numbers 0 to 23 and PIO1_0 to PIO1_31 correspond to numbers 24 to 55).
bits : 0 - 5 (6 bit)

RESERVED : Reserved
bits : 6 - 37 (32 bit)

INTPIN : Pin number select for pin interrupt. (PIO0_0 to PIO0_23 correspond to numbers 0 to 23 and PIO1_0 to PIO1_31 correspond to numbers 24 to 55).
bits : 0 - 5 (6 bit)

RESERVED : Reserved
bits : 6 - 37 (32 bit)

INTPIN : Pin number select for pin interrupt. (PIO0_0 to PIO0_23 correspond to numbers 0 to 23 and PIO1_0 to PIO1_31 correspond to numbers 24 to 55).
bits : 0 - 5 (6 bit)

RESERVED : Reserved
bits : 6 - 37 (32 bit)

INTPIN : Pin number select for pin interrupt. (PIO0_0 to PIO0_23 correspond to numbers 0 to 23 and PIO1_0 to PIO1_31 correspond to numbers 24 to 55).
bits : 0 - 5 (6 bit)

RESERVED : Reserved
bits : 6 - 37 (32 bit)

INTPIN : Pin number select for pin interrupt. (PIO0_0 to PIO0_23 correspond to numbers 0 to 23 and PIO1_0 to PIO1_31 correspond to numbers 24 to 55).
bits : 0 - 5 (6 bit)

RESERVED : Reserved
bits : 6 - 37 (32 bit)

INTPIN : Pin number select for pin interrupt. (PIO0_0 to PIO0_23 correspond to numbers 0 to 23 and PIO1_0 to PIO1_31 correspond to numbers 24 to 55).
bits : 0 - 5 (6 bit)

RESERVED : Reserved
bits : 6 - 37 (32 bit)

INTPIN : Pin number select for pin interrupt. (PIO0_0 to PIO0_23 correspond to numbers 0 to 23 and PIO1_0 to PIO1_31 correspond to numbers 24 to 55).
bits : 0 - 5 (6 bit)

RESERVED : Reserved
bits : 6 - 37 (32 bit)

AP_CLK : USB need_clock signal control
bits : 0 - 0 (1 bit)

Enumeration: ENUM

End of enumeration elements list.

POL_CLK : USB need_clock polarity for triggering the USB wake-up interrupt
bits : 1 - 2 (2 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 2 - 33 (32 bit)

NEED_CLKST : USB need_clock signal status
bits : 0 - 0 (1 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 1 - 32 (32 bit)

BYPASS : Bypass system oscillator
bits : 0 - 0 (1 bit)

Enumeration: ENUM

End of enumeration elements list.

FREQRANGE : Determines frequency range for Low-power oscillator.
bits : 1 - 2 (2 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 2 - 33 (32 bit)

PINT0 : Pin interrupt 0 wake-up
bits : 0 - 0 (1 bit)

Enumeration: ENUM

End of enumeration elements list.

PINT1 : Pin interrupt 1 wake-up
bits : 1 - 2 (2 bit)

Enumeration: ENUM

End of enumeration elements list.

PINT2 : Pin interrupt 2 wake-up
bits : 2 - 4 (3 bit)

Enumeration: ENUM

End of enumeration elements list.

PINT3 : Pin interrupt 3 wake-up
bits : 3 - 6 (4 bit)

Enumeration: ENUM

End of enumeration elements list.

PINT4 : Pin interrupt 4 wake-up
bits : 4 - 8 (5 bit)

Enumeration: ENUM

End of enumeration elements list.

PINT5 : Pin interrupt 5 wake-up
bits : 5 - 10 (6 bit)

Enumeration: ENUM

End of enumeration elements list.

PINT6 : Pin interrupt 6 wake-up
bits : 6 - 12 (7 bit)

Enumeration: ENUM

End of enumeration elements list.

PINT7 : Pin interrupt 7 wake-up
bits : 7 - 14 (8 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 8 - 39 (32 bit)

WWDTINT : WWDT interrupt wake-up
bits : 12 - 24 (13 bit)

Enumeration: ENUM

End of enumeration elements list.

BODINT : Brown Out Detect (BOD) interrupt wake-up
bits : 13 - 26 (14 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 14 - 32 (19 bit)

USB_WAKEUP : USB need_clock signal wake-up
bits : 19 - 38 (20 bit)

Enumeration: ENUM

End of enumeration elements list.

GPIOINT0 : GPIO GROUP0 interrupt wake-up
bits : 20 - 40 (21 bit)

Enumeration: ENUM

End of enumeration elements list.

GPIOINT1 : GPIO GROUP1 interrupt wake-up
bits : 21 - 42 (22 bit)

Enumeration: ENUM

End of enumeration elements list.

BOD_PD : BOD power-down control for Deep-sleep and Power-down mode
bits : 3 - 6 (4 bit)

Enumeration: ENUM

End of enumeration elements list.

WDTOSC_PD : Watchdog oscillator power-down control for Deep-sleep and Power-down mode
bits : 6 - 12 (7 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 7 - 38 (32 bit)

IRCOUT_PD : IRC oscillator output wake-up configuration
bits : 0 - 0 (1 bit)

Enumeration: ENUM

End of enumeration elements list.

IRC_PD : IRC oscillator power-down wake-up configuration
bits : 1 - 2 (2 bit)

Enumeration: ENUM

End of enumeration elements list.

FLASH_PD : Flash wake-up configuration
bits : 2 - 4 (3 bit)

Enumeration: ENUM

End of enumeration elements list.

BOD_PD : BOD wake-up configuration
bits : 3 - 6 (4 bit)

Enumeration: ENUM

End of enumeration elements list.

ADC_PD : ADC wake-up configuration
bits : 4 - 8 (5 bit)

Enumeration: ENUM

End of enumeration elements list.

SYSOSC_PD : Crystal oscillator wake-up configuration
bits : 5 - 10 (6 bit)

Enumeration: ENUM

End of enumeration elements list.

WDTOSC_PD : Watchdog oscillator wake-up configuration
bits : 6 - 12 (7 bit)

Enumeration: ENUM

End of enumeration elements list.

SYSPLL_PD : System PLL wake-up configuration
bits : 7 - 14 (8 bit)

Enumeration: ENUM

End of enumeration elements list.

USBPLL_PD : USB PLL wake-up configuration
bits : 8 - 16 (9 bit)

Enumeration: ENUM

End of enumeration elements list.

USBPAD_PD : USB transceiver wake-up configuration
bits : 10 - 20 (11 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved. Always write this bit as 1.
bits : 11 - 22 (12 bit)

RESERVED : Reserved. Always write this bit as 0.
bits : 12 - 24 (13 bit)

RESERVED : Reserved. Always write these bits as 111.
bits : 13 - 28 (16 bit)

RESERVED : Reserved
bits : 16 - 47 (32 bit)

RESERVED : Reserved
bits : 16 - 47 (32 bit)

IRCOUT_PD : IRC oscillator output power-down
bits : 0 - 0 (1 bit)

Enumeration: ENUM

End of enumeration elements list.

IRC_PD : IRC oscillator power-down
bits : 1 - 2 (2 bit)

Enumeration: ENUM

End of enumeration elements list.

FLASH_PD : Flash power-down
bits : 2 - 4 (3 bit)

Enumeration: ENUM

End of enumeration elements list.

BOD_PD : BOD power-down
bits : 3 - 6 (4 bit)

Enumeration: ENUM

End of enumeration elements list.

ADC_PD : ADC power-down
bits : 4 - 8 (5 bit)

Enumeration: ENUM

End of enumeration elements list.

SYSOSC_PD : Crystal oscillator power-down
bits : 5 - 10 (6 bit)

Enumeration: ENUM

End of enumeration elements list.

WDTOSC_PD : Watchdog oscillator power-down
bits : 6 - 12 (7 bit)

Enumeration: ENUM

End of enumeration elements list.

SYSPLL_PD : System PLL power-down
bits : 7 - 14 (8 bit)

Enumeration: ENUM

End of enumeration elements list.

USBPLL_PD : USB PLL power-down
bits : 8 - 16 (9 bit)

Enumeration: ENUM

End of enumeration elements list.

USBPAD_PD : USB transceiver power-down configuration
bits : 10 - 20 (11 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved. Always write this bit as 1.
bits : 11 - 22 (12 bit)

RESERVED : Reserved. Always write this bit as 0.
bits : 12 - 24 (13 bit)

RESERVED : Reserved. Always write these bits as 111.
bits : 13 - 28 (16 bit)

RESERVED : Reserved
bits : 16 - 47 (32 bit)

RESERVED : Reserved
bits : 16 - 47 (32 bit)

DIVSEL : Select divider for Fclkana. wdt_osc_clk = Fclkana/ (2 x (1 + DIVSEL)) 00000: 2 x (1 + DIVSEL) = 2 00001: 2 x (1 + DIVSEL) = 4 to 11111: 2 x (1 + DIVSEL) = 64
bits : 0 - 4 (5 bit)

FREQSEL : Select watchdog oscillator analog output frequency (Fclkana).
bits : 5 - 13 (9 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 9 - 40 (32 bit)

POR : POR reset status
bits : 0 - 0 (1 bit)

Enumeration: ENUM

End of enumeration elements list.

EXTRST : External reset status
bits : 1 - 2 (2 bit)

Enumeration: ENUM

End of enumeration elements list.

WDT : Status of the Watchdog reset
bits : 2 - 4 (3 bit)

Enumeration: ENUM

End of enumeration elements list.

BOD : Status of the Brown-out detect reset
bits : 3 - 6 (4 bit)

Enumeration: ENUM

End of enumeration elements list.

SYSRST : Status of the software system reset
bits : 4 - 8 (5 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 5 - 36 (32 bit)

DEVICEID : Device ID numbers for LPC11Uxx parts LPC11U12FHN33/201 = 0x095C 802B/0x295C 802B LPC11U12FBD48/201 = 0x095C 802B/0x295C 802B LPC11U13FBD48/201 = 0x097A 802B/0x297A 802B LPC11U14FHN33/201 = 0x0998 802B/0x2998 802B LPC11U14FHI33/201 = 0x2998 802B LPC11U14FBD48/201 = 0x0998 802B/0x2998 802B LPC11U14FET48/201 = 0x0998 802B/0x2998 802B LPC11U23FBD48/301 = 0x2972 402B LPC11U24FHI33/301 = 0x2988 402B LPC11U24FBD48/301 = 0x2988 402B LPC11U24FET48/301 = 0x2988 402B LPC11U24FHN33/401 = 0x2980 002B LPC11U24FBD48/401 = 0x2980 002B LPC11U24FBD64/401 = 0x2980 002B
bits : 0 - 31 (32 bit)

SSP0_RST_N : SSP0 reset control
bits : 0 - 0 (1 bit)

Enumeration: ENUM

End of enumeration elements list.

I2C_RST_N : I2C reset control
bits : 1 - 2 (2 bit)

Enumeration: ENUM

End of enumeration elements list.

SSP1_RST_N : SSP1 reset control
bits : 2 - 4 (3 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 4 - 35 (32 bit)

RESERVED : Reserved
bits : 4 - 35 (32 bit)

SEL : System PLL clock source
bits : 0 - 1 (2 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 2 - 33 (32 bit)

ENA : Enable system PLL clock source update
bits : 0 - 0 (1 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 1 - 32 (32 bit)

SEL : USB PLL clock source
bits : 0 - 1 (2 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 2 - 33 (32 bit)

ENA : Enable USB PLL clock source update
bits : 0 - 0 (1 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 1 - 32 (32 bit)

SEL : Clock source for main clock
bits : 0 - 1 (2 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 2 - 33 (32 bit)

ENA : Enable main clock source update
bits : 0 - 0 (1 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 1 - 32 (32 bit)

DIV : System AHB clock divider values 0: System clock disabled. 1: Divide by 1. to 255: Divide by 255.
bits : 0 - 7 (8 bit)

RESERVED : Reserved
bits : 8 - 39 (32 bit)

MSEL : Feedback divider value. The division value M is the programmed MSEL value + 1. 00000: Division ratio M = 1 to 11111: Division ratio M = 32
bits : 0 - 4 (5 bit)

PSEL : Post divider ratio P. The division ratio is 2 x P.
bits : 5 - 11 (7 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved. Do not write ones to reserved bits.
bits : 7 - 38 (32 bit)

SYS : Enables the clock for the AHB, the APB bridge, the Cortex-M0 FCLK and HCLK, SysCon, and the PMU. This bit is read only and always reads as 1.
bits : 0 - 0 (1 bit)

Enumeration: ENUM

End of enumeration elements list.

ROM : Enables clock for ROM.
bits : 1 - 2 (2 bit)

Enumeration: ENUM

End of enumeration elements list.

RAM0 : Enables clock for RAM.
bits : 2 - 4 (3 bit)

Enumeration: ENUM

End of enumeration elements list.

FLASHREG : Enables clock for flash register interface.
bits : 3 - 6 (4 bit)

Enumeration: ENUM

End of enumeration elements list.

FLASHARRAY : Enables clock for flash array access.
bits : 4 - 8 (5 bit)

Enumeration: ENUM

End of enumeration elements list.

I2C : Enables clock for I2C.
bits : 5 - 10 (6 bit)

Enumeration: ENUM

End of enumeration elements list.

GPIO : Enables clock for GPIO port registers.
bits : 6 - 12 (7 bit)

Enumeration: ENUM

End of enumeration elements list.

CT16B0 : Enables clock for 16-bit counter/timer 0.
bits : 7 - 14 (8 bit)

Enumeration: ENUM

End of enumeration elements list.

CT16B1 : Enables clock for 16-bit counter/timer 1.
bits : 8 - 16 (9 bit)

Enumeration: ENUM

End of enumeration elements list.

CT32B0 : Enables clock for 32-bit counter/timer 0.
bits : 9 - 18 (10 bit)

Enumeration: ENUM

End of enumeration elements list.

CT32B1 : Enables clock for 32-bit counter/timer 1.
bits : 10 - 20 (11 bit)

Enumeration: ENUM

End of enumeration elements list.

SSP0 : Enables clock for SSP0.
bits : 11 - 22 (12 bit)

Enumeration: ENUM

End of enumeration elements list.

USART : Enables clock for UART.
bits : 12 - 24 (13 bit)

Enumeration: ENUM

End of enumeration elements list.

ADC : Enables clock for ADC.
bits : 13 - 26 (14 bit)

Enumeration: ENUM

End of enumeration elements list.

USB : Enables clock to the USB register interface.
bits : 14 - 28 (15 bit)

Enumeration: ENUM

End of enumeration elements list.

WWDT : Enables clock for WWDT.
bits : 15 - 30 (16 bit)

Enumeration: ENUM

End of enumeration elements list.

IOCON : Enables clock for I/O configuration block.
bits : 16 - 32 (17 bit)

Enumeration: ENUM

End of enumeration elements list.

SSP1 : Enables clock for SSP1.
bits : 18 - 36 (19 bit)

Enumeration: ENUM

End of enumeration elements list.

PINT : Enables clock to GPIO Pin interrupts register interface.
bits : 19 - 38 (20 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 20 - 42 (23 bit)

GROUP0INT : Enables clock to GPIO GROUP0 interrupt register interface.
bits : 23 - 46 (24 bit)

Enumeration: ENUM

End of enumeration elements list.

GROUP1INT : Enables clock to GPIO GROUP1 interrupt register interface.
bits : 24 - 48 (25 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 25 - 50 (26 bit)

RAM1 : Enables SRAM1 block at address 0x2000 0000. See Section 3.1 for availability of this bit.
bits : 26 - 52 (27 bit)

Enumeration: ENUM

End of enumeration elements list.

USBRAM : Enables USB SRAM block at address 0x2000 4000.
bits : 27 - 54 (28 bit)

Enumeration: ENUM

End of enumeration elements list.

RESERVED : Reserved
bits : 28 - 59 (32 bit)

RESERVED : Reserved
bits : 28 - 59 (32 bit)