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I2C

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xFFC byte (0x0)
mem_usage : registers
protection : not protected

Registers

CONTROL

CONFIG

SADDRESS

SMASK

DATA

TIMER

TIMERRL

SCONFIG

I2CDMA


CONTROL

Module Control
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CONTROL CONTROL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUSYF ACK ARBLF ACKRQF STO STA TXMDF MSMDF STOI ACKI RXI TXI STAI ARBLI T0I T1I T2I T3I RXARM TXARM SLVAF ATXRXEN FMD DBGMD SMINH HACKEN SLVAMD LBACKEN GCEN RESET I2CEN

BUSYF : Busy Flag.
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

0 : NOT_SET

A transaction is not currently taking place.

1 : SET

A transaction is currently taking place.

End of enumeration elements list.

ACK : Acknowledge.
bits : 1 - 1 (1 bit)

Enumeration:

0 : NOT_SET

Read: ACK has not been received. Write: Do not send an ACK.

1 : SET

Read: ACK received. Write: Send an ACK.

End of enumeration elements list.

ARBLF : Arbitration Lost Flag.
bits : 2 - 2 (1 bit)
access : read-only

Enumeration:

0 : NOT_SET

Arbitration lost error has not occurred.

1 : SET

Arbitration lost error occurred.

End of enumeration elements list.

ACKRQF : Acknowledge Request Flag.
bits : 3 - 3 (1 bit)
access : read-only

Enumeration:

0 : NOT_SET

ACK has not been requested.

1 : SET

ACK requested.

End of enumeration elements list.

STO : Stop.
bits : 4 - 4 (1 bit)

Enumeration:

0 : NOT_SET

Read: A stop is not pending and a stop / repeat start has not been detected. Write: Clear the STO bit.

1 : SET

Read: Stop or stop / repeat start detected. This bit must be cleared by firmware. Write: Generate a stop.

End of enumeration elements list.

STA : Start.
bits : 5 - 5 (1 bit)

Enumeration:

0 : NOT_SET

Read: A start is not pending and a repeat start has not been detected. Write: Clear the STA bit.

1 : SET

Read: Start or repeat start detected. This bit must be cleared by firmware. Write: Generate a start or repeat start.

End of enumeration elements list.

TXMDF : Transmit Mode Flag.
bits : 6 - 6 (1 bit)
access : read-only

Enumeration:

0 : RECEIVE

Module is in receiver mode.

1 : TRANSMIT

Module is in transmitter mode.

End of enumeration elements list.

MSMDF : Master/Slave Mode Flag.
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

0 : SLAVE

Module is operating in Slave mode.

1 : MASTER

Module is operating in Master mode.

End of enumeration elements list.

STOI : Stop Interrupt Flag.
bits : 8 - 8 (1 bit)

Enumeration:

0 : NOT_SET

Read: A stop interrupt has not occurred. Write: Clear the stop interrupt flag (STOI).

1 : SET

Read: Stop interrupt detected. In Slave mode, a stop has been detected on the bus. In Master mode, a stop has been generated. Write: Force a stop interrupt.

End of enumeration elements list.

ACKI : Acknowledge Interrupt Flag.
bits : 9 - 9 (1 bit)

Enumeration:

0 : NOT_SET

Read: An acknowledge interrupt has not occurred. Write: Clear the acknowledge interrupt (ACKI).

1 : SET

Read: An acknowledge interrupt occurred. Write: Force an acknowledge interrupt.

End of enumeration elements list.

RXI : Receive Done Interrupt Flag.
bits : 10 - 10 (1 bit)

Enumeration:

0 : NOT_SET

Read: A receive done interrupt has not occurred. Write: Clear the receive done interrupt (RXI).

1 : SET

Read: Receive done interrupt occurred. Write: Force a receive done interrupt.

End of enumeration elements list.

TXI : Transmit Done Interrupt Flag.
bits : 11 - 11 (1 bit)

Enumeration:

0 : NOT_SET

Read: A transmit done interrupt has not occurred. Write: Clear the transmit done interrupt (TXI).

1 : SET

Read: Transmit done interrupt detected. If the transmit is forced to abort by a NACK response, the acknowledge interrupt (ACKI) will also be set. Write: Force a transmit done interrupt.

End of enumeration elements list.

STAI : Start Interrupt Flag.
bits : 12 - 12 (1 bit)

Enumeration:

0 : NOT_SET

Read: Start interrupt has not occurred. Write: Clear the start interrupt (STAI).

1 : SET

Read: Start or repeat start interrupt occurred. In Slave mode, a start or repeat start is detected. In Master mode, a start or repeat start has been generated.

End of enumeration elements list.

ARBLI : Arbitration Lost Interrupt Flag.
bits : 13 - 13 (1 bit)

Enumeration:

0 : NOT_SET

Read: An arbitration lost interrupt has not occurred. Write: Clear the arbitration lost interrupt (ARBLI).

1 : SET

Read: Arbitration lost interrupt detected. Write: Force an arbitration lost interrupt.

End of enumeration elements list.

T0I : I2C Timer Byte 0 Interrupt Flag.
bits : 14 - 14 (1 bit)

Enumeration:

0 : NOT_SET

Read: A I2C Timer Byte 0 interrupt has not occurred. Write: Clear the I2C Timer Byte 0 interrupt (T0I).

1 : SET

Read: I2C Timer Byte 0 overflow interrupt detected. Write: Force a I2C Timer Byte 0 interrupt.

End of enumeration elements list.

T1I : I2C Timer Byte 1 Interrupt Flag.
bits : 15 - 15 (1 bit)

Enumeration:

0 : NOT_SET

Read: No interrupt occurred. Write: Clear the I2C Timer Byte 1 interrupt (T1I).

1 : SET

Read: I2C Timer Byte 1 overflow interrupt is detected. Write: Force a I2C Timer Byte 1 interrupt.

End of enumeration elements list.

T2I : I2C Timer Byte 2 Interrupt Flag.
bits : 16 - 16 (1 bit)

Enumeration:

0 : NOT_SET

Read: A I2C Timer Byte 2 interrupt has not occurred. Write: Clear the I2C Timer Byte 2 interrupt (T2I).

1 : SET

Read: I2C Timer Byte 2 overflow interrupt detected. Write: Force a I2C Timer Byte 2 interrupt.

End of enumeration elements list.

T3I : I2C Timer Byte 3 Interrupt Flag.
bits : 17 - 17 (1 bit)

Enumeration:

0 : NOT_SET

Read: A I2C Timer Byte 3 interrupt or SCL low timeout has not occurred. Write: Clear the I2C Timer Byte 3 interrupt (T3I).

1 : SET

Read: I2C Timer Byte 3 overflow or SCL low timeout interrupt detected. Write: Force a I2C Timer Byte 3 interrupt.

End of enumeration elements list.

RXARM : Receive Arm.
bits : 18 - 18 (1 bit)

Enumeration:

0 : DISABLED

Disable data and address reception.

1 : ENABLED

Enable the module to perform a receive operation.

End of enumeration elements list.

TXARM : Transmit Arm.
bits : 19 - 19 (1 bit)

Enumeration:

0 : DISABLED

Disable data and address transmission.

1 : ENABLED

Enable the module to perform a transmit operation.

End of enumeration elements list.

SLVAF : Slave Address Type Flag.
bits : 20 - 20 (1 bit)
access : read-only

Enumeration:

0 : SLAVE_ADDRESS

Slave address detected.

1 : GENERAL_CALL

General Call address detected.

End of enumeration elements list.

ATXRXEN : Auto Transmit or Receive Enable.
bits : 21 - 21 (1 bit)

Enumeration:

0 : DISABLED

Do not automatically switch to transmit or receive mode after a Start.

1 : ENABLED

If automatic hardware acknowledge mode is enabled (HACKEN = 1), automatically switch to transmit or receive mode after a Start.

End of enumeration elements list.

FMD : Filter Mode.
bits : 22 - 22 (1 bit)

Enumeration:

0 : DISABLED

Disable the input filter.

1 : ENABLED

Enable the input filter.

End of enumeration elements list.

DBGMD : I2C Debug Mode.
bits : 23 - 23 (1 bit)

Enumeration:

0 : RUN

The I2C module will continue to operate while the core is halted in debug mode.

1 : HALT

A debug breakpoint will cause the I2C module to halt.

End of enumeration elements list.

SMINH : Slave Mode Inhibit.
bits : 24 - 24 (1 bit)

Enumeration:

0 : INACTIVE

Enable Slave modes.

1 : ACTIVE

Inhibit Slave modes. The module will not respond to a Master on the bus.

End of enumeration elements list.

HACKEN : Auto Acknowledge Enable .
bits : 25 - 25 (1 bit)

Enumeration:

0 : DISABLED

Disable automatic hardware acknowledge.

1 : ENABLED

Enable automatic hardware acknowledge.

End of enumeration elements list.

SLVAMD : Slave Address Mode.
bits : 26 - 26 (1 bit)

Enumeration:

0 : 7BIT

Slave addresses are 7 bits.

1 : 10BIT

Slave addresses are 10 bits.

End of enumeration elements list.

LBACKEN : Last Byte Acknowledge Enable.
bits : 27 - 27 (1 bit)

Enumeration:

0 : DISABLED

NACK after the last byte is received.

1 : ENABLED

ACK after the last byte is received.

End of enumeration elements list.

GCEN : General Call Address Enable.
bits : 29 - 29 (1 bit)

Enumeration:

0 : DISABLED

Disable General Call address decoding.

1 : ENABLED

Enable General Call address decoding.

End of enumeration elements list.

RESET : Module Soft Reset.
bits : 30 - 30 (1 bit)

Enumeration:

0 : INACTIVE

I2C module is not in soft reset.

1 : ACTIVE

I2C module is in soft reset and firmware cannot access all bits in the module.

End of enumeration elements list.

I2CEN : I2C Enable.
bits : 31 - 31 (1 bit)

Enumeration:

0 : DISABLED

Disable the I2C module.

1 : ENABLED

Enable the I2C module.

End of enumeration elements list.


CONFIG

Module Configuration
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CONFIG CONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCALER STOIEN ACKIEN RXIEN TXIEN STAIEN ARBLIEN T0IEN T1IEN T2IEN T3IEN BC BP T0RUN T1RUN T2RUN T3RUN TMD TIMEREN

SCALER : I2C Clock Scaler.
bits : 0 - 5 (6 bit)

STOIEN : Stop Interrupt Enable.
bits : 8 - 8 (1 bit)

Enumeration:

0 : DISABLED

Disable the stop interrupt.

1 : ENABLED

Enable the stop interrupt (STOI).

End of enumeration elements list.

ACKIEN : Acknowledge Interrupt Enable.
bits : 9 - 9 (1 bit)

Enumeration:

0 : DISABLED

Disable the acknowledge interrupt.

1 : ENABLED

Enable the acknowledge interrupt (ACKI).

End of enumeration elements list.

RXIEN : Receive Done Interrupt Enable.
bits : 10 - 10 (1 bit)

Enumeration:

0 : DISABLED

Disable the receive done interrupt.

1 : ENABLED

Enable the receive done interrupt (RXI).

End of enumeration elements list.

TXIEN : Transmit Done Interrupt Enable.
bits : 11 - 11 (1 bit)

Enumeration:

0 : DISABLED

Disable the transmit done interrupt.

1 : ENABLED

Enable the transmit done interrupt (TXI).

End of enumeration elements list.

STAIEN : Start Interrupt Enable.
bits : 12 - 12 (1 bit)

Enumeration:

0 : DISABLED

Disable the start interrupt.

1 : ENABLED

Enable the start interrupt (STAI).

End of enumeration elements list.

ARBLIEN : Arbitration Lost Interrupt Enable.
bits : 13 - 13 (1 bit)

Enumeration:

0 : DISABLED

Disable the arbitration lost interrupt.

1 : ENABLED

Enable the arbitration lost interrupt (ARBLI).

End of enumeration elements list.

T0IEN : I2C Timer Byte 0 Interrupt Enable.
bits : 14 - 14 (1 bit)

Enumeration:

0 : DISABLED

Disable the I2C Timer Byte 0 interrupt.

1 : ENABLED

Enable the I2C Timer Byte 0 interrupt (T0I).

End of enumeration elements list.

T1IEN : I2C Timer Byte 1 Interrupt Enable.
bits : 15 - 15 (1 bit)

Enumeration:

0 : DISABLED

Disable the I2C Timer Byte 1 interrupt.

1 : ENABLED

Enable the I2C Timer Byte 1 interrupt (T1I).

End of enumeration elements list.

T2IEN : I2C Timer Byte 2 Interrupt Enable.
bits : 16 - 16 (1 bit)

Enumeration:

0 : DISABLED

Disable the I2C Timer Byte 2 interrupt.

1 : ENABLED

Enable the I2C Timer Byte 2 interrupt (T2I).

End of enumeration elements list.

T3IEN : I2C Timer Byte 3 Interrupt Enable.
bits : 17 - 17 (1 bit)

Enumeration:

0 : DISABLED

Disable the I2C Timer Byte 3 and SCL low timeout interrupt.

1 : ENABLED

Enable the I2C Timer Byte 3 and SCL low timeout interrupt (T3I).

End of enumeration elements list.

BC : Transfer Byte Count.
bits : 20 - 21 (2 bit)

BP : Transfer Byte Pointer.
bits : 22 - 23 (2 bit)
access : read-only

T0RUN : I2C Timer Byte 0 Run.
bits : 24 - 24 (1 bit)

Enumeration:

0 : STOP

Stop Timer Byte 0.

1 : START

Start Timer Byte 0 running.

End of enumeration elements list.

T1RUN : I2C Timer Byte 1 Run.
bits : 25 - 25 (1 bit)

Enumeration:

0 : STOP

Stop Timer Byte 1.

1 : START

Start Timer Byte 1 running.

End of enumeration elements list.

T2RUN : I2C Timer Byte 2 Run.
bits : 26 - 26 (1 bit)

Enumeration:

0 : STOP

Stop Timer Byte 2.

1 : START

Start Timer Byte 2 running.

End of enumeration elements list.

T3RUN : I2C Timer Byte 3 Run.
bits : 27 - 27 (1 bit)

Enumeration:

0 : STOP

Stop Timer Byte 3.

1 : START

Start Timer Byte 3 running.

End of enumeration elements list.

TMD : I2C Timer Mode.
bits : 28 - 29 (2 bit)

Enumeration:

0 : MODE0

I2C Timer Mode 0: Operate the I2C timer as a single 32-bit timer : Timer Bytes [3 : 2 : 1 : 0].

1 : MODE1

I2C Timer Mode 1: Operate the I2C timer as two 16-bit timers : Timer Bytes [3 : 2] and Timer Bytes [1 : 0].

2 : MODE2

I2C Timer Mode 2: Operate the I2C timer as four independent 8-bit timers : Timer Byte 3, Timer Byte 2, Timer Byte 1, and Timer Byte 0.

3 : MODE3

I2C Timer Mode 3: Operate the I2C timer as one 16-bit and two 8-bit timers : Timer Bytes [3 : 2], Timer Byte 1, and Timer Byte 0.

End of enumeration elements list.

TIMEREN : I2C Timer Enable.
bits : 31 - 31 (1 bit)

Enumeration:

0 : DISABLED

Disable I2C Timer.

1 : ENABLED

Enable I2C Timer for general purpose use. This setting should not be used when the I2C module is enabled (I2CEN = 1).

End of enumeration elements list.


SADDRESS

Slave Address
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SADDRESS SADDRESS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRESS

ADDRESS : Slave Address.
bits : 1 - 10 (10 bit)


SMASK

Slave Address Mask
address_offset : 0x30 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMASK SMASK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MASK

MASK : Slave Address Mask.
bits : 1 - 10 (10 bit)


DATA

Data Buffer Access
address_offset : 0x40 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data.
bits : 0 - 31 (32 bit)


TIMER

Timer Data
address_offset : 0x50 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER TIMER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 T0 T1 T2 T3

T0 : Timer Byte 0.
bits : 0 - 7 (8 bit)

T1 : Timer Byte 1.
bits : 8 - 15 (8 bit)

T2 : Timer Byte 2.
bits : 16 - 23 (8 bit)

T3 : Timer Byte 3.
bits : 24 - 31 (8 bit)


TIMERRL

Timer Reload Values
address_offset : 0x60 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMERRL TIMERRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 T0RL T1RL T2RL T3RL

T0RL : Timer Byte 0 Reload Value.
bits : 0 - 7 (8 bit)

T1RL : Timer Byte 1 Reload Value.
bits : 8 - 15 (8 bit)

T2RL : Timer Byte 2 Reload Value.
bits : 16 - 23 (8 bit)

T3RL : Timer Byte 3 Reload Value.
bits : 24 - 31 (8 bit)


SCONFIG

SCL Signal Configuration
address_offset : 0x70 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCONFIG SCONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SETUP HOLD SCLL SCLLTIMER

SETUP : Data Setup Time Extension.
bits : 0 - 3 (4 bit)

HOLD : Data Hold Time Extension.
bits : 4 - 7 (4 bit)

SCLL : SCL Low Time Extension.
bits : 8 - 15 (8 bit)

SCLLTIMER : SCL Low Timer Bits [3:0].
bits : 16 - 19 (4 bit)
access : read-only


I2CDMA

DMA Configuration
address_offset : 0x80 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2CDMA I2CDMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMALEN DMAEN

DMALEN : DMA Transfer Length.
bits : 0 - 7 (8 bit)

DMAEN : DMA Mode Enable.
bits : 31 - 31 (1 bit)

Enumeration:

0 : DISABLED

Disable I2C DMA data requests.

1 : ENABLED

Enable I2C DMA data requests.

End of enumeration elements list.



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