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DMA

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xFFC byte (0x0)
mem_usage : registers
protection : not protected

Registers

DMAXBAR0

DMAXBAR1


DMAXBAR0

Channel 0-7 Trigger Select
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DMAXBAR0 DMAXBAR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CH0SEL CH1SEL CH2SEL CH3SEL CH4SEL CH5SEL CH6SEL CH7SEL

CH0SEL : DMA Channel 0 Peripheral Select.
bits : 0 - 3 (4 bit)

Enumeration:

0 : DTM0_A

Service DTM0 A data requests.

1 : SPI0_TX

Service SPI0 TX data requests.

2 : AES0_TX

Service AES0 TX data requests.

3 : USART0_RX

Service USART0 RX data requests.

4 : I2C0_RX

Service I2C0 RX data requests.

5 : I2C0_TX

Service I2C0 TX data requests.

6 : EPCA0_CAPTURE

Service EPCA0 capture data requests.

7 : TIMER0L

Service TIMER0L overflow data requests.

8 : TIMER0H

Service TIMER0H overflow data requests.

9 : DMA0T0_RISE

Service DMA0T0 rising edge data requests.

10 : DMA0T0_FALL

Service DMA0T0 falling edge data requests.

End of enumeration elements list.

CH1SEL : DMA Channel 1 Peripheral Select.
bits : 4 - 7 (4 bit)

Enumeration:

0 : DTM0_B

Service DTM0 B data requests.

1 : SPI0_RX

Service SPI0 RX data requests.

2 : AES0_RX

Service AES0 RX data requests.

3 : USART0_TX

Service USART0 TX data requests.

4 : SARADC0

Service SARADC0 data requests.

5 : EPCA0_CAPTURE

Service EPCA0 capture data requests.

6 : EPCA0_CONTROL

Service EPCA0 control data requests.

7 : TIMER1L

Service TIMER1L overflow data requests.

8 : TIMER1H

Service TIMER1H overflow data requests.

9 : DMA0T1_RISE

Service DMA0T1 rising edge data requests.

10 : DMA0T1_FALL

Service DMA0T1 falling edge data requests.

End of enumeration elements list.

CH2SEL : DMA Channel 2 Peripheral Select.
bits : 8 - 11 (4 bit)

Enumeration:

0 : DTM0_C

Service DTM0 C data requests.

1 : DTM2_A

Service DTM2 A data requests.

2 : ENCDEC0_TX

Service ENCDEC0 TX data requests.

3 : AES0_XOR

Service AES0 XOR data requests.

4 : SPI1_TX

Service SPI1 TX data requests.

5 : USART0_RX

Service USART0 RX data requests.

6 : I2C0_RX

Service I2C0 RX data requests.

7 : IDAC0

Service IDAC0 data requests.

8 : TIMER0L

Service TIMER0L overflow data requests.

9 : TIMER0H

Service TIMER0H overflow data requests.

10 : DMA0T0_RISE

Service DMA0T0 rising edge data requests.

11 : DMA0T0_FALL

Service DMA0T0 falling edge data requests.

End of enumeration elements list.

CH3SEL : DMA Channel 3 Peripheral Select.
bits : 12 - 15 (4 bit)

Enumeration:

0 : DTM0_D

Service DTM0 D data requests.

1 : DTM2_B

Service DTM2 B data requests.

2 : ENCDEC0_RX

Service ENCDEC0 RX data requests.

3 : SPI1_RX

Service SPI1 RX data requests.

4 : USART0_TX

Service USART0 TX data requests.

5 : I2C0_RX

Service I2C0 RX data requests.

6 : I2C0_TX

Service I2C0 TX data requests.

7 : TIMER1L

Service TIMER1L overflow data requests.

8 : TIMER1H

Service TIMER1H overflow data requests.

9 : DMA0T1_RISE

Service DMA0T1 rising edge data requests.

10 : DMA0T1_FALL

Service DMA0T1 falling edge data requests.

End of enumeration elements list.

CH4SEL : DMA Channel 4 Peripheral Select.
bits : 16 - 19 (4 bit)

Enumeration:

0 : DTM1_A

Service DTM1 A data requests.

1 : DTM2_C

Service DTM2 C data requests.

2 : SPI0_TX

Service SPI1 TX data requests.

3 : AES0_TX

Service AES0 TX data requests.

4 : SARADC0

Service SARADC0 data requests.

5 : EPCA0_CAPTURE

Service EPCA0 capture data requests.

6 : EPCA0_CONTROL

Service EPCA0 control data requests.

7 : TIMER0L

Service TIMER0L overflow data requests.

8 : TIMER0H

Service TIMER0H overflow data requests.

9 : DMA0T0_RISE

Service DMA0T0 rising edge data requests.

10 : DMA0T0_FALL

Service DMA0T0 falling edge data requests.

End of enumeration elements list.

CH5SEL : DMA Channel 5 Peripheral Select.
bits : 20 - 23 (4 bit)

Enumeration:

0 : DTM1_B

Service DTM1 B data requests.

1 : DTM2_D

Service DTM2 D data requests.

2 : SPI0_RX

Service SPI0 RX data requests.

3 : AES0_RX

Service AES0 RX data requests.

4 : USART0_RX

Service USART0 RX data requests.

5 : I2C0_RX

Service I2C0 RX data requests.

6 : IDAC0

Service IDAC0 data requests.

7 : EPCA0_CONTROL

Service EPCA0 control data requests.

8 : TIMER1L

Service TIMER1L overflow data requests.

9 : TIMER1H

Service TIMER1H overflow data requests.

10 : DMA0T1_RISE

Service DMA0T1 rising edge data requests.

11 : DMA0T1_FALL

Service DMA0T1 falling edge data requests.

End of enumeration elements list.

CH6SEL : DMA Channel 6 Peripheral Select.
bits : 24 - 27 (4 bit)

Enumeration:

0 : DTM1_C

Service DTM1 C data requests.

1 : DTM2_A

Service DTM2 A data requests.

2 : ENCDEC0_TX

Service ENCDEC0 TX data requests.

3 : AES0_XOR

Service AES0 XOR data requests.

4 : USART0_TX

Service USART0 TX data requests.

5 : I2C0_RX

Service I2C0 RX data requests.

6 : I2C0_TX

Service I2C0 TX data requests.

7 : SARADC0

Service SARADC0 data requests.

8 : TIMER0L

Service TIMER0L overflow data requests.

9 : TIMER0H

Service TIMER0H overflow data requests.

10 : DMA0T0_RISE

Service DMA0T0 rising edge data requests.

11 : DMA0T0_FALL

Service DMA0T0 falling edge data requests.

End of enumeration elements list.

CH7SEL : DMA Channel 7 Peripheral Select.
bits : 28 - 31 (4 bit)

Enumeration:

0 : DTM1_D

Service DTM1 D data requests.

1 : DTM2_B

Service DTM2 B data requests.

2 : ENCDEC0_RX

Service ENCDEC0 RX data requests.

3 : SPI1_TX

Service SPI1 TX data requests.

4 : USART0_RX

Service USART0 RX data requests.

5 : IDAC0

Service IDAC0 data requests.

6 : TIMER1L

Service TIMER1L overflow data requests.

7 : TIMER1H

Service TIMER1H overflow data requests.

8 : DMA0T1_RISE

Service DMA0T1 rising edge data requests.

9 : DMA0T1_FALL

Service DMA0T1 falling edge data requests.

End of enumeration elements list.


DMAXBAR1

Channel 8-15 Trigger Select
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DMAXBAR1 DMAXBAR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CH8SEL CH9SEL

CH8SEL : DMA Channel 8 Peripheral Select.
bits : 0 - 3 (4 bit)

Enumeration:

0 : DTM2_C

Service DTM2 C data requests.

1 : SPI0_TX

Service SPI0 TX data requests.

2 : SPI1_RX

Service SPI1 RX data requests.

3 : USART0_TX

Service USART0 TX data requests.

4 : I2C0_RX

Service I2C0 RX data requests.

5 : SARADC0

Service SARADC0 data requests.

6 : EPCA0_CAPTURE

Service EPCA0 capture data requests.

7 : TIMER0L

Service TIMER0L overflow data requests.

8 : TIMER0H

Service TIMER0H overflow data requests.

9 : DMA0T0_RISE

Service DMA0T0 rising edge data requests.

10 : DMA0T0_FALL

Service DMA0T0 falling edge data requests.

End of enumeration elements list.

CH9SEL : DMA Channel 9 Peripheral Select.
bits : 4 - 7 (4 bit)

Enumeration:

0 : DTM2_D

Service DTM2 D data requests.

1 : SPI0_RX

Service SPI0 TX data requests.

2 : I2C0_RX

Service I2C0 RX data requests.

3 : I2C0_TX

Service I2C0 TX data requests.

4 : IDAC0

Service IDAC0 data requests.

5 : EPCA0_CAPTURE

Service EPCA0 capture data requests.

6 : EPCA0_CONTROL

Service EPCA0 control data requests.

7 : TIMER1L

Service TIMER1L overflow data requests.

8 : TIMER1H

Service TIMER1H overflow data requests.

9 : DMA0T1_RISE

Service DMA0T1 rising edge data requests.

10 : DMA0T1_FALL

Service DMA0T1 falling edge data requests.

End of enumeration elements list.



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