\n
address_offset : 0x0 Bytes (0x0)
size : 0xFFC byte (0x0)
mem_usage : registers
protection : not protected
Module Control
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SINITEN : Seed Initialization Enable.
bits : 0 - 0 (1 bit)
access : write-only
Enumeration:
0 : DISABLED
Do not initialize the CRC module to the value set by the SEED bit.
1 : ENABLED
Initialize the CRC module to the value set by the SEED bit.
End of enumeration elements list.
SEED : Seed Setting.
bits : 1 - 1 (1 bit)
Enumeration:
0 : ALL_ZEROES
CRC seed value is all 0's (0x00000000)
1 : ALL_ONES
CRC seed value is all 1's (0xFFFFFFFF).
End of enumeration elements list.
CRCEN : CRC Enable.
bits : 2 - 2 (1 bit)
Enumeration:
0 : DISABLED
Disable CRC operations.
1 : ENABLED
Enable CRC operations.
End of enumeration elements list.
POLYSEL : Polynomial Selection.
bits : 4 - 4 (1 bit)
Enumeration:
0 : CRC32_FIXED
Select the fixed 32-bit polynomial: 0x04C11DB7.
1 : CRC16_PROG
Select the programmable 16-bit polynomial. The POLY register sets the polynomial coefficients.
End of enumeration elements list.
BMDEN : Byte Mode Enable.
bits : 8 - 8 (1 bit)
Enumeration:
0 : DISABLED
Disable byte mode (word/byte width is determined automatically by the hardware).
1 : ENABLED
Enable byte mode (all writes are considered as bytes).
End of enumeration elements list.
BBREN : Byte-Level Bit Reversal Enable.
bits : 9 - 9 (1 bit)
Enumeration:
0 : DISABLED
No byte-level bit reversal (input is same order as written).
1 : ENABLED
Byte-level bit reversal enabled (the bits in each byte are reversed).
End of enumeration elements list.
ORDER : Input Processing Order.
bits : 10 - 11 (2 bit)
Enumeration:
0 : NO_REORDER
No byte reorientation (output is same order as input).
1 : BIG_ENDIAN_16
Swap for 16-bit big endian order (input: B3 B2 B1 B0, output: B2 B3 B0 B1).
2 : BIG_ENDIAN_32
Swap for 32-bit big endian order (input: B3 B2 B1 B0, output: B0 B1 B2 B3).
End of enumeration elements list.
ASEEDEN : Automatic Seed Enable.
bits : 13 - 13 (1 bit)
Enumeration:
0 : DISABLED
Disable automatic seeding.
1 : ENABLED
Enable automatic seeding. Reading the byte of the DATA register selected by ASEEDSEL re-seeds the CRC result with the setting selected by SEED.
End of enumeration elements list.
ASEEDSEL : Automatic Seed Byte Select.
bits : 14 - 14 (1 bit)
Enumeration:
0 : LSB_READ
Select a read of the least-significant byte (DATA[7:0]) for automatic re-seeding.
1 : MSB_READ
Select a read of the most-significant byte (DATA[31:24] for 32-bit operations, DATA[15:8] for 16-bit operations) for automatic re-seeding.
End of enumeration elements list.
16-bit Programmable Polynomial
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
POLY : 16-bit Programmable Polynomial.
bits : 0 - 15 (16 bit)
Input/Result Data
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA : Input/Result Data.
bits : 0 - 31 (32 bit)
Bit-Reversed Output Data
address_offset : 0x30 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RDATA : Bit-Reversed Output Data.
bits : 0 - 31 (32 bit)
access : read-only
Byte-Reversed Output Data
address_offset : 0x40 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BRDATA : Byte-Reversed Output Data.
bits : 0 - 31 (32 bit)
access : read-only
Bus Snooping Control
address_offset : 0x50 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEN : Snooping Enable.
bits : 0 - 0 (1 bit)
Enumeration:
0 : DISABLED
Disable automatic bus snooping.
1 : ENABLED
Enable automatic bus snooping.
End of enumeration elements list.
SDIRSEL : Snooping Direction Select.
bits : 1 - 1 (1 bit)
Enumeration:
0 : WRITES
ECRC will snoop writes to the selected peripheral.
1 : READS
ECRC will snoop reads from the selected peripheral.
End of enumeration elements list.
SPERISEL : Snooping Peripheral Select.
bits : 4 - 7 (4 bit)
SADDR : Snooping Address.
bits : 18 - 27 (10 bit)
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