\n
address_offset : 0x0 Bytes (0x0)
size : 0xFFC byte (0x0)
mem_usage : registers
protection : not protected
Output Latch
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PB : Output Latch.
bits : 0 - 15 (16 bit)
Pin Value
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PBPIN : Pin Value.
bits : 0 - 15 (16 bit)
access : read-only
Mode Select
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PBMDSEL : Mode Select.
bits : 0 - 15 (16 bit)
Crossbar Pin Skip Enable
address_offset : 0x30 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PBSKIPEN : Crossbar Pin Skip Enable.
bits : 0 - 15 (16 bit)
Output Mode
address_offset : 0x40 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PBOUTMD : Output Mode.
bits : 0 - 15 (16 bit)
Drive Strength
address_offset : 0x50 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PBDRV : Drive Strength.
bits : 0 - 15 (16 bit)
PBPUEN : Port Bank Weak Pull-up Enable.
bits : 16 - 16 (1 bit)
Enumeration:
0 : DISABLED
Disable weak pull-ups for this port.
1 : ENABLED
Enable weak pull-ups for this port.
End of enumeration elements list.
Port Match Value
address_offset : 0x60 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PM : Port Match Value.
bits : 0 - 15 (16 bit)
Port Match Enable
address_offset : 0x70 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PMEN : Port Match Enable.
bits : 0 - 15 (16 bit)
Lock Control
address_offset : 0x80 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PBLOCK : Port Bank Lock.
bits : 0 - 15 (16 bit)
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