\n
address_offset : 0x0 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection : not protected
Capacitive Touch IO x Control Register
address_offset : 0xE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CAPTIOPISELx : Capacitive Touch IO pin select
bits : 1 - 3 (3 bit)
access : read-write
Enumeration:
0 : CAPTIOPISELx_0
Px.0
1 : CAPTIOPISELx_1
Px.1
2 : CAPTIOPISELx_2
Px.2
3 : CAPTIOPISELx_3
Px.3
4 : CAPTIOPISELx_4
Px.4
5 : CAPTIOPISELx_5
Px.5
6 : CAPTIOPISELx_6
Px.6
7 : CAPTIOPISELx_7
Px.7
End of enumeration elements list.
CAPTIOPOSELx : Capacitive Touch IO port select
bits : 4 - 7 (4 bit)
access : read-write
Enumeration:
0 : CAPTIOPOSELx_0
Px = PJ
1 : CAPTIOPOSELx_1
Px = P1
2 : CAPTIOPOSELx_2
Px = P2
3 : CAPTIOPOSELx_3
Px = P3
4 : CAPTIOPOSELx_4
Px = P4
5 : CAPTIOPOSELx_5
Px = P5
6 : CAPTIOPOSELx_6
Px = P6
7 : CAPTIOPOSELx_7
Px = P7
8 : CAPTIOPOSELx_8
Px = P8
9 : CAPTIOPOSELx_9
Px = P9
10 : CAPTIOPOSELx_10
Px = P10
11 : CAPTIOPOSELx_11
Px = P11
12 : CAPTIOPOSELx_12
Px = P12
13 : CAPTIOPOSELx_13
Px = P13
14 : CAPTIOPOSELx_14
Px = P14
15 : CAPTIOPOSELx_15
Px = P15
End of enumeration elements list.
CAPTIOEN : Capacitive Touch IO enable
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0 : CAPTIOEN_0
All Capacitive Touch IOs are disabled. Signal towards timers is 0.
1 : CAPTIOEN_1
Selected Capacitive Touch IO is enabled
End of enumeration elements list.
CAPTIOSTATE : Capacitive Touch IO state
bits : 9 - 9 (1 bit)
access : read-only
Enumeration: CAPTIOSTATE_enum_read ( read )
0 : CAPTIOSTATE_0
Curent state 0 or Capacitive Touch IO is disabled
1 : CAPTIOSTATE_1
Current state 1
End of enumeration elements list.
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