Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection : not protected
Key Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PSSKEY : PSS control key
bits : 0 - 15 (16 bit)
access : read-write
Interrupt Enable Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SVSMHIE : High-side SVSM interrupt enable
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : SVSMHIE_0
Interrupt disabled
1 : SVSMHIE_1
Interrupt enabled
End of enumeration elements list.
Interrupt Flag Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SVSMHIFG : High-side SVSM interrupt flag
bits : 1 - 1 (1 bit)
access : read-only
Enumeration: SVSMHIFG_enum_read ( read )
0 : SVSMHIFG_0
No interrupt pending
1 : SVSMHIFG_1
Interrupt due to SVSMH
End of enumeration elements list.
Clear Interrupt Flag Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRSVSMHIFG : SVSMH clear interrupt flag
bits : 1 - 1 (1 bit)
access : write-only
Enumeration: CLRSVSMHIFG_enum_write ( write )
0 : CLRSVSMHIFG_0
No effect
1 : CLRSVSMHIFG_1
Clear pending interrupt flag
End of enumeration elements list.
Control 0 Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SVSMHOFF : SVSM high-side off
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : SVSMHOFF_0
The SVSMH is on
1 : SVSMHOFF_1
The SVSMH is off
End of enumeration elements list.
SVSMHLP : SVSM high-side low power normal performance mode
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : SVSMHLP_0
Full performance mode. See the device-specific data sheet for response times.
1 : SVSMHLP_1
Low power normal performance mode in LPM3, LPM4, and LPMx.5, full performance in all other modes. See the device-specific data sheet for response times.
End of enumeration elements list.
SVSMHS : Supply supervisor or monitor selection for the high-side
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SVSMHS_0
Configure as SVSH
1 : SVSMHS_1
Configure as SVMH
End of enumeration elements list.
SVSMHTH : SVSM high-side reset voltage level
bits : 3 - 5 (3 bit)
access : read-write
SVMHOE : SVSM high-side output enable
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : SVMHOE_0
SVSMHIFG bit is not output
1 : SVMHOE_1
SVSMHIFG bit is output to the device SVMHOUT pin. The device-specific port logic must be configured accordingly
End of enumeration elements list.
SVMHOUTPOLAL : SVMHOUT pin polarity active low
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
0 : SVMHOUTPOLAL_0
SVMHOUT is active high. An error condition is signaled by a 1 at the SVMHOUT pin
1 : SVMHOUTPOLAL_1
SVMHOUT is active low. An error condition is signaled by a 0 at the SVMHOUT pin
End of enumeration elements list.
DCDC_FORCE : Force DC-DC regulator operation
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
0 : DCDC_FORCE_0
DC-DC regulator operation not forced. Automatic fail-safe mechanism switches the core voltage regulator from DC-DC to LDO when the supply voltage falls below the minimum supply voltage necessary for DC-DC operation.
1 : DCDC_FORCE_1
DC-DC regulator operation forced. Automatic fail-safe mechanism is disabled and device continues to operate out of DC-DC regulator.
End of enumeration elements list.
VCORETRAN : Controls core voltage level transition time
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : VCORETRAN_0
32 s / 100 mV
1 : VCORETRAN_1
64 s / 100 mV
2 : VCORETRAN_2
128 s / 100 mV (default)
3 : VCORETRAN_3
256 s / 100 mV
End of enumeration elements list.
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