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ADC14

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x158 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CTL0 (ADC14CTL0)

LO1 (ADC14LO1)

MEM26 (ADC14MEM26)

MEM27 (ADC14MEM27)

MEM[%s] (ADC14MEM[20])

MEM28 (ADC14MEM28)

MEM29 (ADC14MEM29)

MEM30 (ADC14MEM30)

MCTL[%s] (ADC14MCTL[6])

MEM31 (ADC14MEM31)

MEM[%s] (ADC14MEM[21])

MEM[%s] (ADC14MEM[22])

MEM[%s] (ADC14MEM[0])

MEM[%s] (ADC14MEM[23])

IER0 (ADC14IER0)

HI1 (ADC14HI1)

IER1 (ADC14IER1)

MEM[%s] (ADC14MEM[24])

IFGR0 (ADC14IFGR0)

MCTL[%s] (ADC14MCTL[7])

IFGR1 (ADC14IFGR1)

CLRIFGR0 (ADC14CLRIFGR0)

CLRIFGR1 (ADC14CLRIFGR1)

MEM[%s] (ADC14MEM[25])

IV (ADC14IV)

MEM[%s] (ADC14MEM[26])

MEM[%s] (ADC14MEM[27])

MCTL0 (ADC14MCTL0)

MCTL[%s] (ADC14MCTL[8])

MEM[%s] (ADC14MEM[28])

MEM[%s] (ADC14MEM[29])

MEM[%s] (ADC14MEM[30])

MEM[%s] (ADC14MEM[31])

MCTL[%s] (ADC14MCTL[9])

MCTL1 (ADC14MCTL1)

MEM[%s] (ADC14MEM[1])

MCTL[%s] (ADC14MCTL[10])

MCTL2 (ADC14MCTL2)

MCTL3 (ADC14MCTL3)

MCTL[%s] (ADC14MCTL[11])

MEM[%s] (ADC14MEM[2])

MCTL4 (ADC14MCTL4)

MCTL[%s] (ADC14MCTL[12])

MCTL5 (ADC14MCTL5)

MCTL[%s] (ADC14MCTL[13])

MCTL[%s] (ADC14MCTL[0])

MCTL6 (ADC14MCTL6)

MEM[%s] (ADC14MEM[3])

MCTL[%s] (ADC14MCTL[14])

MCTL7 (ADC14MCTL7)

MCTL[%s] (ADC14MCTL[15])

MCTL8 (ADC14MCTL8)

MEM[%s] (ADC14MEM[4])

MCTL9 (ADC14MCTL9)

MCTL[%s] (ADC14MCTL[16])

CTL1 (ADC14CTL1)

MCTL10 (ADC14MCTL10)

MCTL[%s] (ADC14MCTL[17])

MCTL11 (ADC14MCTL11)

MEM[%s] (ADC14MEM[5])

MCTL12 (ADC14MCTL12)

MCTL[%s] (ADC14MCTL[18])

MCTL[%s] (ADC14MCTL[1])

MCTL13 (ADC14MCTL13)

MCTL[%s] (ADC14MCTL[19])

MCTL14 (ADC14MCTL14)

MEM[%s] (ADC14MEM[6])

MCTL15 (ADC14MCTL15)

MCTL[%s] (ADC14MCTL[20])

MCTL16 (ADC14MCTL16)

MCTL17 (ADC14MCTL17)

MCTL[%s] (ADC14MCTL[21])

MEM[%s] (ADC14MEM[7])

MCTL18 (ADC14MCTL18)

MCTL[%s] (ADC14MCTL[22])

MCTL19 (ADC14MCTL19)

MCTL20 (ADC14MCTL20)

MEM[%s] (ADC14MEM[8])

MCTL[%s] (ADC14MCTL[23])

MCTL[%s] (ADC14MCTL[2])

MCTL21 (ADC14MCTL21)

MCTL22 (ADC14MCTL22)

MCTL[%s] (ADC14MCTL[24])

MEM[%s] (ADC14MEM[9])

MCTL23 (ADC14MCTL23)

MCTL24 (ADC14MCTL24)

MCTL[%s] (ADC14MCTL[25])

MCTL25 (ADC14MCTL25)

MEM[%s] (ADC14MEM[10])

LO0 (ADC14LO0)

MCTL26 (ADC14MCTL26)

MCTL[%s] (ADC14MCTL[26])

MCTL27 (ADC14MCTL27)

MCTL28 (ADC14MCTL28)

MCTL[%s] (ADC14MCTL[27])

MCTL29 (ADC14MCTL29)

MEM[%s] (ADC14MEM[11])

MCTL[%s] (ADC14MCTL[3])

MCTL30 (ADC14MCTL30)

MCTL[%s] (ADC14MCTL[28])

MCTL31 (ADC14MCTL31)

MEM0 (ADC14MEM0)

MEM[%s] (ADC14MEM[12])

MCTL[%s] (ADC14MCTL[29])

MEM1 (ADC14MEM1)

MEM2 (ADC14MEM2)

MEM3 (ADC14MEM3)

MCTL[%s] (ADC14MCTL[30])

MEM[%s] (ADC14MEM[13])

MEM4 (ADC14MEM4)

MEM5 (ADC14MEM5)

MCTL[%s] (ADC14MCTL[31])

MEM6 (ADC14MEM6)

MEM[%s] (ADC14MEM[14])

MEM7 (ADC14MEM7)

MCTL[%s] (ADC14MCTL[4])

MEM8 (ADC14MEM8)

MEM9 (ADC14MEM9)

MEM[%s] (ADC14MEM[15])

HI0 (ADC14HI0)

MEM10 (ADC14MEM10)

MEM11 (ADC14MEM11)

MEM12 (ADC14MEM12)

MEM13 (ADC14MEM13)

MEM[%s] (ADC14MEM[16])

MEM14 (ADC14MEM14)

MEM15 (ADC14MEM15)

MEM16 (ADC14MEM16)

MEM[%s] (ADC14MEM[17])

MEM17 (ADC14MEM17)

MEM18 (ADC14MEM18)

MCTL[%s] (ADC14MCTL[5])

MEM19 (ADC14MEM19)

MEM20 (ADC14MEM20)

MEM[%s] (ADC14MEM[18])

MEM21 (ADC14MEM21)

MEM22 (ADC14MEM22)

MEM23 (ADC14MEM23)

MEM[%s] (ADC14MEM[19])

MEM24 (ADC14MEM24)

MEM25 (ADC14MEM25)


CTL0 (ADC14CTL0)

Control 0 Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTL0 CTL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14SC ADC14ENC ADC14ON ADC14MSC ADC14SHT0 ADC14SHT1 ADC14BUSY ADC14CONSEQ ADC14SSEL ADC14DIV ADC14ISSH ADC14SHP ADC14SHS ADC14PDIV

ADC14SC : ADC14 start conversion
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : ADC14SC_0

No sample-and-conversion-start

1 : ADC14SC_1

Start sample-and-conversion

End of enumeration elements list.

ADC14ENC : ADC14 enable conversion
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : ADC14ENC_0

ADC14 disabled

1 : ADC14ENC_1

ADC14 enabled

End of enumeration elements list.

ADC14ON : ADC14 on
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : ADC14ON_0

ADC14 off

1 : ADC14ON_1

ADC14 on. ADC core is ready to power up when a valid conversion is triggered.

End of enumeration elements list.

ADC14MSC : ADC14 multiple sample and conversion
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14MSC_0

The sampling timer requires a rising edge of the SHI signal to trigger each sample-and-convert

1 : ADC14MSC_1

The first rising edge of the SHI signal triggers the sampling timer, but further sample-and-conversions are performed automatically as soon as the prior conversion is completed

End of enumeration elements list.

ADC14SHT0 : ADC14 sample-and-hold time
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14SHT0_0

4

1 : ADC14SHT0_1

8

2 : ADC14SHT0_2

16

3 : ADC14SHT0_3

32

4 : ADC14SHT0_4

64

5 : ADC14SHT0_5

96

6 : ADC14SHT0_6

128

7 : ADC14SHT0_7

192

End of enumeration elements list.

ADC14SHT1 : ADC14 sample-and-hold time
bits : 12 - 15 (4 bit)
access : read-write

Enumeration:

0 : ADC14SHT1_0

4

1 : ADC14SHT1_1

8

2 : ADC14SHT1_2

16

3 : ADC14SHT1_3

32

4 : ADC14SHT1_4

64

5 : ADC14SHT1_5

96

6 : ADC14SHT1_6

128

7 : ADC14SHT1_7

192

End of enumeration elements list.

ADC14BUSY : ADC14 busy
bits : 16 - 16 (1 bit)
access : read-only

Enumeration: ADC14BUSY_enum_read ( read )

0 : ADC14BUSY_0

No operation is active

1 : ADC14BUSY_1

A sequence, sample, or conversion is active

End of enumeration elements list.

ADC14CONSEQ : ADC14 conversion sequence mode select
bits : 17 - 18 (2 bit)
access : read-write

Enumeration:

0 : ADC14CONSEQ_0

Single-channel, single-conversion

1 : ADC14CONSEQ_1

Sequence-of-channels

2 : ADC14CONSEQ_2

Repeat-single-channel

3 : ADC14CONSEQ_3

Repeat-sequence-of-channels

End of enumeration elements list.

ADC14SSEL : ADC14 clock source select
bits : 19 - 21 (3 bit)
access : read-write

Enumeration:

0 : ADC14SSEL_0

MODCLK

1 : ADC14SSEL_1

SYSCLK

2 : ADC14SSEL_2

ACLK

3 : ADC14SSEL_3

MCLK

4 : ADC14SSEL_4

SMCLK

5 : ADC14SSEL_5

HSMCLK

End of enumeration elements list.

ADC14DIV : ADC14 clock divider
bits : 22 - 24 (3 bit)
access : read-write

Enumeration:

0 : ADC14DIV_0

/1

1 : ADC14DIV_1

/2

2 : ADC14DIV_2

/3

3 : ADC14DIV_3

/4

4 : ADC14DIV_4

/5

5 : ADC14DIV_5

/6

6 : ADC14DIV_6

/7

7 : ADC14DIV_7

/8

End of enumeration elements list.

ADC14ISSH : ADC14 invert signal sample-and-hold
bits : 25 - 25 (1 bit)
access : read-write

Enumeration:

0 : ADC14ISSH_0

The sample-input signal is not inverted

1 : ADC14ISSH_1

The sample-input signal is inverted

End of enumeration elements list.

ADC14SHP : ADC14 sample-and-hold pulse-mode select
bits : 26 - 26 (1 bit)
access : read-write

Enumeration:

0 : ADC14SHP_0

SAMPCON signal is sourced from the sample-input signal

1 : ADC14SHP_1

SAMPCON signal is sourced from the sampling timer

End of enumeration elements list.

ADC14SHS : ADC14 sample-and-hold source select
bits : 27 - 29 (3 bit)
access : read-write

Enumeration:

0 : ADC14SHS_0

ADC14SC bit

1 : ADC14SHS_1

See device-specific data sheet for source

2 : ADC14SHS_2

See device-specific data sheet for source

3 : ADC14SHS_3

See device-specific data sheet for source

4 : ADC14SHS_4

See device-specific data sheet for source

5 : ADC14SHS_5

See device-specific data sheet for source

6 : ADC14SHS_6

See device-specific data sheet for source

7 : ADC14SHS_7

See device-specific data sheet for source

End of enumeration elements list.

ADC14PDIV : ADC14 predivider
bits : 30 - 31 (2 bit)
access : read-write

Enumeration:

0 : ADC14PDIV_0

Predivide by 1

1 : ADC14PDIV_1

Predivide by 4

2 : ADC14PDIV_2

Predivide by 32

3 : ADC14PDIV_3

Predivide by 64

End of enumeration elements list.


LO1 (ADC14LO1)

Window Comparator Low Threshold 1 Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LO1 LO1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14LO1

ADC14LO1 : Low threshold 1
bits : 0 - 15 (16 bit)
access : read-write


MEM26 (ADC14MEM26)

Conversion Memory Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM26 MEM26 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM27 (ADC14MEM27)

Conversion Memory Register
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM27 MEM27 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM[%s] (ADC14MEM[20])

Conversion Memory Register
address_offset : 0x1058 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM28 (ADC14MEM28)

Conversion Memory Register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM28 MEM28 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM29 (ADC14MEM29)

Conversion Memory Register
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM29 MEM29 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM30 (ADC14MEM30)

Conversion Memory Register
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM30 MEM30 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MCTL[%s] (ADC14MCTL[6])

Conversion Memory Control Register
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MEM31 (ADC14MEM31)

Conversion Memory Register
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM31 MEM31 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM[%s] (ADC14MEM[21])

Conversion Memory Register
address_offset : 0x1144 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM[%s] (ADC14MEM[22])

Conversion Memory Register
address_offset : 0x1234 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM[%s] (ADC14MEM[0])

Conversion Memory Register
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM[%s] (ADC14MEM[23])

Conversion Memory Register
address_offset : 0x1328 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


IER0 (ADC14IER0)

Interrupt Enable 0 Register
address_offset : 0x13C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IER0 IER0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14IE0 ADC14IE1 ADC14IE2 ADC14IE3 ADC14IE4 ADC14IE5 ADC14IE6 ADC14IE7 ADC14IE8 ADC14IE9 ADC14IE10 ADC14IE11 ADC14IE12 ADC14IE13 ADC14IE14 ADC14IE15 ADC14IE16 ADC14IE17 ADC14IE18 ADC14IE19 ADC14IE20 ADC14IE21 ADC14IE22 ADC14IE23 ADC14IE24 ADC14IE25 ADC14IE26 ADC14IE27 ADC14IE28 ADC14IE29 ADC14IE30 ADC14IE31

ADC14IE0 : Interrupt enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE0_0

Interrupt disabled

1 : ADC14IE0_1

Interrupt enabled

End of enumeration elements list.

ADC14IE1 : Interrupt enable
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE1_0

Interrupt disabled

1 : ADC14IE1_1

Interrupt enabled

End of enumeration elements list.

ADC14IE2 : Interrupt enable
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE2_0

Interrupt disabled

1 : ADC14IE2_1

Interrupt enabled

End of enumeration elements list.

ADC14IE3 : Interrupt enable
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE3_0

Interrupt disabled

1 : ADC14IE3_1

Interrupt enabled

End of enumeration elements list.

ADC14IE4 : Interrupt enable
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE4_0

Interrupt disabled

1 : ADC14IE4_1

Interrupt enabled

End of enumeration elements list.

ADC14IE5 : Interrupt enable
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE5_0

Interrupt disabled

1 : ADC14IE5_1

Interrupt enabled

End of enumeration elements list.

ADC14IE6 : Interrupt enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE6_0

Interrupt disabled

1 : ADC14IE6_1

Interrupt enabled

End of enumeration elements list.

ADC14IE7 : Interrupt enable
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE7_0

Interrupt disabled

1 : ADC14IE7_1

Interrupt enabled

End of enumeration elements list.

ADC14IE8 : Interrupt enable
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE8_0

Interrupt disabled

1 : ADC14IE8_1

Interrupt enabled

End of enumeration elements list.

ADC14IE9 : Interrupt enable
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE9_0

Interrupt disabled

1 : ADC14IE9_1

Interrupt enabled

End of enumeration elements list.

ADC14IE10 : Interrupt enable
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE10_0

Interrupt disabled

1 : ADC14IE10_1

Interrupt enabled

End of enumeration elements list.

ADC14IE11 : Interrupt enable
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE11_0

Interrupt disabled

1 : ADC14IE11_1

Interrupt enabled

End of enumeration elements list.

ADC14IE12 : Interrupt enable
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE12_0

Interrupt disabled

1 : ADC14IE12_1

Interrupt enabled

End of enumeration elements list.

ADC14IE13 : Interrupt enable
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE13_0

Interrupt disabled

1 : ADC14IE13_1

Interrupt enabled

End of enumeration elements list.

ADC14IE14 : Interrupt enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE14_0

Interrupt disabled

1 : ADC14IE14_1

Interrupt enabled

End of enumeration elements list.

ADC14IE15 : Interrupt enable
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE15_0

Interrupt disabled

1 : ADC14IE15_1

Interrupt enabled

End of enumeration elements list.

ADC14IE16 : Interrupt enable
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE16_0

Interrupt disabled

1 : ADC14IE16_1

Interrupt enabled

End of enumeration elements list.

ADC14IE17 : Interrupt enable
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE17_0

Interrupt disabled

1 : ADC14IE17_1

Interrupt enabled

End of enumeration elements list.

ADC14IE18 : Interrupt enable
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE18_0

Interrupt disabled

1 : ADC14IE18_1

Interrupt enabled

End of enumeration elements list.

ADC14IE19 : Interrupt enable
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE19_0

Interrupt disabled

1 : ADC14IE19_1

Interrupt enabled

End of enumeration elements list.

ADC14IE20 : Interrupt enable
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE20_0

Interrupt disabled

1 : ADC14IE20_1

Interrupt enabled

End of enumeration elements list.

ADC14IE21 : Interrupt enable
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE21_0

Interrupt disabled

1 : ADC14IE21_1

Interrupt enabled

End of enumeration elements list.

ADC14IE22 : Interrupt enable
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE22_0

Interrupt disabled

1 : ADC14IE22_1

Interrupt enabled

End of enumeration elements list.

ADC14IE23 : Interrupt enable
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE23_0

Interrupt disabled

1 : ADC14IE23_1

Interrupt enabled

End of enumeration elements list.

ADC14IE24 : Interrupt enable
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE24_0

Interrupt disabled

1 : ADC14IE24_1

Interrupt enabled

End of enumeration elements list.

ADC14IE25 : Interrupt enable
bits : 25 - 25 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE25_0

Interrupt disabled

1 : ADC14IE25_1

Interrupt enabled

End of enumeration elements list.

ADC14IE26 : Interrupt enable
bits : 26 - 26 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE26_0

Interrupt disabled

1 : ADC14IE26_1

Interrupt enabled

End of enumeration elements list.

ADC14IE27 : Interrupt enable
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE27_0

Interrupt disabled

1 : ADC14IE27_1

Interrupt enabled

End of enumeration elements list.

ADC14IE28 : Interrupt enable
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE28_0

Interrupt disabled

1 : ADC14IE28_1

Interrupt enabled

End of enumeration elements list.

ADC14IE29 : Interrupt enable
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE29_0

Interrupt disabled

1 : ADC14IE29_1

Interrupt enabled

End of enumeration elements list.

ADC14IE30 : Interrupt enable
bits : 30 - 30 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE30_0

Interrupt disabled

1 : ADC14IE30_1

Interrupt enabled

End of enumeration elements list.

ADC14IE31 : Interrupt enable
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

0 : ADC14IE31_0

Interrupt disabled

1 : ADC14IE31_1

Interrupt enabled

End of enumeration elements list.


HI1 (ADC14HI1)

Window Comparator High Threshold 1 Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HI1 HI1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14HI1

ADC14HI1 : High threshold 1
bits : 0 - 15 (16 bit)
access : read-write


IER1 (ADC14IER1)

Interrupt Enable 1 Register
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IER1 IER1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INIE ADC14LOIE ADC14HIIE ADC14OVIE ADC14TOVIE ADC14RDYIE

ADC14INIE : Interrupt enable for ADC14MEMx within comparator window
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : ADC14INIE_0

Interrupt disabled

1 : ADC14INIE_1

Interrupt enabled

End of enumeration elements list.

ADC14LOIE : Interrupt enable for ADC14MEMx below comparator window
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : ADC14LOIE_0

Interrupt disabled

1 : ADC14LOIE_1

Interrupt enabled

End of enumeration elements list.

ADC14HIIE : Interrupt enable for ADC14MEMx above comparator window
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : ADC14HIIE_0

Interrupt disabled

1 : ADC14HIIE_1

Interrupt enabled

End of enumeration elements list.

ADC14OVIE : ADC14MEMx overflow-interrupt enable
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : ADC14OVIE_0

Interrupt disabled

1 : ADC14OVIE_1

Interrupt enabled

End of enumeration elements list.

ADC14TOVIE : ADC14 conversion-time-overflow interrupt enable
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ADC14TOVIE_0

Interrupt disabled

1 : ADC14TOVIE_1

Interrupt enabled

End of enumeration elements list.

ADC14RDYIE : ADC14 local buffered reference ready interrupt enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : ADC14RDYIE_0

Interrupt disabled

1 : ADC14RDYIE_1

Interrupt enabled

End of enumeration elements list.


MEM[%s] (ADC14MEM[24])

Conversion Memory Register
address_offset : 0x1420 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


IFGR0 (ADC14IFGR0)

Interrupt Flag 0 Register
address_offset : 0x144 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IFGR0 IFGR0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14IFG0 ADC14IFG1 ADC14IFG2 ADC14IFG3 ADC14IFG4 ADC14IFG5 ADC14IFG6 ADC14IFG7 ADC14IFG8 ADC14IFG9 ADC14IFG10 ADC14IFG11 ADC14IFG12 ADC14IFG13 ADC14IFG14 ADC14IFG15 ADC14IFG16 ADC14IFG17 ADC14IFG18 ADC14IFG19 ADC14IFG20 ADC14IFG21 ADC14IFG22 ADC14IFG23 ADC14IFG24 ADC14IFG25 ADC14IFG26 ADC14IFG27 ADC14IFG28 ADC14IFG29 ADC14IFG30 ADC14IFG31

ADC14IFG0 : ADC14MEM0 interrupt flag
bits : 0 - 0 (1 bit)
access : read-only

Enumeration: ADC14IFG0_enum_read ( read )

0 : ADC14IFG0_0

No interrupt pending

1 : ADC14IFG0_1

Interrupt pending

End of enumeration elements list.

ADC14IFG1 : ADC14MEM1 interrupt flag
bits : 1 - 1 (1 bit)
access : read-only

Enumeration: ADC14IFG1_enum_read ( read )

0 : ADC14IFG1_0

No interrupt pending

1 : ADC14IFG1_1

Interrupt pending

End of enumeration elements list.

ADC14IFG2 : ADC14MEM2 interrupt flag
bits : 2 - 2 (1 bit)
access : read-only

Enumeration: ADC14IFG2_enum_read ( read )

0 : ADC14IFG2_0

No interrupt pending

1 : ADC14IFG2_1

Interrupt pending

End of enumeration elements list.

ADC14IFG3 : ADC14MEM3 interrupt flag
bits : 3 - 3 (1 bit)
access : read-only

Enumeration: ADC14IFG3_enum_read ( read )

0 : ADC14IFG3_0

No interrupt pending

1 : ADC14IFG3_1

Interrupt pending

End of enumeration elements list.

ADC14IFG4 : ADC14MEM4 interrupt flag
bits : 4 - 4 (1 bit)
access : read-only

Enumeration: ADC14IFG4_enum_read ( read )

0 : ADC14IFG4_0

No interrupt pending

1 : ADC14IFG4_1

Interrupt pending

End of enumeration elements list.

ADC14IFG5 : ADC14MEM5 interrupt flag
bits : 5 - 5 (1 bit)
access : read-only

Enumeration: ADC14IFG5_enum_read ( read )

0 : ADC14IFG5_0

No interrupt pending

1 : ADC14IFG5_1

Interrupt pending

End of enumeration elements list.

ADC14IFG6 : ADC14MEM6 interrupt flag
bits : 6 - 6 (1 bit)
access : read-only

Enumeration: ADC14IFG6_enum_read ( read )

0 : ADC14IFG6_0

No interrupt pending

1 : ADC14IFG6_1

Interrupt pending

End of enumeration elements list.

ADC14IFG7 : ADC14MEM7 interrupt flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration: ADC14IFG7_enum_read ( read )

0 : ADC14IFG7_0

No interrupt pending

1 : ADC14IFG7_1

Interrupt pending

End of enumeration elements list.

ADC14IFG8 : ADC14MEM8 interrupt flag
bits : 8 - 8 (1 bit)
access : read-only

Enumeration: ADC14IFG8_enum_read ( read )

0 : ADC14IFG8_0

No interrupt pending

1 : ADC14IFG8_1

Interrupt pending

End of enumeration elements list.

ADC14IFG9 : ADC14MEM9 interrupt flag
bits : 9 - 9 (1 bit)
access : read-only

Enumeration: ADC14IFG9_enum_read ( read )

0 : ADC14IFG9_0

No interrupt pending

1 : ADC14IFG9_1

Interrupt pending

End of enumeration elements list.

ADC14IFG10 : ADC14MEM10 interrupt flag
bits : 10 - 10 (1 bit)
access : read-only

Enumeration: ADC14IFG10_enum_read ( read )

0 : ADC14IFG10_0

No interrupt pending

1 : ADC14IFG10_1

Interrupt pending

End of enumeration elements list.

ADC14IFG11 : ADC14MEM11 interrupt flag
bits : 11 - 11 (1 bit)
access : read-only

Enumeration: ADC14IFG11_enum_read ( read )

0 : ADC14IFG11_0

No interrupt pending

1 : ADC14IFG11_1

Interrupt pending

End of enumeration elements list.

ADC14IFG12 : ADC14MEM12 interrupt flag
bits : 12 - 12 (1 bit)
access : read-only

Enumeration: ADC14IFG12_enum_read ( read )

0 : ADC14IFG12_0

No interrupt pending

1 : ADC14IFG12_1

Interrupt pending

End of enumeration elements list.

ADC14IFG13 : ADC14MEM13 interrupt flag
bits : 13 - 13 (1 bit)
access : read-only

Enumeration: ADC14IFG13_enum_read ( read )

0 : ADC14IFG13_0

No interrupt pending

1 : ADC14IFG13_1

Interrupt pending

End of enumeration elements list.

ADC14IFG14 : ADC14MEM14 interrupt flag
bits : 14 - 14 (1 bit)
access : read-only

Enumeration: ADC14IFG14_enum_read ( read )

0 : ADC14IFG14_0

No interrupt pending

1 : ADC14IFG14_1

Interrupt pending

End of enumeration elements list.

ADC14IFG15 : ADC14MEM15 interrupt flag
bits : 15 - 15 (1 bit)
access : read-only

Enumeration: ADC14IFG15_enum_read ( read )

0 : ADC14IFG15_0

No interrupt pending

1 : ADC14IFG15_1

Interrupt pending

End of enumeration elements list.

ADC14IFG16 : ADC14MEM16 interrupt flag
bits : 16 - 16 (1 bit)
access : read-only

Enumeration: ADC14IFG16_enum_read ( read )

0 : ADC14IFG16_0

No interrupt pending

1 : ADC14IFG16_1

Interrupt pending

End of enumeration elements list.

ADC14IFG17 : ADC14MEM17 interrupt flag
bits : 17 - 17 (1 bit)
access : read-only

Enumeration: ADC14IFG17_enum_read ( read )

0 : ADC14IFG17_0

No interrupt pending

1 : ADC14IFG17_1

Interrupt pending

End of enumeration elements list.

ADC14IFG18 : ADC14MEM18 interrupt flag
bits : 18 - 18 (1 bit)
access : read-only

Enumeration: ADC14IFG18_enum_read ( read )

0 : ADC14IFG18_0

No interrupt pending

1 : ADC14IFG18_1

Interrupt pending

End of enumeration elements list.

ADC14IFG19 : ADC14MEM19 interrupt flag
bits : 19 - 19 (1 bit)
access : read-only

Enumeration: ADC14IFG19_enum_read ( read )

0 : ADC14IFG19_0

No interrupt pending

1 : ADC14IFG19_1

Interrupt pending

End of enumeration elements list.

ADC14IFG20 : ADC14MEM20 interrupt flag
bits : 20 - 20 (1 bit)
access : read-only

Enumeration: ADC14IFG20_enum_read ( read )

0 : ADC14IFG20_0

No interrupt pending

1 : ADC14IFG20_1

Interrupt pending

End of enumeration elements list.

ADC14IFG21 : ADC14MEM21 interrupt flag
bits : 21 - 21 (1 bit)
access : read-only

Enumeration: ADC14IFG21_enum_read ( read )

0 : ADC14IFG21_0

No interrupt pending

1 : ADC14IFG21_1

Interrupt pending

End of enumeration elements list.

ADC14IFG22 : ADC14MEM22 interrupt flag
bits : 22 - 22 (1 bit)
access : read-only

Enumeration: ADC14IFG22_enum_read ( read )

0 : ADC14IFG22_0

No interrupt pending

1 : ADC14IFG22_1

Interrupt pending

End of enumeration elements list.

ADC14IFG23 : ADC14MEM23 interrupt flag
bits : 23 - 23 (1 bit)
access : read-only

Enumeration: ADC14IFG23_enum_read ( read )

0 : ADC14IFG23_0

No interrupt pending

1 : ADC14IFG23_1

Interrupt pending

End of enumeration elements list.

ADC14IFG24 : ADC14MEM24 interrupt flag
bits : 24 - 24 (1 bit)
access : read-only

Enumeration: ADC14IFG24_enum_read ( read )

0 : ADC14IFG24_0

No interrupt pending

1 : ADC14IFG24_1

Interrupt pending

End of enumeration elements list.

ADC14IFG25 : ADC14MEM25 interrupt flag
bits : 25 - 25 (1 bit)
access : read-only

Enumeration: ADC14IFG25_enum_read ( read )

0 : ADC14IFG25_0

No interrupt pending

1 : ADC14IFG25_1

Interrupt pending

End of enumeration elements list.

ADC14IFG26 : ADC14MEM26 interrupt flag
bits : 26 - 26 (1 bit)
access : read-only

Enumeration: ADC14IFG26_enum_read ( read )

0 : ADC14IFG26_0

No interrupt pending

1 : ADC14IFG26_1

Interrupt pending

End of enumeration elements list.

ADC14IFG27 : ADC14MEM27 interrupt flag
bits : 27 - 27 (1 bit)
access : read-only

Enumeration: ADC14IFG27_enum_read ( read )

0 : ADC14IFG27_0

No interrupt pending

1 : ADC14IFG27_1

Interrupt pending

End of enumeration elements list.

ADC14IFG28 : ADC14MEM28 interrupt flag
bits : 28 - 28 (1 bit)
access : read-only

Enumeration: ADC14IFG28_enum_read ( read )

0 : ADC14IFG28_0

No interrupt pending

1 : ADC14IFG28_1

Interrupt pending

End of enumeration elements list.

ADC14IFG29 : ADC14MEM29 interrupt flag
bits : 29 - 29 (1 bit)
access : read-only

Enumeration: ADC14IFG29_enum_read ( read )

0 : ADC14IFG29_0

No interrupt pending

1 : ADC14IFG29_1

Interrupt pending

End of enumeration elements list.

ADC14IFG30 : ADC14MEM30 interrupt flag
bits : 30 - 30 (1 bit)
access : read-only

Enumeration: ADC14IFG30_enum_read ( read )

0 : ADC14IFG30_0

No interrupt pending

1 : ADC14IFG30_1

Interrupt pending

End of enumeration elements list.

ADC14IFG31 : ADC14MEM31 interrupt flag
bits : 31 - 31 (1 bit)
access : read-only

Enumeration: ADC14IFG31_enum_read ( read )

0 : ADC14IFG31_0

No interrupt pending

1 : ADC14IFG31_1

Interrupt pending

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[7])

Conversion Memory Control Register
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


IFGR1 (ADC14IFGR1)

Interrupt Flag 1 Register
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IFGR1 IFGR1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INIFG ADC14LOIFG ADC14HIIFG ADC14OVIFG ADC14TOVIFG ADC14RDYIFG

ADC14INIFG : Interrupt flag for ADC14MEMx within comparator window
bits : 1 - 1 (1 bit)
access : read-only

Enumeration: ADC14INIFG_enum_read ( read )

0 : ADC14INIFG_0

No interrupt pending

1 : ADC14INIFG_1

Interrupt pending

End of enumeration elements list.

ADC14LOIFG : Interrupt flag for ADC14MEMx below comparator window
bits : 2 - 2 (1 bit)
access : read-only

Enumeration: ADC14LOIFG_enum_read ( read )

0 : ADC14LOIFG_0

No interrupt pending

1 : ADC14LOIFG_1

Interrupt pending

End of enumeration elements list.

ADC14HIIFG : Interrupt flag for ADC14MEMx above comparator window
bits : 3 - 3 (1 bit)
access : read-only

Enumeration: ADC14HIIFG_enum_read ( read )

0 : ADC14HIIFG_0

No interrupt pending

1 : ADC14HIIFG_1

Interrupt pending

End of enumeration elements list.

ADC14OVIFG : ADC14MEMx overflow interrupt flag
bits : 4 - 4 (1 bit)
access : read-only

Enumeration: ADC14OVIFG_enum_read ( read )

0 : ADC14OVIFG_0

No interrupt pending

1 : ADC14OVIFG_1

Interrupt pending

End of enumeration elements list.

ADC14TOVIFG : ADC14 conversion time overflow interrupt flag
bits : 5 - 5 (1 bit)
access : read-only

Enumeration: ADC14TOVIFG_enum_read ( read )

0 : ADC14TOVIFG_0

No interrupt pending

1 : ADC14TOVIFG_1

Interrupt pending

End of enumeration elements list.

ADC14RDYIFG : ADC14 local buffered reference ready interrupt flag
bits : 6 - 6 (1 bit)
access : read-only

Enumeration: ADC14RDYIFG_enum_read ( read )

0 : ADC14RDYIFG_0

No interrupt pending

1 : ADC14RDYIFG_1

Interrupt pending

End of enumeration elements list.


CLRIFGR0 (ADC14CLRIFGR0)

Clear Interrupt Flag 0 Register
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CLRIFGR0 CLRIFGR0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLRADC14IFG0 CLRADC14IFG1 CLRADC14IFG2 CLRADC14IFG3 CLRADC14IFG4 CLRADC14IFG5 CLRADC14IFG6 CLRADC14IFG7 CLRADC14IFG8 CLRADC14IFG9 CLRADC14IFG10 CLRADC14IFG11 CLRADC14IFG12 CLRADC14IFG13 CLRADC14IFG14 CLRADC14IFG15 CLRADC14IFG16 CLRADC14IFG17 CLRADC14IFG18 CLRADC14IFG19 CLRADC14IFG20 CLRADC14IFG21 CLRADC14IFG22 CLRADC14IFG23 CLRADC14IFG24 CLRADC14IFG25 CLRADC14IFG26 CLRADC14IFG27 CLRADC14IFG28 CLRADC14IFG29 CLRADC14IFG30 CLRADC14IFG31

CLRADC14IFG0 : clear ADC14IFG0
bits : 0 - 0 (1 bit)
access : write-only

Enumeration: CLRADC14IFG0_enum_write ( write )

0 : CLRADC14IFG0_0

no effect

1 : CLRADC14IFG0_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG1 : clear ADC14IFG1
bits : 1 - 1 (1 bit)
access : write-only

Enumeration: CLRADC14IFG1_enum_write ( write )

0 : CLRADC14IFG1_0

no effect

1 : CLRADC14IFG1_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG2 : clear ADC14IFG2
bits : 2 - 2 (1 bit)
access : write-only

Enumeration: CLRADC14IFG2_enum_write ( write )

0 : CLRADC14IFG2_0

no effect

1 : CLRADC14IFG2_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG3 : clear ADC14IFG3
bits : 3 - 3 (1 bit)
access : write-only

Enumeration: CLRADC14IFG3_enum_write ( write )

0 : CLRADC14IFG3_0

no effect

1 : CLRADC14IFG3_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG4 : clear ADC14IFG4
bits : 4 - 4 (1 bit)
access : write-only

Enumeration: CLRADC14IFG4_enum_write ( write )

0 : CLRADC14IFG4_0

no effect

1 : CLRADC14IFG4_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG5 : clear ADC14IFG5
bits : 5 - 5 (1 bit)
access : write-only

Enumeration: CLRADC14IFG5_enum_write ( write )

0 : CLRADC14IFG5_0

no effect

1 : CLRADC14IFG5_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG6 : clear ADC14IFG6
bits : 6 - 6 (1 bit)
access : write-only

Enumeration: CLRADC14IFG6_enum_write ( write )

0 : CLRADC14IFG6_0

no effect

1 : CLRADC14IFG6_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG7 : clear ADC14IFG7
bits : 7 - 7 (1 bit)
access : write-only

Enumeration: CLRADC14IFG7_enum_write ( write )

0 : CLRADC14IFG7_0

no effect

1 : CLRADC14IFG7_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG8 : clear ADC14IFG8
bits : 8 - 8 (1 bit)
access : write-only

Enumeration: CLRADC14IFG8_enum_write ( write )

0 : CLRADC14IFG8_0

no effect

1 : CLRADC14IFG8_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG9 : clear ADC14IFG9
bits : 9 - 9 (1 bit)
access : write-only

Enumeration: CLRADC14IFG9_enum_write ( write )

0 : CLRADC14IFG9_0

no effect

1 : CLRADC14IFG9_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG10 : clear ADC14IFG10
bits : 10 - 10 (1 bit)
access : write-only

Enumeration: CLRADC14IFG10_enum_write ( write )

0 : CLRADC14IFG10_0

no effect

1 : CLRADC14IFG10_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG11 : clear ADC14IFG11
bits : 11 - 11 (1 bit)
access : write-only

Enumeration: CLRADC14IFG11_enum_write ( write )

0 : CLRADC14IFG11_0

no effect

1 : CLRADC14IFG11_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG12 : clear ADC14IFG12
bits : 12 - 12 (1 bit)
access : write-only

Enumeration: CLRADC14IFG12_enum_write ( write )

0 : CLRADC14IFG12_0

no effect

1 : CLRADC14IFG12_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG13 : clear ADC14IFG13
bits : 13 - 13 (1 bit)
access : write-only

Enumeration: CLRADC14IFG13_enum_write ( write )

0 : CLRADC14IFG13_0

no effect

1 : CLRADC14IFG13_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG14 : clear ADC14IFG14
bits : 14 - 14 (1 bit)
access : write-only

Enumeration: CLRADC14IFG14_enum_write ( write )

0 : CLRADC14IFG14_0

no effect

1 : CLRADC14IFG14_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG15 : clear ADC14IFG15
bits : 15 - 15 (1 bit)
access : write-only

Enumeration: CLRADC14IFG15_enum_write ( write )

0 : CLRADC14IFG15_0

no effect

1 : CLRADC14IFG15_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG16 : clear ADC14IFG16
bits : 16 - 16 (1 bit)
access : write-only

Enumeration: CLRADC14IFG16_enum_write ( write )

0 : CLRADC14IFG16_0

no effect

1 : CLRADC14IFG16_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG17 : clear ADC14IFG17
bits : 17 - 17 (1 bit)
access : write-only

Enumeration: CLRADC14IFG17_enum_write ( write )

0 : CLRADC14IFG17_0

no effect

1 : CLRADC14IFG17_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG18 : clear ADC14IFG18
bits : 18 - 18 (1 bit)
access : write-only

Enumeration: CLRADC14IFG18_enum_write ( write )

0 : CLRADC14IFG18_0

no effect

1 : CLRADC14IFG18_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG19 : clear ADC14IFG19
bits : 19 - 19 (1 bit)
access : write-only

Enumeration: CLRADC14IFG19_enum_write ( write )

0 : CLRADC14IFG19_0

no effect

1 : CLRADC14IFG19_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG20 : clear ADC14IFG20
bits : 20 - 20 (1 bit)
access : write-only

Enumeration: CLRADC14IFG20_enum_write ( write )

0 : CLRADC14IFG20_0

no effect

1 : CLRADC14IFG20_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG21 : clear ADC14IFG21
bits : 21 - 21 (1 bit)
access : write-only

Enumeration: CLRADC14IFG21_enum_write ( write )

0 : CLRADC14IFG21_0

no effect

1 : CLRADC14IFG21_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG22 : clear ADC14IFG22
bits : 22 - 22 (1 bit)
access : write-only

Enumeration: CLRADC14IFG22_enum_write ( write )

0 : CLRADC14IFG22_0

no effect

1 : CLRADC14IFG22_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG23 : clear ADC14IFG23
bits : 23 - 23 (1 bit)
access : write-only

Enumeration: CLRADC14IFG23_enum_write ( write )

0 : CLRADC14IFG23_0

no effect

1 : CLRADC14IFG23_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG24 : clear ADC14IFG24
bits : 24 - 24 (1 bit)
access : write-only

Enumeration: CLRADC14IFG24_enum_write ( write )

0 : CLRADC14IFG24_0

no effect

1 : CLRADC14IFG24_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG25 : clear ADC14IFG25
bits : 25 - 25 (1 bit)
access : write-only

Enumeration: CLRADC14IFG25_enum_write ( write )

0 : CLRADC14IFG25_0

no effect

1 : CLRADC14IFG25_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG26 : clear ADC14IFG26
bits : 26 - 26 (1 bit)
access : write-only

Enumeration: CLRADC14IFG26_enum_write ( write )

0 : CLRADC14IFG26_0

no effect

1 : CLRADC14IFG26_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG27 : clear ADC14IFG27
bits : 27 - 27 (1 bit)
access : write-only

Enumeration: CLRADC14IFG27_enum_write ( write )

0 : CLRADC14IFG27_0

no effect

1 : CLRADC14IFG27_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG28 : clear ADC14IFG28
bits : 28 - 28 (1 bit)
access : write-only

Enumeration: CLRADC14IFG28_enum_write ( write )

0 : CLRADC14IFG28_0

no effect

1 : CLRADC14IFG28_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG29 : clear ADC14IFG29
bits : 29 - 29 (1 bit)
access : write-only

Enumeration: CLRADC14IFG29_enum_write ( write )

0 : CLRADC14IFG29_0

no effect

1 : CLRADC14IFG29_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG30 : clear ADC14IFG30
bits : 30 - 30 (1 bit)
access : write-only

Enumeration: CLRADC14IFG30_enum_write ( write )

0 : CLRADC14IFG30_0

no effect

1 : CLRADC14IFG30_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14IFG31 : clear ADC14IFG31
bits : 31 - 31 (1 bit)
access : write-only

Enumeration: CLRADC14IFG31_enum_write ( write )

0 : CLRADC14IFG31_0

no effect

1 : CLRADC14IFG31_1

clear pending interrupt flag

End of enumeration elements list.


CLRIFGR1 (ADC14CLRIFGR1)

Clear Interrupt Flag 1 Register
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLRIFGR1 CLRIFGR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLRADC14INIFG CLRADC14LOIFG CLRADC14HIIFG CLRADC14OVIFG CLRADC14TOVIFG CLRADC14RDYIFG

CLRADC14INIFG : clear ADC14INIFG
bits : 1 - 1 (1 bit)
access : write-only

Enumeration: CLRADC14INIFG_enum_write ( write )

0 : CLRADC14INIFG_0

no effect

1 : CLRADC14INIFG_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14LOIFG : clear ADC14LOIFG
bits : 2 - 2 (1 bit)
access : write-only

Enumeration: CLRADC14LOIFG_enum_write ( write )

0 : CLRADC14LOIFG_0

no effect

1 : CLRADC14LOIFG_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14HIIFG : clear ADC14HIIFG
bits : 3 - 3 (1 bit)
access : write-only

Enumeration: CLRADC14HIIFG_enum_write ( write )

0 : CLRADC14HIIFG_0

no effect

1 : CLRADC14HIIFG_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14OVIFG : clear ADC14OVIFG
bits : 4 - 4 (1 bit)
access : write-only

Enumeration: CLRADC14OVIFG_enum_write ( write )

0 : CLRADC14OVIFG_0

no effect

1 : CLRADC14OVIFG_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14TOVIFG : clear ADC14TOVIFG
bits : 5 - 5 (1 bit)
access : write-only

Enumeration: CLRADC14TOVIFG_enum_write ( write )

0 : CLRADC14TOVIFG_0

no effect

1 : CLRADC14TOVIFG_1

clear pending interrupt flag

End of enumeration elements list.

CLRADC14RDYIFG : clear ADC14RDYIFG
bits : 6 - 6 (1 bit)
access : write-only

Enumeration: CLRADC14RDYIFG_enum_write ( write )

0 : CLRADC14RDYIFG_0

no effect

1 : CLRADC14RDYIFG_1

clear pending interrupt flag

End of enumeration elements list.


MEM[%s] (ADC14MEM[25])

Conversion Memory Register
address_offset : 0x151C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


IV (ADC14IV)

Interrupt Vector Register
address_offset : 0x154 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IV IV read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14IV

ADC14IV : ADC14 interrupt vector value
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

0 : ADC14IV_0

No interrupt pending

2 : ADC14IV_2

Interrupt Source: ADC14MEMx overflow Interrupt Flag: ADC14OVIFG Interrupt Priority: Highest

4 : ADC14IV_4

Interrupt Source: Conversion time overflow Interrupt Flag: ADC14TOVIFG

6 : ADC14IV_6

Interrupt Source: ADC14 window high interrupt flag Interrupt Flag: ADC14HIIFG

8 : ADC14IV_8

Interrupt Source: ADC14 window low interrupt flag Interrupt Flag: ADC14LOIFG

10 : ADC14IV_10

Interrupt Source: ADC14 in-window interrupt flag Interrupt Flag: ADC14INIFG

12 : ADC14IV_12

Interrupt Source: ADC14MEM0 interrupt flag Interrupt Flag: ADC14IFG0

14 : ADC14IV_14

Interrupt Source: ADC14MEM1 interrupt flag Interrupt Flag: ADC14IFG1

16 : ADC14IV_16

Interrupt Source: ADC14MEM2 interrupt flag Interrupt Flag: ADC14IFG2

18 : ADC14IV_18

Interrupt Source: ADC14MEM3 interrupt flag Interrupt Flag: ADC14IFG3

20 : ADC14IV_20

Interrupt Source: ADC14MEM4 interrupt flag Interrupt Flag: ADC14IFG4

22 : ADC14IV_22

Interrupt Source: ADC14MEM5 interrupt flag Interrupt Flag: ADC14IFG5

24 : ADC14IV_24

Interrupt Source: ADC14MEM6 interrupt flag Interrupt Flag: ADC14IFG6

26 : ADC14IV_26

Interrupt Source: ADC14MEM7 interrupt flag Interrupt Flag: ADC14IFG7

28 : ADC14IV_28

Interrupt Source: ADC14MEM8 interrupt flag Interrupt Flag: ADC14IFG8

30 : ADC14IV_30

Interrupt Source: ADC14MEM9 interrupt flag Interrupt Flag: ADC14IFG9

32 : ADC14IV_32

Interrupt Source: ADC14MEM10 interrupt flag Interrupt Flag: ADC14IFG10

34 : ADC14IV_34

Interrupt Source: ADC14MEM11 interrupt flag Interrupt Flag: ADC14IFG11

36 : ADC14IV_36

Interrupt Source: ADC14MEM12 interrupt flag Interrupt Flag: ADC14IFG12

38 : ADC14IV_38

Interrupt Source: ADC14MEM13 interrupt flag Interrupt Flag: ADC14IFG13

40 : ADC14IV_40

Interrupt Source: ADC14MEM14 interrupt flag Interrupt Flag: ADC14IFG14

42 : ADC14IV_42

Interrupt Source: ADC14MEM15 interrupt flag Interrupt Flag: ADC14IFG15

44 : ADC14IV_44

Interrupt Source: ADC14MEM16 interrupt flag Interrupt Flag: ADC14IFG16

46 : ADC14IV_46

Interrupt Source: ADC14MEM17 interrupt flag Interrupt Flag: ADC14IFG17

48 : ADC14IV_48

Interrupt Source: ADC14MEM18 interrupt flag Interrupt Flag: ADC14IFG18

50 : ADC14IV_50

Interrupt Source: ADC14MEM19 interrupt flag Interrupt Flag: ADC14IFG19

52 : ADC14IV_52

Interrupt Source: ADC14MEM20 interrupt flag Interrupt Flag: ADC14IFG20

54 : ADC14IV_54

Interrupt Source: ADC14MEM22 interrupt flag Interrupt Flag: ADC14IFG22

56 : ADC14IV_56

Interrupt Source: ADC14MEM22 interrupt flag Interrupt Flag: ADC14IFG22

58 : ADC14IV_58

Interrupt Source: ADC14MEM23 interrupt flag Interrupt Flag: ADC14IFG23

60 : ADC14IV_60

Interrupt Source: ADC14MEM24 interrupt flag Interrupt Flag: ADC14IFG24

62 : ADC14IV_62

Interrupt Source: ADC14MEM25 interrupt flag Interrupt Flag: ADC14IFG25

64 : ADC14IV_64

Interrupt Source: ADC14MEM26 interrupt flag Interrupt Flag: ADC14IFG26

66 : ADC14IV_66

Interrupt Source: ADC14MEM27 interrupt flag Interrupt Flag: ADC14IFG27

68 : ADC14IV_68

Interrupt Source: ADC14MEM28 interrupt flag Interrupt Flag: ADC14IFG28

70 : ADC14IV_70

Interrupt Source: ADC14MEM29 interrupt flag Interrupt Flag: ADC14IFG29

72 : ADC14IV_72

Interrupt Source: ADC14MEM30 interrupt flag Interrupt Flag: ADC14IFG30

74 : ADC14IV_74

Interrupt Source: ADC14MEM31 interrupt flag Interrupt Flag: ADC14IFG31

76 : ADC14IV_76

Interrupt Source: ADC14RDYIFG interrupt flag Interrupt Flag: ADC14RDYIFG Interrupt Priority: Lowest

End of enumeration elements list.


MEM[%s] (ADC14MEM[26])

Conversion Memory Register
address_offset : 0x161C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM[%s] (ADC14MEM[27])

Conversion Memory Register
address_offset : 0x1720 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MCTL0 (ADC14MCTL0)

Conversion Memory Control Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL0 MCTL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[8])

Conversion Memory Control Register
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MEM[%s] (ADC14MEM[28])

Conversion Memory Register
address_offset : 0x1828 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM[%s] (ADC14MEM[29])

Conversion Memory Register
address_offset : 0x1934 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM[%s] (ADC14MEM[30])

Conversion Memory Register
address_offset : 0x1A44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM[%s] (ADC14MEM[31])

Conversion Memory Register
address_offset : 0x1B58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MCTL[%s] (ADC14MCTL[9])

Conversion Memory Control Register
address_offset : 0x1BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL1 (ADC14MCTL1)

Conversion Memory Control Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL1 MCTL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MEM[%s] (ADC14MEM[1])

Conversion Memory Register
address_offset : 0x1CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MCTL[%s] (ADC14MCTL[10])

Conversion Memory Control Register
address_offset : 0x1FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL2 (ADC14MCTL2)

Conversion Memory Control Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL2 MCTL2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL3 (ADC14MCTL3)

Conversion Memory Control Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL3 MCTL3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[11])

Conversion Memory Control Register
address_offset : 0x240 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MEM[%s] (ADC14MEM[2])

Conversion Memory Register
address_offset : 0x26C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MCTL4 (ADC14MCTL4)

Conversion Memory Control Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL4 MCTL4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[12])

Conversion Memory Control Register
address_offset : 0x288 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL5 (ADC14MCTL5)

Conversion Memory Control Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL5 MCTL5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[13])

Conversion Memory Control Register
address_offset : 0x2D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[0])

Conversion Memory Control Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL6 (ADC14MCTL6)

Conversion Memory Control Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL6 MCTL6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MEM[%s] (ADC14MEM[3])

Conversion Memory Register
address_offset : 0x310 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MCTL[%s] (ADC14MCTL[14])

Conversion Memory Control Register
address_offset : 0x324 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL7 (ADC14MCTL7)

Conversion Memory Control Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL7 MCTL7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[15])

Conversion Memory Control Register
address_offset : 0x378 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL8 (ADC14MCTL8)

Conversion Memory Control Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL8 MCTL8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MEM[%s] (ADC14MEM[4])

Conversion Memory Register
address_offset : 0x3B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MCTL9 (ADC14MCTL9)

Conversion Memory Control Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL9 MCTL9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[16])

Conversion Memory Control Register
address_offset : 0x3D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


CTL1 (ADC14CTL1)

Control 1 Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTL1 CTL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14PWRMD ADC14REFBURST ADC14DF ADC14RES ADC14CSTARTADD ADC14BATMAP ADC14TCMAP ADC14CH0MAP ADC14CH1MAP ADC14CH2MAP ADC14CH3MAP

ADC14PWRMD : ADC14 power modes
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : ADC14PWRMD_0

Regular power mode for use with any resolution setting. Sample rate can be up to 1 Msps.

2 : ADC14PWRMD_2

Low-power mode for 12-bit, 10-bit, and 8-bit resolution settings. Sample rate must not exceed 200 ksps.

End of enumeration elements list.

ADC14REFBURST : ADC14 reference buffer burst
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : ADC14REFBURST_0

ADC reference buffer on continuously

1 : ADC14REFBURST_1

ADC reference buffer on only during sample-and-conversion

End of enumeration elements list.

ADC14DF : ADC14 data read-back format
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : ADC14DF_0

Binary unsigned. Theoretically, for ADC14DIF = 0 and 14-bit mode, the analog input voltage - V(REF) results in 0000h, and the analog input voltage + V(REF) results in 3FFFh

1 : ADC14DF_1

Signed binary (2s complement), left aligned. Theoretically, for ADC14DIF = 0 and 14-bit mode, the analog input voltage - V(REF) results in 8000h, and the analog input voltage + V(REF) results in 7FFCh

End of enumeration elements list.

ADC14RES : ADC14 resolution
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : ADC14RES_0

8 bit (9 clock cycle conversion time)

1 : ADC14RES_1

10 bit (11 clock cycle conversion time)

2 : ADC14RES_2

12 bit (14 clock cycle conversion time)

3 : ADC14RES_3

14 bit (16 clock cycle conversion time)

End of enumeration elements list.

ADC14CSTARTADD : ADC14 conversion start address
bits : 16 - 20 (5 bit)
access : read-write

ADC14BATMAP : Controls 1/2 AVCC ADC input channel selection
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

0 : ADC14BATMAP_0

ADC internal 1/2 x AVCC channel is not selected for ADC

1 : ADC14BATMAP_1

ADC internal 1/2 x AVCC channel is selected for ADC input channel MAX

End of enumeration elements list.

ADC14TCMAP : Controls temperature sensor ADC input channel selection
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

0 : ADC14TCMAP_0

ADC internal temperature sensor channel is not selected for ADC

1 : ADC14TCMAP_1

ADC internal temperature sensor channel is selected for ADC input channel MAX-1

End of enumeration elements list.

ADC14CH0MAP : Controls internal channel 0 selection to ADC input channel MAX-2
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

0 : ADC14CH0MAP_0

ADC input channel internal 0 is not selected

1 : ADC14CH0MAP_1

ADC input channel internal 0 is selected for ADC input channel MAX-2

End of enumeration elements list.

ADC14CH1MAP : Controls internal channel 1 selection to ADC input channel MAX-3
bits : 25 - 25 (1 bit)
access : read-write

Enumeration:

0 : ADC14CH1MAP_0

ADC input channel internal 1 is not selected

1 : ADC14CH1MAP_1

ADC input channel internal 1 is selected for ADC input channel MAX-3

End of enumeration elements list.

ADC14CH2MAP : Controls internal channel 2 selection to ADC input channel MAX-4
bits : 26 - 26 (1 bit)
access : read-write

Enumeration:

0 : ADC14CH2MAP_0

ADC input channel internal 2 is not selected

1 : ADC14CH2MAP_1

ADC input channel internal 2 is selected for ADC input channel MAX-4

End of enumeration elements list.

ADC14CH3MAP : Controls internal channel 3 selection to ADC input channel MAX-5
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

0 : ADC14CH3MAP_0

ADC input channel internal 3 is not selected

1 : ADC14CH3MAP_1

ADC input channel internal 3 is selected for ADC input channel MAX-5

End of enumeration elements list.


MCTL10 (ADC14MCTL10)

Conversion Memory Control Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL10 MCTL10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[17])

Conversion Memory Control Register
address_offset : 0x42C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL11 (ADC14MCTL11)

Conversion Memory Control Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL11 MCTL11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MEM[%s] (ADC14MEM[5])

Conversion Memory Register
address_offset : 0x464 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MCTL12 (ADC14MCTL12)

Conversion Memory Control Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL12 MCTL12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[18])

Conversion Memory Control Register
address_offset : 0x48C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[1])

Conversion Memory Control Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL13 (ADC14MCTL13)

Conversion Memory Control Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL13 MCTL13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[19])

Conversion Memory Control Register
address_offset : 0x4F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL14 (ADC14MCTL14)

Conversion Memory Control Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL14 MCTL14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MEM[%s] (ADC14MEM[6])

Conversion Memory Register
address_offset : 0x514 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MCTL15 (ADC14MCTL15)

Conversion Memory Control Register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL15 MCTL15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[20])

Conversion Memory Control Register
address_offset : 0x558 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL16 (ADC14MCTL16)

Conversion Memory Control Register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL16 MCTL16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL17 (ADC14MCTL17)

Conversion Memory Control Register
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL17 MCTL17 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[21])

Conversion Memory Control Register
address_offset : 0x5C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MEM[%s] (ADC14MEM[7])

Conversion Memory Register
address_offset : 0x5C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MCTL18 (ADC14MCTL18)

Conversion Memory Control Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL18 MCTL18 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[22])

Conversion Memory Control Register
address_offset : 0x634 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL19 (ADC14MCTL19)

Conversion Memory Control Register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL19 MCTL19 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL20 (ADC14MCTL20)

Conversion Memory Control Register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL20 MCTL20 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MEM[%s] (ADC14MEM[8])

Conversion Memory Register
address_offset : 0x680 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MCTL[%s] (ADC14MCTL[23])

Conversion Memory Control Register
address_offset : 0x6A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[2])

Conversion Memory Control Register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL21 (ADC14MCTL21)

Conversion Memory Control Register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL21 MCTL21 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL22 (ADC14MCTL22)

Conversion Memory Control Register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL22 MCTL22 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[24])

Conversion Memory Control Register
address_offset : 0x720 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MEM[%s] (ADC14MEM[9])

Conversion Memory Register
address_offset : 0x73C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MCTL23 (ADC14MCTL23)

Conversion Memory Control Register
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL23 MCTL23 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL24 (ADC14MCTL24)

Conversion Memory Control Register
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL24 MCTL24 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[25])

Conversion Memory Control Register
address_offset : 0x79C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL25 (ADC14MCTL25)

Conversion Memory Control Register
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL25 MCTL25 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MEM[%s] (ADC14MEM[10])

Conversion Memory Register
address_offset : 0x7FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


LO0 (ADC14LO0)

Window Comparator Low Threshold 0 Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LO0 LO0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14LO0

ADC14LO0 : Low threshold 0
bits : 0 - 15 (16 bit)
access : read-write


MCTL26 (ADC14MCTL26)

Conversion Memory Control Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL26 MCTL26 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[26])

Conversion Memory Control Register
address_offset : 0x81C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL27 (ADC14MCTL27)

Conversion Memory Control Register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL27 MCTL27 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL28 (ADC14MCTL28)

Conversion Memory Control Register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL28 MCTL28 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[27])

Conversion Memory Control Register
address_offset : 0x8A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL29 (ADC14MCTL29)

Conversion Memory Control Register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL29 MCTL29 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MEM[%s] (ADC14MEM[11])

Conversion Memory Register
address_offset : 0x8C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MCTL[%s] (ADC14MCTL[3])

Conversion Memory Control Register
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL30 (ADC14MCTL30)

Conversion Memory Control Register
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL30 MCTL30 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL[%s] (ADC14MCTL[28])

Conversion Memory Control Register
address_offset : 0x928 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MCTL31 (ADC14MCTL31)

Conversion Memory Control Register
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL31 MCTL31 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1 If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3 If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5 If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7 If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9 If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11 If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13 If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15 If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17 If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19 If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21 If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23 If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25 If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27 If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29 If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31 If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MEM0 (ADC14MEM0)

Conversion Memory Register
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM0 MEM0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM[%s] (ADC14MEM[12])

Conversion Memory Register
address_offset : 0x988 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MCTL[%s] (ADC14MCTL[29])

Conversion Memory Control Register
address_offset : 0x9B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MEM1 (ADC14MEM1)

Conversion Memory Register
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM1 MEM1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM2 (ADC14MEM2)

Conversion Memory Register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM2 MEM2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM3 (ADC14MEM3)

Conversion Memory Register
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM3 MEM3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MCTL[%s] (ADC14MCTL[30])

Conversion Memory Control Register
address_offset : 0xA44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MEM[%s] (ADC14MEM[13])

Conversion Memory Register
address_offset : 0xA54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM4 (ADC14MEM4)

Conversion Memory Register
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM4 MEM4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM5 (ADC14MEM5)

Conversion Memory Register
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM5 MEM5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MCTL[%s] (ADC14MCTL[31])

Conversion Memory Control Register
address_offset : 0xAD8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MEM6 (ADC14MEM6)

Conversion Memory Register
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM6 MEM6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM[%s] (ADC14MEM[14])

Conversion Memory Register
address_offset : 0xB24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM7 (ADC14MEM7)

Conversion Memory Register
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM7 MEM7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MCTL[%s] (ADC14MCTL[4])

Conversion Memory Control Register
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MEM8 (ADC14MEM8)

Conversion Memory Register
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM8 MEM8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM9 (ADC14MEM9)

Conversion Memory Register
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM9 MEM9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM[%s] (ADC14MEM[15])

Conversion Memory Register
address_offset : 0xBF8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


HI0 (ADC14HI0)

Window Comparator High Threshold 0 Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HI0 HI0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14HI0

ADC14HI0 : High threshold 0
bits : 0 - 15 (16 bit)
access : read-write


MEM10 (ADC14MEM10)

Conversion Memory Register
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM10 MEM10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM11 (ADC14MEM11)

Conversion Memory Register
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM11 MEM11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM12 (ADC14MEM12)

Conversion Memory Register
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM12 MEM12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM13 (ADC14MEM13)

Conversion Memory Register
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM13 MEM13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM[%s] (ADC14MEM[16])

Conversion Memory Register
address_offset : 0xCD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM14 (ADC14MEM14)

Conversion Memory Register
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM14 MEM14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM15 (ADC14MEM15)

Conversion Memory Register
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM15 MEM15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM16 (ADC14MEM16)

Conversion Memory Register
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM16 MEM16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM[%s] (ADC14MEM[17])

Conversion Memory Register
address_offset : 0xDAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM17 (ADC14MEM17)

Conversion Memory Register
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM17 MEM17 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM18 (ADC14MEM18)

Conversion Memory Register
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM18 MEM18 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MCTL[%s] (ADC14MCTL[5])

Conversion Memory Control Register
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCTL[%s] MCTL[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC14INCH ADC14EOS ADC14VRSEL ADC14DIF ADC14WINC ADC14WINCTH

ADC14INCH : Input channel select
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

0 : ADC14INCH_0

If ADC14DIF = 0: A0; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

1 : ADC14INCH_1

If ADC14DIF = 0: A1; If ADC14DIF = 1: Ain+ = A0, Ain- = A1

2 : ADC14INCH_2

If ADC14DIF = 0: A2; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

3 : ADC14INCH_3

If ADC14DIF = 0: A3; If ADC14DIF = 1: Ain+ = A2, Ain- = A3

4 : ADC14INCH_4

If ADC14DIF = 0: A4; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

5 : ADC14INCH_5

If ADC14DIF = 0: A5; If ADC14DIF = 1: Ain+ = A4, Ain- = A5

6 : ADC14INCH_6

If ADC14DIF = 0: A6; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

7 : ADC14INCH_7

If ADC14DIF = 0: A7; If ADC14DIF = 1: Ain+ = A6, Ain- = A7

8 : ADC14INCH_8

If ADC14DIF = 0: A8; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

9 : ADC14INCH_9

If ADC14DIF = 0: A9; If ADC14DIF = 1: Ain+ = A8, Ain- = A9

10 : ADC14INCH_10

If ADC14DIF = 0: A10; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

11 : ADC14INCH_11

If ADC14DIF = 0: A11; If ADC14DIF = 1: Ain+ = A10, Ain- = A11

12 : ADC14INCH_12

If ADC14DIF = 0: A12; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

13 : ADC14INCH_13

If ADC14DIF = 0: A13; If ADC14DIF = 1: Ain+ = A12, Ain- = A13

14 : ADC14INCH_14

If ADC14DIF = 0: A14; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

15 : ADC14INCH_15

If ADC14DIF = 0: A15; If ADC14DIF = 1: Ain+ = A14, Ain- = A15

16 : ADC14INCH_16

If ADC14DIF = 0: A16; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

17 : ADC14INCH_17

If ADC14DIF = 0: A17; If ADC14DIF = 1: Ain+ = A16, Ain- = A17

18 : ADC14INCH_18

If ADC14DIF = 0: A18; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

19 : ADC14INCH_19

If ADC14DIF = 0: A19; If ADC14DIF = 1: Ain+ = A18, Ain- = A19

20 : ADC14INCH_20

If ADC14DIF = 0: A20; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

21 : ADC14INCH_21

If ADC14DIF = 0: A21; If ADC14DIF = 1: Ain+ = A20, Ain- = A21

22 : ADC14INCH_22

If ADC14DIF = 0: A22; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

23 : ADC14INCH_23

If ADC14DIF = 0: A23; If ADC14DIF = 1: Ain+ = A22, Ain- = A23

24 : ADC14INCH_24

If ADC14DIF = 0: A24; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

25 : ADC14INCH_25

If ADC14DIF = 0: A25; If ADC14DIF = 1: Ain+ = A24, Ain- = A25

26 : ADC14INCH_26

If ADC14DIF = 0: A26; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

27 : ADC14INCH_27

If ADC14DIF = 0: A27; If ADC14DIF = 1: Ain+ = A26, Ain- = A27

28 : ADC14INCH_28

If ADC14DIF = 0: A28; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

29 : ADC14INCH_29

If ADC14DIF = 0: A29; If ADC14DIF = 1: Ain+ = A28, Ain- = A29

30 : ADC14INCH_30

If ADC14DIF = 0: A30; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

31 : ADC14INCH_31

If ADC14DIF = 0: A31; If ADC14DIF = 1: Ain+ = A30, Ain- = A31

End of enumeration elements list.

ADC14EOS : End of sequence
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : ADC14EOS_0

Not end of sequence

1 : ADC14EOS_1

End of sequence

End of enumeration elements list.

ADC14VRSEL : Selects combinations of V(R+) and V(R-) sources
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : ADC14VRSEL_0

V(R+) = AVCC, V(R-) = AVSS

1 : ADC14VRSEL_1

V(R+) = VREF buffered, V(R-) = AVSS

14 : ADC14VRSEL_14

V(R+) = VeREF+, V(R-) = VeREF-

15 : ADC14VRSEL_15

V(R+) = VeREF+ buffered, V(R-) = VeREF

End of enumeration elements list.

ADC14DIF : Differential mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : ADC14DIF_0

Single-ended mode enabled

1 : ADC14DIF_1

Differential mode enabled

End of enumeration elements list.

ADC14WINC : Comparator window enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINC_0

Comparator window disabled

1 : ADC14WINC_1

Comparator window enabled

End of enumeration elements list.

ADC14WINCTH : Window comparator threshold register selection
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : ADC14WINCTH_0

Use window comparator thresholds 0, ADC14LO0 and ADC14HI0

1 : ADC14WINCTH_1

Use window comparator thresholds 1, ADC14LO1 and ADC14HI1

End of enumeration elements list.


MEM19 (ADC14MEM19)

Conversion Memory Register
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM19 MEM19 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM20 (ADC14MEM20)

Conversion Memory Register
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM20 MEM20 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM[%s] (ADC14MEM[18])

Conversion Memory Register
address_offset : 0xE8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM21 (ADC14MEM21)

Conversion Memory Register
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM21 MEM21 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM22 (ADC14MEM22)

Conversion Memory Register
address_offset : 0xF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM22 MEM22 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM23 (ADC14MEM23)

Conversion Memory Register
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM23 MEM23 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM[%s] (ADC14MEM[19])

Conversion Memory Register
address_offset : 0xF70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM[%s] MEM[%s] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM24 (ADC14MEM24)

Conversion Memory Register
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM24 MEM24 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write


MEM25 (ADC14MEM25)

Conversion Memory Register
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM25 MEM25 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Conversion_Results

Conversion_Results : Conversion Result
bits : 0 - 15 (16 bit)
access : read-write



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