Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0xE byte (0x0)
mem_usage : registers
protection : not protected
Watchdog Timer Control Register
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WDTIS : Watchdog timer interval select
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0 : WDTIS_0
Watchdog clock source / (2^(31)) (18:12:16 at 32.768 kHz)
1 : WDTIS_1
Watchdog clock source /(2^(27)) (01:08:16 at 32.768 kHz)
2 : WDTIS_2
Watchdog clock source /(2^(23)) (00:04:16 at 32.768 kHz)
3 : WDTIS_3
Watchdog clock source /(2^(19)) (00:00:16 at 32.768 kHz)
4 : WDTIS_4
Watchdog clock source /(2^(15)) (1 s at 32.768 kHz)
5 : WDTIS_5
Watchdog clock source / (2^(13)) (250 ms at 32.768 kHz)
6 : WDTIS_6
Watchdog clock source / (2^(9)) (15.625 ms at 32.768 kHz)
7 : WDTIS_7
Watchdog clock source / (2^(6)) (1.95 ms at 32.768 kHz)
End of enumeration elements list.
WDTCNTCL : Watchdog timer counter clear
bits : 3 - 3 (1 bit)
access : write-only
Enumeration: WDTCNTCL_enum_write ( write )
0 : WDTCNTCL_0
No action
1 : WDTCNTCL_1
WDTCNT = 0000h
End of enumeration elements list.
WDTTMSEL : Watchdog timer mode select
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : WDTTMSEL_0
Watchdog mode
1 : WDTTMSEL_1
Interval timer mode
End of enumeration elements list.
WDTSSEL : Watchdog timer clock source select
bits : 5 - 6 (2 bit)
access : read-write
Enumeration:
0 : WDTSSEL_0
SMCLK
1 : WDTSSEL_1
ACLK
2 : WDTSSEL_2
VLOCLK
3 : WDTSSEL_3
BCLK
End of enumeration elements list.
WDTHOLD : Watchdog timer hold
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
0 : WDTHOLD_0
Watchdog timer is not stopped
1 : WDTHOLD_1
Watchdog timer is stopped
End of enumeration elements list.
WDTPW : Watchdog timer password
bits : 8 - 15 (8 bit)
access : read-write
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