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CS

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x68 byte (0x0)
mem_usage : registers
protection : not protected

Registers

KEY (CSKEY)

CTL3 (CSCTL3)

CLKEN (CSCLKEN)

STAT (CSSTAT)

CTL0 (CSCTL0)

IE (CSIE)

IFG (CSIFG)

CLRIFG (CSCLRIFG)

SETIFG (CSSETIFG)

DCOERCAL0 (CSDCOERCAL0)

DCOERCAL1 (CSDCOERCAL1)

CTL1 (CSCTL1)

CTL2 (CSCTL2)


KEY (CSKEY)

Key Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEY KEY read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CSKEY

CSKEY : Write xxxx_695Ah to unlock
bits : 0 - 15 (16 bit)
access : read-write


CTL3 (CSCTL3)

Control 3 Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTL3 CTL3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FCNTLF RFCNTLF FCNTLF_EN FCNTHF RFCNTHF FCNTHF_EN FCNTHF2 RFCNTHF2 FCNTHF2_EN

FCNTLF : Start flag counter for LFXT
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : FCNTLF_0

4096 cycles

1 : FCNTLF_1

8192 cycles

2 : FCNTLF_2

16384 cycles

3 : FCNTLF_3

32768 cycles

End of enumeration elements list.

RFCNTLF : Reset start fault counter for LFXT
bits : 2 - 2 (1 bit)
access : write-only

Enumeration: RFCNTLF_enum_write ( write )

0 : RFCNTLF_0

Not applicable. Always reads as zero due to self clearing.

1 : RFCNTLF_1

Restarts the counter immediately.

End of enumeration elements list.

FCNTLF_EN : Enable start fault counter for LFXT
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : FCNTLF_EN_0

Startup fault counter disabled. Counter is cleared.

1 : FCNTLF_EN_1

Startup fault counter enabled.

End of enumeration elements list.

FCNTHF : Start flag counter for HFXT
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : FCNTHF_0

2048 cycles

1 : FCNTHF_1

4096 cycles

2 : FCNTHF_2

8192 cycles

3 : FCNTHF_3

16384 cycles

End of enumeration elements list.

RFCNTHF : Reset start fault counter for HFXT
bits : 6 - 6 (1 bit)
access : write-only

Enumeration: RFCNTHF_enum_write ( write )

0 : RFCNTHF_0

Not applicable. Always reads as zero due to self clearing.

1 : RFCNTHF_1

Restarts the counter immediately.

End of enumeration elements list.

FCNTHF_EN : Enable start fault counter for HFXT
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : FCNTHF_EN_0

Startup fault counter disabled. Counter is cleared.

1 : FCNTHF_EN_1

Startup fault counter enabled.

End of enumeration elements list.

FCNTHF2 : Start flag counter for HFXT2
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : FCNTHF2_0

2048 cycles

1 : FCNTHF2_1

4096 cycles

2 : FCNTHF2_2

8192 cycles

3 : FCNTHF2_3

16384 cycles

End of enumeration elements list.

RFCNTHF2 : Reset start fault counter for HFXT2
bits : 10 - 10 (1 bit)
access : write-only

Enumeration: RFCNTHF2_enum_write ( write )

0 : RFCNTHF2_0

Not applicable. Always reads as zero due to self clearing.

1 : RFCNTHF2_1

Restarts the counter immediately.

End of enumeration elements list.

FCNTHF2_EN : Enable start fault counter for HFXT2
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

0 : FCNTHF2_EN_0

Startup fault counter disabled. Counter is cleared.

1 : FCNTHF2_EN_1

Startup fault counter enabled.

End of enumeration elements list.


CLKEN (CSCLKEN)

Clock Enable Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLKEN CLKEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACLK_EN MCLK_EN HSMCLK_EN SMCLK_EN VLO_EN REFO_EN MODOSC_EN REFOFSEL

ACLK_EN : ACLK system clock conditional request enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : ACLK_EN_0

ACLK disabled regardless of conditional clock requests

1 : ACLK_EN_1

ACLK enabled based on any conditional clock requests

End of enumeration elements list.

MCLK_EN : MCLK system clock conditional request enable
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : MCLK_EN_0

MCLK disabled regardless of conditional clock requests

1 : MCLK_EN_1

MCLK enabled based on any conditional clock requests

End of enumeration elements list.

HSMCLK_EN : HSMCLK system clock conditional request enable
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : HSMCLK_EN_0

HSMCLK disabled regardless of conditional clock requests

1 : HSMCLK_EN_1

HSMCLK enabled based on any conditional clock requests

End of enumeration elements list.

SMCLK_EN : SMCLK system clock conditional request enable
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : SMCLK_EN_0

SMCLK disabled regardless of conditional clock requests.

1 : SMCLK_EN_1

SMCLK enabled based on any conditional clock requests

End of enumeration elements list.

VLO_EN : Turns on the VLO oscillator
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

0 : VLO_EN_0

VLO is on only if it is used as a source for ACLK, MCLK, HSMCLK or SMCLK.

1 : VLO_EN_1

VLO is on

End of enumeration elements list.

REFO_EN : Turns on the REFO oscillator
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

0 : REFO_EN_0

REFO is on only if it is used as a source for ACLK, MCLK, HSMCLK or SMCLK

1 : REFO_EN_1

REFO is on

End of enumeration elements list.

MODOSC_EN : Turns on the MODOSC oscillator
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

0 : MODOSC_EN_0

MODOSC is on only if it is used as a source for ACLK, MCLK, HSMCLK or SMCLK

1 : MODOSC_EN_1

MODOSC is on

End of enumeration elements list.

REFOFSEL : Selects REFO nominal frequency
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : REFOFSEL_0

32 kHz

1 : REFOFSEL_1

128 kHz

End of enumeration elements list.


STAT (CSSTAT)

Status Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STAT STAT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCO_ON DCOBIAS_ON HFXT_ON HFXT2_ON MODOSC_ON VLO_ON LFXT_ON REFO_ON ACLK_ON MCLK_ON HSMCLK_ON SMCLK_ON MODCLK_ON VLOCLK_ON LFXTCLK_ON REFOCLK_ON ACLK_READY MCLK_READY HSMCLK_READY SMCLK_READY BCLK_READY

DCO_ON : DCO status
bits : 0 - 0 (1 bit)
access : read-only

Enumeration: DCO_ON_enum_read ( read )

0 : DCO_ON_0

Inactive

1 : DCO_ON_1

Active

End of enumeration elements list.

DCOBIAS_ON : DCO bias status
bits : 1 - 1 (1 bit)
access : read-only

Enumeration: DCOBIAS_ON_enum_read ( read )

0 : DCOBIAS_ON_0

Inactive

1 : DCOBIAS_ON_1

Active

End of enumeration elements list.

HFXT_ON : HFXT status
bits : 2 - 2 (1 bit)
access : read-only

Enumeration: HFXT_ON_enum_read ( read )

0 : HFXT_ON_0

Inactive

1 : HFXT_ON_1

Active

End of enumeration elements list.

HFXT2_ON : HFXT2 status
bits : 3 - 3 (1 bit)
access : read-only

Enumeration: HFXT2_ON_enum_read ( read )

0 : HFXT2_ON_0

Inactive

1 : HFXT2_ON_1

Active

End of enumeration elements list.

MODOSC_ON : MODOSC status
bits : 4 - 4 (1 bit)
access : read-only

Enumeration: MODOSC_ON_enum_read ( read )

0 : MODOSC_ON_0

Inactive

1 : MODOSC_ON_1

Active

End of enumeration elements list.

VLO_ON : VLO status
bits : 5 - 5 (1 bit)
access : read-only

Enumeration: VLO_ON_enum_read ( read )

0 : VLO_ON_0

Inactive

1 : VLO_ON_1

Active

End of enumeration elements list.

LFXT_ON : LFXT status
bits : 6 - 6 (1 bit)
access : read-only

Enumeration: LFXT_ON_enum_read ( read )

0 : LFXT_ON_0

Inactive

1 : LFXT_ON_1

Active

End of enumeration elements list.

REFO_ON : REFO status
bits : 7 - 7 (1 bit)
access : read-only

Enumeration: REFO_ON_enum_read ( read )

0 : REFO_ON_0

Inactive

1 : REFO_ON_1

Active

End of enumeration elements list.

ACLK_ON : ACLK system clock status
bits : 16 - 16 (1 bit)
access : read-only

Enumeration: ACLK_ON_enum_read ( read )

0 : ACLK_ON_0

Inactive

1 : ACLK_ON_1

Active

End of enumeration elements list.

MCLK_ON : MCLK system clock status
bits : 17 - 17 (1 bit)
access : read-only

Enumeration: MCLK_ON_enum_read ( read )

0 : MCLK_ON_0

Inactive

1 : MCLK_ON_1

Active

End of enumeration elements list.

HSMCLK_ON : HSMCLK system clock status
bits : 18 - 18 (1 bit)
access : read-only

Enumeration: HSMCLK_ON_enum_read ( read )

0 : HSMCLK_ON_0

Inactive

1 : HSMCLK_ON_1

Active

End of enumeration elements list.

SMCLK_ON : SMCLK system clock status
bits : 19 - 19 (1 bit)
access : read-only

Enumeration: SMCLK_ON_enum_read ( read )

0 : SMCLK_ON_0

Inactive

1 : SMCLK_ON_1

Active

End of enumeration elements list.

MODCLK_ON : MODCLK system clock status
bits : 20 - 20 (1 bit)
access : read-only

Enumeration: MODCLK_ON_enum_read ( read )

0 : MODCLK_ON_0

Inactive

1 : MODCLK_ON_1

Active

End of enumeration elements list.

VLOCLK_ON : VLOCLK system clock status
bits : 21 - 21 (1 bit)
access : read-only

Enumeration: VLOCLK_ON_enum_read ( read )

0 : VLOCLK_ON_0

Inactive

1 : VLOCLK_ON_1

Active

End of enumeration elements list.

LFXTCLK_ON : LFXTCLK system clock status
bits : 22 - 22 (1 bit)
access : read-only

Enumeration: LFXTCLK_ON_enum_read ( read )

0 : LFXTCLK_ON_0

Inactive

1 : LFXTCLK_ON_1

Active

End of enumeration elements list.

REFOCLK_ON : REFOCLK system clock status
bits : 23 - 23 (1 bit)
access : read-only

Enumeration: REFOCLK_ON_enum_read ( read )

0 : REFOCLK_ON_0

Inactive

1 : REFOCLK_ON_1

Active

End of enumeration elements list.

ACLK_READY : ACLK Ready status
bits : 24 - 24 (1 bit)
access : read-only

Enumeration: ACLK_READY_enum_read ( read )

0 : ACLK_READY_0

Not ready

1 : ACLK_READY_1

Ready

End of enumeration elements list.

MCLK_READY : MCLK Ready status
bits : 25 - 25 (1 bit)
access : read-only

Enumeration: MCLK_READY_enum_read ( read )

0 : MCLK_READY_0

Not ready

1 : MCLK_READY_1

Ready

End of enumeration elements list.

HSMCLK_READY : HSMCLK Ready status
bits : 26 - 26 (1 bit)
access : read-only

Enumeration: HSMCLK_READY_enum_read ( read )

0 : HSMCLK_READY_0

Not ready

1 : HSMCLK_READY_1

Ready

End of enumeration elements list.

SMCLK_READY : SMCLK Ready status
bits : 27 - 27 (1 bit)
access : read-only

Enumeration: SMCLK_READY_enum_read ( read )

0 : SMCLK_READY_0

Not ready

1 : SMCLK_READY_1

Ready

End of enumeration elements list.

BCLK_READY : BCLK Ready status
bits : 28 - 28 (1 bit)
access : read-only

Enumeration: BCLK_READY_enum_read ( read )

0 : BCLK_READY_0

Not ready

1 : BCLK_READY_1

Ready

End of enumeration elements list.


CTL0 (CSCTL0)

Control 0 Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTL0 CTL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCOTUNE DCORSEL DCORES DCOEN

DCOTUNE : DCO frequency tuning select
bits : 0 - 9 (10 bit)
access : read-write

DCORSEL : DCO frequency range select
bits : 16 - 18 (3 bit)
access : read-write

Enumeration:

0 : DCORSEL_0

Nominal DCO Frequency Range (MHz): 1 to 2

1 : DCORSEL_1

Nominal DCO Frequency Range (MHz): 2 to 4

2 : DCORSEL_2

Nominal DCO Frequency Range (MHz): 4 to 8

3 : DCORSEL_3

Nominal DCO Frequency Range (MHz): 8 to 16

4 : DCORSEL_4

Nominal DCO Frequency Range (MHz): 16 to 32

5 : DCORSEL_5

Nominal DCO Frequency Range (MHz): 32 to 64

End of enumeration elements list.

DCORES : Enables the DCO external resistor mode
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

0 : DCORES_0

Internal resistor mode

1 : DCORES_1

External resistor mode

End of enumeration elements list.

DCOEN : Enables the DCO oscillator
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

0 : DCOEN_0

DCO is on if it is used as a source for MCLK, HSMCLK , or SMCLK and clock is requested, otherwise it is disabled.

1 : DCOEN_1

DCO is on

End of enumeration elements list.


IE (CSIE)

Interrupt Enable Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IE IE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LFXTIE HFXTIE HFXT2IE DCOR_OPNIE FCNTLFIE FCNTHFIE FCNTHF2IE PLLOOLIE PLLLOSIE PLLOORIE CALIE

LFXTIE : LFXT oscillator fault flag interrupt enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LFXTIE_0

Interrupt disabled

1 : LFXTIE_1

Interrupt enabled

End of enumeration elements list.

HFXTIE : HFXT oscillator fault flag interrupt enable
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : HFXTIE_0

Interrupt disabled

1 : HFXTIE_1

Interrupt enabled

End of enumeration elements list.

HFXT2IE : HFXT2 oscillator fault flag interrupt enable
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : HFXT2IE_0

Interrupt disabled

1 : HFXT2IE_1

Interrupt enabled

End of enumeration elements list.

DCOR_OPNIE : DCO external resistor open circuit fault flag interrupt enable.
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DCOR_OPNIE_0

Interrupt disabled

1 : DCOR_OPNIE_1

Interrupt enabled

End of enumeration elements list.

FCNTLFIE : Start fault counter interrupt enable LFXT
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

0 : FCNTLFIE_0

Interrupt disabled

1 : FCNTLFIE_1

Interrupt enabled

End of enumeration elements list.

FCNTHFIE : Start fault counter interrupt enable HFXT
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

0 : FCNTHFIE_0

Interrupt disabled

1 : FCNTHFIE_1

Interrupt enabled

End of enumeration elements list.

FCNTHF2IE : Start fault counter interrupt enable HFXT2
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

0 : FCNTHF2IE_0

Interrupt disabled

1 : FCNTHF2IE_1

Interrupt enabled

End of enumeration elements list.

PLLOOLIE : PLL out-of-lock interrupt enable
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

0 : PLLOOLIE_0

Interrupt disabled

1 : PLLOOLIE_1

Interrupt enabled

End of enumeration elements list.

PLLLOSIE : PLL loss-of-signal interrupt enable
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : PLLLOSIE_0

Interrupt disabled

1 : PLLLOSIE_1

Interrupt enabled

End of enumeration elements list.

PLLOORIE : PLL out-of-range interrupt enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : PLLOORIE_0

Interrupt disabled

1 : PLLOORIE_1

Interrupt enabled

End of enumeration elements list.

CALIE : REFCNT period counter interrupt enable
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : CALIE_0

Interrupt disabled

1 : CALIE_1

Interrupt enabled

End of enumeration elements list.


IFG (CSIFG)

Interrupt Flag Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IFG IFG read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LFXTIFG HFXTIFG HFXT2IFG DCOR_SHTIFG DCOR_OPNIFG FCNTLFIFG FCNTHFIFG FCNTHF2IFG PLLOOLIFG PLLLOSIFG PLLOORIFG CALIFG

LFXTIFG : LFXT oscillator fault flag
bits : 0 - 0 (1 bit)
access : read-only

Enumeration: LFXTIFG_enum_read ( read )

0 : LFXTIFG_0

No fault condition occurred after the last reset

1 : LFXTIFG_1

LFXT fault. A LFXT fault occurred after the last reset

End of enumeration elements list.

HFXTIFG : HFXT oscillator fault flag
bits : 1 - 1 (1 bit)
access : read-only

Enumeration: HFXTIFG_enum_read ( read )

0 : HFXTIFG_0

No fault condition occurred after the last reset

1 : HFXTIFG_1

HFXT fault. A HFXT fault occurred after the last reset

End of enumeration elements list.

HFXT2IFG : HFXT2 oscillator fault flag
bits : 2 - 2 (1 bit)
access : read-only

Enumeration: HFXT2IFG_enum_read ( read )

0 : HFXT2IFG_0

No fault condition occurred after the last reset

1 : HFXT2IFG_1

HFXT2 fault. A HFXT2 fault occurred after the last reset

End of enumeration elements list.

DCOR_SHTIFG : DCO external resistor short circuit fault flag.
bits : 5 - 5 (1 bit)
access : read-only

Enumeration: DCOR_SHTIFG_enum_read ( read )

0 : DCOR_SHTIFG_0

DCO external resistor present

1 : DCOR_SHTIFG_1

DCO external resistor short circuit fault

End of enumeration elements list.

DCOR_OPNIFG : DCO external resistor open circuit fault flag.
bits : 6 - 6 (1 bit)
access : read-only

Enumeration: DCOR_OPNIFG_enum_read ( read )

0 : DCOR_OPNIFG_0

DCO external resistor present

1 : DCOR_OPNIFG_1

DCO external resistor open circuit fault

End of enumeration elements list.

FCNTLFIFG : Start fault counter interrupt flag LFXT
bits : 8 - 8 (1 bit)
access : read-only

Enumeration: FCNTLFIFG_enum_read ( read )

0 : FCNTLFIFG_0

Start counter not expired

1 : FCNTLFIFG_1

Start counter expired

End of enumeration elements list.

FCNTHFIFG : Start fault counter interrupt flag HFXT
bits : 9 - 9 (1 bit)
access : read-only

Enumeration: FCNTHFIFG_enum_read ( read )

0 : FCNTHFIFG_0

Start counter not expired

1 : FCNTHFIFG_1

Start counter expired

End of enumeration elements list.

FCNTHF2IFG : Start fault counter interrupt flag HFXT2
bits : 11 - 11 (1 bit)
access : read-only

Enumeration: FCNTHF2IFG_enum_read ( read )

0 : FCNTHF2IFG_0

Start counter not expired

1 : FCNTHF2IFG_1

Start counter expired

End of enumeration elements list.

PLLOOLIFG : PLL out-of-lock interrupt flag
bits : 12 - 12 (1 bit)
access : read-only

Enumeration: PLLOOLIFG_enum_read ( read )

0 : PLLOOLIFG_0

No interrupt pending

1 : PLLOOLIFG_1

Interrupt pending

End of enumeration elements list.

PLLLOSIFG : PLL loss-of-signal interrupt flag
bits : 13 - 13 (1 bit)
access : read-only

Enumeration: PLLLOSIFG_enum_read ( read )

0 : PLLLOSIFG_0

No interrupt pending

1 : PLLLOSIFG_1

Interrupt pending

End of enumeration elements list.

PLLOORIFG : PLL out-of-range interrupt flag
bits : 14 - 14 (1 bit)
access : read-only

Enumeration: PLLOORIFG_enum_read ( read )

0 : PLLOORIFG_0

No interrupt pending

1 : PLLOORIFG_1

Interrupt pending

End of enumeration elements list.

CALIFG : REFCNT period counter expired
bits : 15 - 15 (1 bit)
access : read-only

Enumeration: CALIFG_enum_read ( read )

0 : CALIFG_0

REFCNT period counter not expired

1 : CALIFG_1

REFCNT period counter expired

End of enumeration elements list.


CLRIFG (CSCLRIFG)

Clear Interrupt Flag Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CLRIFG CLRIFG write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLR_LFXTIFG CLR_HFXTIFG CLR_HFXT2IFG CLR_DCOR_OPNIFG CLR_FCNTLFIFG CLR_FCNTHFIFG CLR_FCNTHF2IFG CLR_PLLOOLIFG CLR_PLLLOSIFG CLR_PLLOORIFG CLR_CALIFG

CLR_LFXTIFG : Clear LFXT oscillator fault interrupt flag
bits : 0 - 0 (1 bit)
access : write-only

Enumeration: CLR_LFXTIFG_enum_write ( write )

0 : CLR_LFXTIFG_0

No effect

1 : CLR_LFXTIFG_1

Clear pending interrupt flag

End of enumeration elements list.

CLR_HFXTIFG : Clear HFXT oscillator fault interrupt flag
bits : 1 - 1 (1 bit)
access : write-only

Enumeration: CLR_HFXTIFG_enum_write ( write )

0 : CLR_HFXTIFG_0

No effect

1 : CLR_HFXTIFG_1

Clear pending interrupt flag

End of enumeration elements list.

CLR_HFXT2IFG : Clear HFXT2 oscillator fault interrupt flag
bits : 2 - 2 (1 bit)
access : write-only

Enumeration: CLR_HFXT2IFG_enum_write ( write )

0 : CLR_HFXT2IFG_0

No effect

1 : CLR_HFXT2IFG_1

Clear pending interrupt flag

End of enumeration elements list.

CLR_DCOR_OPNIFG : Clear DCO external resistor open circuit fault interrupt flag.
bits : 6 - 6 (1 bit)
access : write-only

Enumeration: CLR_DCOR_OPNIFG_enum_write ( write )

0 : CLR_DCOR_OPNIFG_0

No effect

1 : CLR_DCOR_OPNIFG_1

Clear pending interrupt flag

End of enumeration elements list.

CLR_FCNTLFIFG : Start fault counter clear interrupt flag LFXT
bits : 8 - 8 (1 bit)
access : write-only

Enumeration: CLR_FCNTLFIFG_enum_write ( write )

0 : CLR_FCNTLFIFG_0

No effect

1 : CLR_FCNTLFIFG_1

Clear pending interrupt flag

End of enumeration elements list.

CLR_FCNTHFIFG : Start fault counter clear interrupt flag HFXT
bits : 9 - 9 (1 bit)
access : write-only

Enumeration: CLR_FCNTHFIFG_enum_write ( write )

0 : CLR_FCNTHFIFG_0

No effect

1 : CLR_FCNTHFIFG_1

Clear pending interrupt flag

End of enumeration elements list.

CLR_FCNTHF2IFG : Start fault counter clear interrupt flag HFXT2
bits : 10 - 10 (1 bit)
access : write-only

Enumeration: CLR_FCNTHF2IFG_enum_write ( write )

0 : CLR_FCNTHF2IFG_0

No effect

1 : CLR_FCNTHF2IFG_1

Clear pending interrupt flag

End of enumeration elements list.

CLR_PLLOOLIFG : PLL out-of-lock clear interrupt flag
bits : 12 - 12 (1 bit)
access : write-only

Enumeration: CLR_PLLOOLIFG_enum_write ( write )

0 : CLR_PLLOOLIFG_0

No effect

1 : CLR_PLLOOLIFG_1

Clear pending interrupt flag

End of enumeration elements list.

CLR_PLLLOSIFG : PLL loss-of-signal clear interrupt flag
bits : 13 - 13 (1 bit)
access : write-only

Enumeration: CLR_PLLLOSIFG_enum_write ( write )

0 : CLR_PLLLOSIFG_0

No effect

1 : CLR_PLLLOSIFG_1

Clear pending interrupt flag

End of enumeration elements list.

CLR_PLLOORIFG : PLL out-of-range clear interrupt flag
bits : 14 - 14 (1 bit)
access : write-only

Enumeration: CLR_PLLOORIFG_enum_write ( write )

0 : CLR_PLLOORIFG_0

No effect

1 : CLR_PLLOORIFG_1

Clear pending interrupt flag

End of enumeration elements list.

CLR_CALIFG : REFCNT period counter clear interrupt flag
bits : 15 - 15 (1 bit)
access : write-only

Enumeration: CLR_CALIFG_enum_write ( write )

0 : CLR_CALIFG_0

No effect

1 : CLR_CALIFG_1

Clear pending interrupt flag

End of enumeration elements list.


SETIFG (CSSETIFG)

Set Interrupt Flag Register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

SETIFG SETIFG write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SET_LFXTIFG SET_HFXTIFG SET_HFXT2IFG SET_DCOR_OPNIFG SET_FCNTLFIFG SET_FCNTHFIFG SET_FCNTHF2IFG SET_PLLOOLIFG SET_PLLLOSIFG SET_PLLOORIFG SET_CALIFG

SET_LFXTIFG : Set LFXT oscillator fault interrupt flag
bits : 0 - 0 (1 bit)
access : write-only

Enumeration: SET_LFXTIFG_enum_write ( write )

0 : SET_LFXTIFG_0

No effect

1 : SET_LFXTIFG_1

Set pending interrupt flag

End of enumeration elements list.

SET_HFXTIFG : Set HFXT oscillator fault interrupt flag
bits : 1 - 1 (1 bit)
access : write-only

Enumeration: SET_HFXTIFG_enum_write ( write )

0 : SET_HFXTIFG_0

No effect

1 : SET_HFXTIFG_1

Set pending interrupt flag

End of enumeration elements list.

SET_HFXT2IFG : Set HFXT2 oscillator fault interrupt flag
bits : 2 - 2 (1 bit)
access : write-only

Enumeration: SET_HFXT2IFG_enum_write ( write )

0 : SET_HFXT2IFG_0

No effect

1 : SET_HFXT2IFG_1

Set pending interrupt flag

End of enumeration elements list.

SET_DCOR_OPNIFG : Set DCO external resistor open circuit fault interrupt flag.
bits : 6 - 6 (1 bit)
access : write-only

Enumeration: SET_DCOR_OPNIFG_enum_write ( write )

0 : SET_DCOR_OPNIFG_0

No effect

1 : SET_DCOR_OPNIFG_1

Set pending interrupt flag

End of enumeration elements list.

SET_FCNTLFIFG : Start fault counter set interrupt flag LFXT
bits : 8 - 8 (1 bit)
access : write-only

Enumeration: SET_FCNTLFIFG_enum_write ( write )

0 : SET_FCNTLFIFG_0

No effect

1 : SET_FCNTLFIFG_1

Set pending interrupt flag

End of enumeration elements list.

SET_FCNTHFIFG : Start fault counter set interrupt flag HFXT
bits : 9 - 9 (1 bit)
access : write-only

Enumeration: SET_FCNTHFIFG_enum_write ( write )

0 : SET_FCNTHFIFG_0

No effect

1 : SET_FCNTHFIFG_1

Set pending interrupt flag

End of enumeration elements list.

SET_FCNTHF2IFG : Start fault counter set interrupt flag HFXT2
bits : 10 - 10 (1 bit)
access : write-only

Enumeration: SET_FCNTHF2IFG_enum_write ( write )

0 : SET_FCNTHF2IFG_0

No effect

1 : SET_FCNTHF2IFG_1

Set pending interrupt flag

End of enumeration elements list.

SET_PLLOOLIFG : PLL out-of-lock set interrupt flag
bits : 12 - 12 (1 bit)
access : write-only

Enumeration: SET_PLLOOLIFG_enum_write ( write )

0 : SET_PLLOOLIFG_0

No effect

1 : SET_PLLOOLIFG_1

Set pending interrupt flag

End of enumeration elements list.

SET_PLLLOSIFG : PLL loss-of-signal set interrupt flag
bits : 13 - 13 (1 bit)
access : write-only

Enumeration: SET_PLLLOSIFG_enum_write ( write )

0 : SET_PLLLOSIFG_0

No effect

1 : SET_PLLLOSIFG_1

Set pending interrupt flag

End of enumeration elements list.

SET_PLLOORIFG : PLL out-of-range set interrupt flag
bits : 14 - 14 (1 bit)
access : write-only

Enumeration: SET_PLLOORIFG_enum_write ( write )

0 : SET_PLLOORIFG_0

No effect

1 : SET_PLLOORIFG_1

Set pending interrupt flag

End of enumeration elements list.

SET_CALIFG : REFCNT period counter set interrupt flag
bits : 15 - 15 (1 bit)
access : write-only

Enumeration: SET_CALIFG_enum_write ( write )

0 : SET_CALIFG_0

No effect

1 : SET_CALIFG_1

Set pending interrupt flag

End of enumeration elements list.


DCOERCAL0 (CSDCOERCAL0)

DCO External Resistor Cailbration 0 Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DCOERCAL0 DCOERCAL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCO_TCCAL DCO_FCAL_RSEL04

DCO_TCCAL : DCO Temperature compensation calibration
bits : 0 - 1 (2 bit)
access : read-write

DCO_FCAL_RSEL04 : DCO frequency calibration for DCO frequency range (DCORSEL) 0 to 4.
bits : 16 - 25 (10 bit)
access : read-write


DCOERCAL1 (CSDCOERCAL1)

DCO External Resistor Calibration 1 Register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DCOERCAL1 DCOERCAL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCO_FCAL_RSEL5

DCO_FCAL_RSEL5 : DCO frequency calibration for DCO frequency range (DCORSEL) 5.
bits : 0 - 9 (10 bit)
access : read-write


CTL1 (CSCTL1)

Control 1 Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTL1 CTL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SELM SELS SELA SELB DIVM DIVHS DIVA DIVS

SELM : Selects the MCLK source
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : SELM_0

when LFXT available, otherwise REFOCLK

1 : SELM_1

None

2 : SELM_2

None

3 : SELM_3

None

4 : SELM_4

None

5 : SELM_5

when HFXT available, otherwise DCOCLK

6 : SELM_6

when HFXT2 available, otherwise DCOCLK

7 : SELM_7

for future use. Defaults to DCOCLK. Not recommended for use to ensure future compatibilities.

End of enumeration elements list.

SELS : Selects the SMCLK and HSMCLK source
bits : 4 - 6 (3 bit)
access : read-write

Enumeration:

0 : SELS_0

when LFXT available, otherwise REFOCLK

1 : SELS_1

None

2 : SELS_2

None

3 : SELS_3

None

4 : SELS_4

None

5 : SELS_5

when HFXT available, otherwise DCOCLK

6 : SELS_6

when HFXT2 available, otherwise DCOCLK

7 : SELS_7

for furture use. Defaults to DCOCLK. Do not use to ensure future compatibilities.

End of enumeration elements list.

SELA : Selects the ACLK source
bits : 8 - 10 (3 bit)
access : read-write

Enumeration:

0 : SELA_0

when LFXT available, otherwise REFOCLK

1 : SELA_1

None

2 : SELA_2

None

3 : SELA_3

for future use. Defaults to REFOCLK. Not recommended for use to ensure future compatibilities.

4 : SELA_4

for future use. Defaults to REFOCLK. Not recommended for use to ensure future compatibilities.

5 : SELA_5

for future use. Defaults to REFOCLK. Not recommended for use to ensure future compatibilities.

6 : SELA_6

for future use. Defaults to REFOCLK. Not recommended for use to ensure future compatibilities.

7 : SELA_7

for future use. Defaults to REFOCLK. Not recommended for use to ensure future compatibilities.

End of enumeration elements list.

SELB : Selects the BCLK source
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

0 : SELB_0

LFXTCLK

1 : SELB_1

REFOCLK

End of enumeration elements list.

DIVM : MCLK source divider
bits : 16 - 18 (3 bit)
access : read-write

Enumeration:

0 : DIVM_0

f(MCLK)/1

1 : DIVM_1

f(MCLK)/2

2 : DIVM_2

f(MCLK)/4

3 : DIVM_3

f(MCLK)/8

4 : DIVM_4

f(MCLK)/16

5 : DIVM_5

f(MCLK)/32

6 : DIVM_6

f(MCLK)/64

7 : DIVM_7

f(MCLK)/128

End of enumeration elements list.

DIVHS : HSMCLK source divider
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

0 : DIVHS_0

f(HSMCLK)/1

1 : DIVHS_1

f(HSMCLK)/2

2 : DIVHS_2

f(HSMCLK)/4

3 : DIVHS_3

f(HSMCLK)/8

4 : DIVHS_4

f(HSMCLK)/16

5 : DIVHS_5

f(HSMCLK)/32

6 : DIVHS_6

f(HSMCLK)/64

7 : DIVHS_7

f(HSMCLK)/128

End of enumeration elements list.

DIVA : ACLK source divider
bits : 24 - 26 (3 bit)
access : read-write

Enumeration:

0 : DIVA_0

f(ACLK)/1

1 : DIVA_1

f(ACLK)/2

2 : DIVA_2

f(ACLK)/4

3 : DIVA_3

f(ACLK)/8

4 : DIVA_4

f(ACLK)/16

5 : DIVA_5

f(ACLK)/32

6 : DIVA_6

f(ACLK)/64

7 : DIVA_7

f(ACLK)/128

End of enumeration elements list.

DIVS : SMCLK source divider
bits : 28 - 30 (3 bit)
access : read-write

Enumeration:

0 : DIVS_0

f(SMCLK)/1

1 : DIVS_1

f(SMCLK)/2

2 : DIVS_2

f(SMCLK)/4

3 : DIVS_3

f(SMCLK)/8

4 : DIVS_4

f(SMCLK)/16

5 : DIVS_5

f(SMCLK)/32

6 : DIVS_6

f(SMCLK)/64

7 : DIVS_7

f(SMCLK)/128

End of enumeration elements list.


CTL2 (CSCTL2)

Control 2 Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTL2 CTL2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LFXTDRIVE LFXTAGCOFF LFXT_EN LFXTBYPASS HFXTDRIVE HFXTFREQ HFXT_EN HFXTBYPASS

LFXTDRIVE : LFXT oscillator current can be adjusted to its drive needs
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : LFXTDRIVE_0

Lowest drive strength and current consumption LFXT oscillator.

1 : LFXTDRIVE_1

Increased drive strength LFXT oscillator.

2 : LFXTDRIVE_2

Increased drive strength LFXT oscillator.

3 : LFXTDRIVE_3

Maximum drive strength and maximum current consumption LFXT oscillator.

End of enumeration elements list.

LFXTAGCOFF : Disables the automatic gain control of the LFXT crystal
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : LFXTAGCOFF_0

AGC enabled.

1 : LFXTAGCOFF_1

AGC disabled.

End of enumeration elements list.

LFXT_EN : Turns on the LFXT oscillator regardless if used as a clock resource
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

0 : LFXT_EN_0

LFXT is on if it is used as a source for ACLK, MCLK, HSMCLK , or SMCLK and is selected via the port selection and not in bypass mode of operation.

1 : LFXT_EN_1

LFXT is on if LFXT is selected via the port selection and LFXT is not in bypass mode of operation.

End of enumeration elements list.

LFXTBYPASS : LFXT bypass select
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

0 : LFXTBYPASS_0

LFXT sourced by external crystal.

1 : LFXTBYPASS_1

LFXT sourced by external square wave.

End of enumeration elements list.

HFXTDRIVE : HFXT oscillator drive selection
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : HFXTDRIVE_0

To be used for HFXTFREQ setting 000b

1 : HFXTDRIVE_1

To be used for HFXTFREQ settings 001b to 110b

End of enumeration elements list.

HFXTFREQ : HFXT frequency selection
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

0 : HFXTFREQ_0

1 MHz to 4 MHz

1 : HFXTFREQ_1

>4 MHz to 8 MHz

2 : HFXTFREQ_2

>8 MHz to 16 MHz

3 : HFXTFREQ_3

>16 MHz to 24 MHz

4 : HFXTFREQ_4

>24 MHz to 32 MHz

5 : HFXTFREQ_5

>32 MHz to 40 MHz

6 : HFXTFREQ_6

>40 MHz to 48 MHz

End of enumeration elements list.

HFXT_EN : Turns on the HFXT oscillator regardless if used as a clock resource
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

0 : HFXT_EN_0

HFXT is on if it is used as a source for MCLK, HSMCLK , or SMCLK and is selected via the port selection and not in bypass mode of operation.

1 : HFXT_EN_1

HFXT is on if HFXT is selected via the port selection and HFXT is not in bypass mode of operation.

End of enumeration elements list.

HFXTBYPASS : HFXT bypass select
bits : 25 - 25 (1 bit)
access : read-write

Enumeration:

0 : HFXTBYPASS_0

HFXT sourced by external crystal.

1 : HFXTBYPASS_1

HFXT sourced by external square wave.

End of enumeration elements list.



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