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DIO

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x138 byte (0x0)
mem_usage : registers
protection : not protected

Registers

PAIN

PJIN

PJOUT

PJDIR

PJREN

PJDS

PJSEL0

PJSEL1

PJSELC

PASELC

PAIES

PAIE

PAIFG

P2IV

PAOUT

PBIN

PBOUT

PBDIR

PBREN

PBDS

PBSEL0

PBSEL1

P3IV

PBSELC

PBIES

PBIE

PBIFG

P4IV

PADIR

PCIN

PCOUT

PCDIR

PCREN

PCDS

PCSEL0

PCSEL1

P5IV

PCSELC

PCIES

PCIE

PCIFG

P6IV

PAREN

PDIN

PDOUT

PDDIR

PDREN

PDDS

PDSEL0

PDSEL1

P7IV

PDSELC

PDIES

PDIE

PDIFG

P8IV

PADS

PEIN

PEOUT

PEDIR

PEREN

PEDS

PESEL0

PESEL1

P9IV

PESELC

PEIES

PEIE

PEIFG

P10IV

PASEL0

PASEL1

P1IV


PAIN

Port A Input
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PAIN PAIN read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P1IN P2IN

P1IN : Port 1 Input
bits : 0 - 7 (8 bit)
access : read-only

P2IN : Port 2 Input
bits : 8 - 15 (8 bit)
access : read-only


PJIN

Port J Input
address_offset : 0x120 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PJIN PJIN read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PJIN

PJIN : Port J Input
bits : 0 - 15 (16 bit)
access : read-only


PJOUT

Port J Output
address_offset : 0x122 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PJOUT PJOUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PJOUT

PJOUT : Port J Output
bits : 0 - 15 (16 bit)
access : read-write


PJDIR

Port J Direction
address_offset : 0x124 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PJDIR PJDIR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PJDIR

PJDIR : Port J Direction
bits : 0 - 15 (16 bit)
access : read-write


PJREN

Port J Resistor Enable
address_offset : 0x126 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PJREN PJREN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PJREN

PJREN : Port J Resistor Enable
bits : 0 - 15 (16 bit)
access : read-write


PJDS

Port J Drive Strength
address_offset : 0x128 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PJDS PJDS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PJDS

PJDS : Port J Drive Strength
bits : 0 - 15 (16 bit)
access : read-write


PJSEL0

Port J Select 0
address_offset : 0x12A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PJSEL0 PJSEL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PJSEL0

PJSEL0 : Port J Select 0
bits : 0 - 15 (16 bit)
access : read-write


PJSEL1

Port J Select 1
address_offset : 0x12C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PJSEL1 PJSEL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PJSEL1

PJSEL1 : Port J Select 1
bits : 0 - 15 (16 bit)
access : read-write


PJSELC

Port J Complement Select
address_offset : 0x136 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PJSELC PJSELC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PJSELC

PJSELC : Port J Complement Select
bits : 0 - 15 (16 bit)
access : read-write


PASELC

Port A Complement Select
address_offset : 0x16 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PASELC PASELC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P1SELC P2SELC

P1SELC : Port 1 Complement Select
bits : 0 - 7 (8 bit)
access : read-write

P2SELC : Port 2 Complement Select
bits : 8 - 15 (8 bit)
access : read-write


PAIES

Port A Interrupt Edge Select
address_offset : 0x18 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PAIES PAIES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P1IES P2IES

P1IES : Port 1 Interrupt Edge Select
bits : 0 - 7 (8 bit)
access : read-write

P2IES : Port 2 Interrupt Edge Select
bits : 8 - 15 (8 bit)
access : read-write


PAIE

Port A Interrupt Enable
address_offset : 0x1A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PAIE PAIE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P1IE P2IE

P1IE : Port 1 Interrupt Enable
bits : 0 - 7 (8 bit)
access : read-write

P2IE : Port 2 Interrupt Enable
bits : 8 - 15 (8 bit)
access : read-write


PAIFG

Port A Interrupt Flag
address_offset : 0x1C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PAIFG PAIFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P1IFG P2IFG

P1IFG : Port 1 Interrupt Flag
bits : 0 - 7 (8 bit)
access : read-write

P2IFG : Port 2 Interrupt Flag
bits : 8 - 15 (8 bit)
access : read-write


P2IV

Port 2 Interrupt Vector Register
address_offset : 0x1E Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

P2IV P2IV read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P2IV

P2IV : Port 2 interrupt vector value
bits : 0 - 4 (5 bit)
access : read-only

Enumeration: P2IV_enum_read ( read )

0 : P2IV_0

No interrupt pending

2 : P2IV_2

Interrupt Source: Port 2.0 interrupt Interrupt Flag: P2IFG0 Interrupt Priority: Highest

4 : P2IV_4

Interrupt Source: Port 2.1 interrupt Interrupt Flag: P2IFG1

6 : P2IV_6

Interrupt Source: Port 2.2 interrupt Interrupt Flag: P2IFG2

8 : P2IV_8

Interrupt Source: Port 2.3 interrupt Interrupt Flag: P2IFG3

10 : P2IV_10

Interrupt Source: Port 2.4 interrupt Interrupt Flag: P2IFG4

12 : P2IV_12

Interrupt Source: Port 2.5 interrupt Interrupt Flag: P2IFG5

14 : P2IV_14

Interrupt Source: Port 2.6 interrupt Interrupt Flag: P2IFG6

16 : P2IV_16

Interrupt Source: Port 2.7 interrupt Interrupt Flag: P2IFG7 Interrupt Priority: Lowest

End of enumeration elements list.


PAOUT

Port A Output
address_offset : 0x2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PAOUT PAOUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P1OUT P2OUT

P1OUT : Port 1 Output
bits : 0 - 7 (8 bit)
access : read-write

P2OUT : Port 2 Output
bits : 8 - 15 (8 bit)
access : read-write


PBIN

Port B Input
address_offset : 0x20 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PBIN PBIN read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P3IN P4IN

P3IN : Port 3 Input
bits : 0 - 7 (8 bit)
access : read-only

P4IN : Port 4 Input
bits : 8 - 15 (8 bit)
access : read-only


PBOUT

Port B Output
address_offset : 0x22 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PBOUT PBOUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P3OUT P4OUT

P3OUT : Port 3 Output
bits : 0 - 7 (8 bit)
access : read-write

P4OUT : Port 4 Output
bits : 8 - 15 (8 bit)
access : read-write


PBDIR

Port B Direction
address_offset : 0x24 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PBDIR PBDIR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P3DIR P4DIR

P3DIR : Port 3 Direction
bits : 0 - 7 (8 bit)
access : read-write

P4DIR : Port 4 Direction
bits : 8 - 15 (8 bit)
access : read-write


PBREN

Port B Resistor Enable
address_offset : 0x26 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PBREN PBREN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P3REN P4REN

P3REN : Port 3 Resistor Enable
bits : 0 - 7 (8 bit)
access : read-write

P4REN : Port 4 Resistor Enable
bits : 8 - 15 (8 bit)
access : read-write


PBDS

Port B Drive Strength
address_offset : 0x28 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PBDS PBDS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P3DS P4DS

P3DS : Port 3 Drive Strength
bits : 0 - 7 (8 bit)
access : read-write

P4DS : Port 4 Drive Strength
bits : 8 - 15 (8 bit)
access : read-write


PBSEL0

Port B Select 0
address_offset : 0x2A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PBSEL0 PBSEL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P3SEL0 P4SEL0

P3SEL0 : Port 3 Select 0
bits : 0 - 7 (8 bit)
access : read-write

P4SEL0 : Port 4 Select 0
bits : 8 - 15 (8 bit)
access : read-write


PBSEL1

Port B Select 1
address_offset : 0x2C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PBSEL1 PBSEL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P3SEL1 P4SEL1

P3SEL1 : Port 3 Select 1
bits : 0 - 7 (8 bit)
access : read-write

P4SEL1 : Port 4 Select 1
bits : 8 - 15 (8 bit)
access : read-write


P3IV

Port 3 Interrupt Vector Register
address_offset : 0x2E Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

P3IV P3IV read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P3IV

P3IV : Port 3 interrupt vector value
bits : 0 - 4 (5 bit)
access : read-only

Enumeration: P3IV_enum_read ( read )

0 : P3IV_0

No interrupt pending

2 : P3IV_2

Interrupt Source: Port 3.0 interrupt Interrupt Flag: P3IFG0 Interrupt Priority: Highest

4 : P3IV_4

Interrupt Source: Port 3.1 interrupt Interrupt Flag: P3IFG1

6 : P3IV_6

Interrupt Source: Port 3.2 interrupt Interrupt Flag: P3IFG2

8 : P3IV_8

Interrupt Source: Port 3.3 interrupt Interrupt Flag: P3IFG3

10 : P3IV_10

Interrupt Source: Port 3.4 interrupt Interrupt Flag: P3IFG4

12 : P3IV_12

Interrupt Source: Port 3.5 interrupt Interrupt Flag: P3IFG5

14 : P3IV_14

Interrupt Source: Port 3.6 interrupt Interrupt Flag: P3IFG6

16 : P3IV_16

Interrupt Source: Port 3.7 interrupt Interrupt Flag: P3IFG7 Interrupt Priority: Lowest

End of enumeration elements list.


PBSELC

Port B Complement Select
address_offset : 0x36 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PBSELC PBSELC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P3SELC P4SELC

P3SELC : Port 3 Complement Select
bits : 0 - 7 (8 bit)
access : read-write

P4SELC : Port 4 Complement Select
bits : 8 - 15 (8 bit)
access : read-write


PBIES

Port B Interrupt Edge Select
address_offset : 0x38 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PBIES PBIES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P3IES P4IES

P3IES : Port 3 Interrupt Edge Select
bits : 0 - 7 (8 bit)
access : read-write

P4IES : Port 4 Interrupt Edge Select
bits : 8 - 15 (8 bit)
access : read-write


PBIE

Port B Interrupt Enable
address_offset : 0x3A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PBIE PBIE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P3IE P4IE

P3IE : Port 3 Interrupt Enable
bits : 0 - 7 (8 bit)
access : read-write

P4IE : Port 4 Interrupt Enable
bits : 8 - 15 (8 bit)
access : read-write


PBIFG

Port B Interrupt Flag
address_offset : 0x3C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PBIFG PBIFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P3IFG P4IFG

P3IFG : Port 3 Interrupt Flag
bits : 0 - 7 (8 bit)
access : read-write

P4IFG : Port 4 Interrupt Flag
bits : 8 - 15 (8 bit)
access : read-write


P4IV

Port 4 Interrupt Vector Register
address_offset : 0x3E Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

P4IV P4IV read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P4IV

P4IV : Port 4 interrupt vector value
bits : 0 - 4 (5 bit)
access : read-only

Enumeration: P4IV_enum_read ( read )

0 : P4IV_0

No interrupt pending

2 : P4IV_2

Interrupt Source: Port 4.0 interrupt Interrupt Flag: P4IFG0 Interrupt Priority: Highest

4 : P4IV_4

Interrupt Source: Port 4.1 interrupt Interrupt Flag: P4IFG1

6 : P4IV_6

Interrupt Source: Port 4.2 interrupt Interrupt Flag: P4IFG2

8 : P4IV_8

Interrupt Source: Port 4.3 interrupt Interrupt Flag: P4IFG3

10 : P4IV_10

Interrupt Source: Port 4.4 interrupt Interrupt Flag: P4IFG4

12 : P4IV_12

Interrupt Source: Port 4.5 interrupt Interrupt Flag: P4IFG5

14 : P4IV_14

Interrupt Source: Port 4.6 interrupt Interrupt Flag: P4IFG6

16 : P4IV_16

Interrupt Source: Port 4.7 interrupt Interrupt Flag: P4IFG7 Interrupt Priority: Lowest

End of enumeration elements list.


PADIR

Port A Direction
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADIR PADIR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P1DIR P2DIR

P1DIR : Port 1 Direction
bits : 0 - 7 (8 bit)
access : read-write

P2DIR : Port 2 Direction
bits : 8 - 15 (8 bit)
access : read-write


PCIN

Port C Input
address_offset : 0x40 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PCIN PCIN read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P5IN P6IN

P5IN : Port 5 Input
bits : 0 - 7 (8 bit)
access : read-only

P6IN : Port 6 Input
bits : 8 - 15 (8 bit)
access : read-only


PCOUT

Port C Output
address_offset : 0x42 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCOUT PCOUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P5OUT P6OUT

P5OUT : Port 5 Output
bits : 0 - 7 (8 bit)
access : read-write

P6OUT : Port 6 Output
bits : 8 - 15 (8 bit)
access : read-write


PCDIR

Port C Direction
address_offset : 0x44 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCDIR PCDIR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P5DIR P6DIR

P5DIR : Port 5 Direction
bits : 0 - 7 (8 bit)
access : read-write

P6DIR : Port 6 Direction
bits : 8 - 15 (8 bit)
access : read-write


PCREN

Port C Resistor Enable
address_offset : 0x46 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCREN PCREN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P5REN P6REN

P5REN : Port 5 Resistor Enable
bits : 0 - 7 (8 bit)
access : read-write

P6REN : Port 6 Resistor Enable
bits : 8 - 15 (8 bit)
access : read-write


PCDS

Port C Drive Strength
address_offset : 0x48 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCDS PCDS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P5DS P6DS

P5DS : Port 5 Drive Strength
bits : 0 - 7 (8 bit)
access : read-write

P6DS : Port 6 Drive Strength
bits : 8 - 15 (8 bit)
access : read-write


PCSEL0

Port C Select 0
address_offset : 0x4A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCSEL0 PCSEL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P5SEL0 P6SEL0

P5SEL0 : Port 5 Select 0
bits : 0 - 7 (8 bit)
access : read-write

P6SEL0 : Port 6 Select 0
bits : 8 - 15 (8 bit)
access : read-write


PCSEL1

Port C Select 1
address_offset : 0x4C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCSEL1 PCSEL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P5SEL1 P6SEL1

P5SEL1 : Port 5 Select 1
bits : 0 - 7 (8 bit)
access : read-write

P6SEL1 : Port 6 Select 1
bits : 8 - 15 (8 bit)
access : read-write


P5IV

Port 5 Interrupt Vector Register
address_offset : 0x4E Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

P5IV P5IV read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P5IV

P5IV : Port 5 interrupt vector value
bits : 0 - 4 (5 bit)
access : read-only

Enumeration: P5IV_enum_read ( read )

0 : P5IV_0

No interrupt pending

2 : P5IV_2

Interrupt Source: Port 5.0 interrupt Interrupt Flag: P5IFG0 Interrupt Priority: Highest

4 : P5IV_4

Interrupt Source: Port 5.1 interrupt Interrupt Flag: P5IFG1

6 : P5IV_6

Interrupt Source: Port 5.2 interrupt Interrupt Flag: P5IFG2

8 : P5IV_8

Interrupt Source: Port 5.3 interrupt Interrupt Flag: P5IFG3

10 : P5IV_10

Interrupt Source: Port 5.4 interrupt Interrupt Flag: P5IFG4

12 : P5IV_12

Interrupt Source: Port 5.5 interrupt Interrupt Flag: P5IFG5

14 : P5IV_14

Interrupt Source: Port 5.6 interrupt Interrupt Flag: P5IFG6

16 : P5IV_16

Interrupt Source: Port 5.7 interrupt Interrupt Flag: P5IFG7 Interrupt Priority: Lowest

End of enumeration elements list.


PCSELC

Port C Complement Select
address_offset : 0x56 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCSELC PCSELC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P5SELC P6SELC

P5SELC : Port 5 Complement Select
bits : 0 - 7 (8 bit)
access : read-write

P6SELC : Port 6 Complement Select
bits : 8 - 15 (8 bit)
access : read-write


PCIES

Port C Interrupt Edge Select
address_offset : 0x58 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCIES PCIES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P5IES P6IES

P5IES : Port 5 Interrupt Edge Select
bits : 0 - 7 (8 bit)
access : read-write

P6IES : Port 6 Interrupt Edge Select
bits : 8 - 15 (8 bit)
access : read-write


PCIE

Port C Interrupt Enable
address_offset : 0x5A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCIE PCIE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P5IE P6IE

P5IE : Port 5 Interrupt Enable
bits : 0 - 7 (8 bit)
access : read-write

P6IE : Port 6 Interrupt Enable
bits : 8 - 15 (8 bit)
access : read-write


PCIFG

Port C Interrupt Flag
address_offset : 0x5C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCIFG PCIFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P5IFG P6IFG

P5IFG : Port 5 Interrupt Flag
bits : 0 - 7 (8 bit)
access : read-write

P6IFG : Port 6 Interrupt Flag
bits : 8 - 15 (8 bit)
access : read-write


P6IV

Port 6 Interrupt Vector Register
address_offset : 0x5E Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

P6IV P6IV read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P6IV

P6IV : Port 6 interrupt vector value
bits : 0 - 4 (5 bit)
access : read-only

Enumeration: P6IV_enum_read ( read )

0 : P6IV_0

No interrupt pending

2 : P6IV_2

Interrupt Source: Port 6.0 interrupt Interrupt Flag: P6IFG0 Interrupt Priority: Highest

4 : P6IV_4

Interrupt Source: Port 6.1 interrupt Interrupt Flag: P6IFG1

6 : P6IV_6

Interrupt Source: Port 6.2 interrupt Interrupt Flag: P6IFG2

8 : P6IV_8

Interrupt Source: Port 6.3 interrupt Interrupt Flag: P6IFG3

10 : P6IV_10

Interrupt Source: Port 6.4 interrupt Interrupt Flag: P6IFG4

12 : P6IV_12

Interrupt Source: Port 6.5 interrupt Interrupt Flag: P6IFG5

14 : P6IV_14

Interrupt Source: Port 6.6 interrupt Interrupt Flag: P6IFG6

16 : P6IV_16

Interrupt Source: Port 6.7 interrupt Interrupt Flag: P6IFG7 Interrupt Priority: Lowest

End of enumeration elements list.


PAREN

Port A Resistor Enable
address_offset : 0x6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PAREN PAREN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P1REN P2REN

P1REN : Port 1 Resistor Enable
bits : 0 - 7 (8 bit)
access : read-write

P2REN : Port 2 Resistor Enable
bits : 8 - 15 (8 bit)
access : read-write


PDIN

Port D Input
address_offset : 0x60 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PDIN PDIN read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P7IN P8IN

P7IN : Port 7 Input
bits : 0 - 7 (8 bit)
access : read-only

P8IN : Port 8 Input
bits : 8 - 15 (8 bit)
access : read-only


PDOUT

Port D Output
address_offset : 0x62 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDOUT PDOUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P7OUT P8OUT

P7OUT : Port 7 Output
bits : 0 - 7 (8 bit)
access : read-write

P8OUT : Port 8 Output
bits : 8 - 15 (8 bit)
access : read-write


PDDIR

Port D Direction
address_offset : 0x64 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDDIR PDDIR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P7DIR P8DIR

P7DIR : Port 7 Direction
bits : 0 - 7 (8 bit)
access : read-write

P8DIR : Port 8 Direction
bits : 8 - 15 (8 bit)
access : read-write


PDREN

Port D Resistor Enable
address_offset : 0x66 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDREN PDREN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P7REN P8REN

P7REN : Port 7 Resistor Enable
bits : 0 - 7 (8 bit)
access : read-write

P8REN : Port 8 Resistor Enable
bits : 8 - 15 (8 bit)
access : read-write


PDDS

Port D Drive Strength
address_offset : 0x68 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDDS PDDS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P7DS P8DS

P7DS : Port 7 Drive Strength
bits : 0 - 7 (8 bit)
access : read-write

P8DS : Port 8 Drive Strength
bits : 8 - 15 (8 bit)
access : read-write


PDSEL0

Port D Select 0
address_offset : 0x6A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDSEL0 PDSEL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P7SEL0 P8SEL0

P7SEL0 : Port 7 Select 0
bits : 0 - 7 (8 bit)
access : read-write

P8SEL0 : Port 8 Select 0
bits : 8 - 15 (8 bit)
access : read-write


PDSEL1

Port D Select 1
address_offset : 0x6C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDSEL1 PDSEL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P7SEL1 P8SEL1

P7SEL1 : Port 7 Select 1
bits : 0 - 7 (8 bit)
access : read-write

P8SEL1 : Port 8 Select 1
bits : 8 - 15 (8 bit)
access : read-write


P7IV

Port 7 Interrupt Vector Register
address_offset : 0x6E Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

P7IV P7IV read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P7IV

P7IV : Port 7 interrupt vector value
bits : 0 - 4 (5 bit)
access : read-only

Enumeration: P7IV_enum_read ( read )

0 : P7IV_0

No interrupt pending

2 : P7IV_2

Interrupt Source: Port 7.0 interrupt Interrupt Flag: P7IFG0 Interrupt Priority: Highest

4 : P7IV_4

Interrupt Source: Port 7.1 interrupt Interrupt Flag: P7IFG1

6 : P7IV_6

Interrupt Source: Port 7.2 interrupt Interrupt Flag: P7IFG2

8 : P7IV_8

Interrupt Source: Port 7.3 interrupt Interrupt Flag: P7IFG3

10 : P7IV_10

Interrupt Source: Port 7.4 interrupt Interrupt Flag: P7IFG4

12 : P7IV_12

Interrupt Source: Port 7.5 interrupt Interrupt Flag: P7IFG5

14 : P7IV_14

Interrupt Source: Port 7.6 interrupt Interrupt Flag: P7IFG6

16 : P7IV_16

Interrupt Source: Port 7.7 interrupt Interrupt Flag: P7IFG7 Interrupt Priority: Lowest

End of enumeration elements list.


PDSELC

Port D Complement Select
address_offset : 0x76 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDSELC PDSELC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P7SELC P8SELC

P7SELC : Port 7 Complement Select
bits : 0 - 7 (8 bit)
access : read-write

P8SELC : Port 8 Complement Select
bits : 8 - 15 (8 bit)
access : read-write


PDIES

Port D Interrupt Edge Select
address_offset : 0x78 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDIES PDIES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P7IES P8IES

P7IES : Port 7 Interrupt Edge Select
bits : 0 - 7 (8 bit)
access : read-write

P8IES : Port 8 Interrupt Edge Select
bits : 8 - 15 (8 bit)
access : read-write


PDIE

Port D Interrupt Enable
address_offset : 0x7A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDIE PDIE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P7IE P8IE

P7IE : Port 7 Interrupt Enable
bits : 0 - 7 (8 bit)
access : read-write

P8IE : Port 8 Interrupt Enable
bits : 8 - 15 (8 bit)
access : read-write


PDIFG

Port D Interrupt Flag
address_offset : 0x7C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDIFG PDIFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P7IFG P8IFG

P7IFG : Port 7 Interrupt Flag
bits : 0 - 7 (8 bit)
access : read-write

P8IFG : Port 8 Interrupt Flag
bits : 8 - 15 (8 bit)
access : read-write


P8IV

Port 8 Interrupt Vector Register
address_offset : 0x7E Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

P8IV P8IV read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P8IV

P8IV : Port 8 interrupt vector value
bits : 0 - 4 (5 bit)
access : read-only

Enumeration: P8IV_enum_read ( read )

0 : P8IV_0

No interrupt pending

2 : P8IV_2

Interrupt Source: Port 8.0 interrupt Interrupt Flag: P8IFG0 Interrupt Priority: Highest

4 : P8IV_4

Interrupt Source: Port 8.1 interrupt Interrupt Flag: P8IFG1

6 : P8IV_6

Interrupt Source: Port 8.2 interrupt Interrupt Flag: P8IFG2

8 : P8IV_8

Interrupt Source: Port 8.3 interrupt Interrupt Flag: P8IFG3

10 : P8IV_10

Interrupt Source: Port 8.4 interrupt Interrupt Flag: P8IFG4

12 : P8IV_12

Interrupt Source: Port 8.5 interrupt Interrupt Flag: P8IFG5

14 : P8IV_14

Interrupt Source: Port 8.6 interrupt Interrupt Flag: P8IFG6

16 : P8IV_16

Interrupt Source: Port 8.7 interrupt Interrupt Flag: P8IFG7 Interrupt Priority: Lowest

End of enumeration elements list.


PADS

Port A Drive Strength
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADS PADS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P1DS P2DS

P1DS : Port 1 Drive Strength
bits : 0 - 7 (8 bit)
access : read-write

P2DS : Port 2 Drive Strength
bits : 8 - 15 (8 bit)
access : read-write


PEIN

Port E Input
address_offset : 0x80 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PEIN PEIN read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P9IN P10IN

P9IN : Port 9 Input
bits : 0 - 7 (8 bit)
access : read-only

P10IN : Port 10 Input
bits : 8 - 15 (8 bit)
access : read-only


PEOUT

Port E Output
address_offset : 0x82 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PEOUT PEOUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P9OUT P10OUT

P9OUT : Port 9 Output
bits : 0 - 7 (8 bit)
access : read-write

P10OUT : Port 10 Output
bits : 8 - 15 (8 bit)
access : read-write


PEDIR

Port E Direction
address_offset : 0x84 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PEDIR PEDIR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P9DIR P10DIR

P9DIR : Port 9 Direction
bits : 0 - 7 (8 bit)
access : read-write

P10DIR : Port 10 Direction
bits : 8 - 15 (8 bit)
access : read-write


PEREN

Port E Resistor Enable
address_offset : 0x86 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PEREN PEREN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P9REN P10REN

P9REN : Port 9 Resistor Enable
bits : 0 - 7 (8 bit)
access : read-write

P10REN : Port 10 Resistor Enable
bits : 8 - 15 (8 bit)
access : read-write


PEDS

Port E Drive Strength
address_offset : 0x88 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PEDS PEDS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P9DS P10DS

P9DS : Port 9 Drive Strength
bits : 0 - 7 (8 bit)
access : read-write

P10DS : Port 10 Drive Strength
bits : 8 - 15 (8 bit)
access : read-write


PESEL0

Port E Select 0
address_offset : 0x8A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PESEL0 PESEL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P9SEL0 P10SEL0

P9SEL0 : Port 9 Select 0
bits : 0 - 7 (8 bit)
access : read-write

P10SEL0 : Port 10 Select 0
bits : 8 - 15 (8 bit)
access : read-write


PESEL1

Port E Select 1
address_offset : 0x8C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PESEL1 PESEL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P9SEL1 P10SEL1

P9SEL1 : Port 9 Select 1
bits : 0 - 7 (8 bit)
access : read-write

P10SEL1 : Port 10 Select 1
bits : 8 - 15 (8 bit)
access : read-write


P9IV

Port 9 Interrupt Vector Register
address_offset : 0x8E Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

P9IV P9IV read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P9IV

P9IV : Port 9 interrupt vector value
bits : 0 - 4 (5 bit)
access : read-only

Enumeration: P9IV_enum_read ( read )

0 : P9IV_0

No interrupt pending

2 : P9IV_2

Interrupt Source: Port 9.0 interrupt Interrupt Flag: P9IFG0 Interrupt Priority: Highest

4 : P9IV_4

Interrupt Source: Port 9.1 interrupt Interrupt Flag: P9IFG1

6 : P9IV_6

Interrupt Source: Port 9.2 interrupt Interrupt Flag: P9IFG2

8 : P9IV_8

Interrupt Source: Port 9.3 interrupt Interrupt Flag: P9IFG3

10 : P9IV_10

Interrupt Source: Port 9.4 interrupt Interrupt Flag: P9IFG4

12 : P9IV_12

Interrupt Source: Port 9.5 interrupt Interrupt Flag: P9IFG5

14 : P9IV_14

Interrupt Source: Port 9.6 interrupt Interrupt Flag: P9IFG6

16 : P9IV_16

Interrupt Source: Port 9.7 interrupt Interrupt Flag: P9IFG7 Interrupt Priority: Lowest

End of enumeration elements list.


PESELC

Port E Complement Select
address_offset : 0x96 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PESELC PESELC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P9SELC P10SELC

P9SELC : Port 9 Complement Select
bits : 0 - 7 (8 bit)
access : read-write

P10SELC : Port 10 Complement Select
bits : 8 - 15 (8 bit)
access : read-write


PEIES

Port E Interrupt Edge Select
address_offset : 0x98 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PEIES PEIES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P9IES P10IES

P9IES : Port 9 Interrupt Edge Select
bits : 0 - 7 (8 bit)
access : read-write

P10IES : Port 10 Interrupt Edge Select
bits : 8 - 15 (8 bit)
access : read-write


PEIE

Port E Interrupt Enable
address_offset : 0x9A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PEIE PEIE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P9IE P10IE

P9IE : Port 9 Interrupt Enable
bits : 0 - 7 (8 bit)
access : read-write

P10IE : Port 10 Interrupt Enable
bits : 8 - 15 (8 bit)
access : read-write


PEIFG

Port E Interrupt Flag
address_offset : 0x9C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PEIFG PEIFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P9IFG P10IFG

P9IFG : Port 9 Interrupt Flag
bits : 0 - 7 (8 bit)
access : read-write

P10IFG : Port 10 Interrupt Flag
bits : 8 - 15 (8 bit)
access : read-write


P10IV

Port 10 Interrupt Vector Register
address_offset : 0x9E Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

P10IV P10IV read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P10IV

P10IV : Port 10 interrupt vector value
bits : 0 - 4 (5 bit)
access : read-only

Enumeration: P10IV_enum_read ( read )

0 : P10IV_0

No interrupt pending

2 : P10IV_2

Interrupt Source: Port 10.0 interrupt Interrupt Flag: P10IFG0 Interrupt Priority: Highest

4 : P10IV_4

Interrupt Source: Port 10.1 interrupt Interrupt Flag: P10IFG1

6 : P10IV_6

Interrupt Source: Port 10.2 interrupt Interrupt Flag: P10IFG2

8 : P10IV_8

Interrupt Source: Port 10.3 interrupt Interrupt Flag: P10IFG3

10 : P10IV_10

Interrupt Source: Port 10.4 interrupt Interrupt Flag: P10IFG4

12 : P10IV_12

Interrupt Source: Port 10.5 interrupt Interrupt Flag: P10IFG5

14 : P10IV_14

Interrupt Source: Port 10.6 interrupt Interrupt Flag: P10IFG6

16 : P10IV_16

Interrupt Source: Port 10.7 interrupt Interrupt Flag: P10IFG7 Interrupt Priority: Lowest

End of enumeration elements list.


PASEL0

Port A Select 0
address_offset : 0xA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PASEL0 PASEL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P1SEL0 P2SEL0

P1SEL0 : Port 1 Select 0
bits : 0 - 7 (8 bit)
access : read-write

P2SEL0 : Port 2 Select 0
bits : 8 - 15 (8 bit)
access : read-write


PASEL1

Port A Select 1
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PASEL1 PASEL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P1SEL1 P2SEL1

P1SEL1 : Port 1 Select 1
bits : 0 - 7 (8 bit)
access : read-write

P2SEL1 : Port 2 Select 1
bits : 8 - 15 (8 bit)
access : read-write


P1IV

Port 1 Interrupt Vector Register
address_offset : 0xE Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

P1IV P1IV read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P1IV

P1IV : Port 1 interrupt vector value
bits : 0 - 4 (5 bit)
access : read-only

Enumeration: P1IV_enum_read ( read )

0 : P1IV_0

No interrupt pending

2 : P1IV_2

Interrupt Source: Port 1.0 interrupt Interrupt Flag: P1IFG0 Interrupt Priority: Highest

4 : P1IV_4

Interrupt Source: Port 1.1 interrupt Interrupt Flag: P1IFG1

6 : P1IV_6

Interrupt Source: Port 1.2 interrupt Interrupt Flag: P1IFG2

8 : P1IV_8

Interrupt Source: Port 1.3 interrupt Interrupt Flag: P1IFG3

10 : P1IV_10

Interrupt Source: Port 1.4 interrupt Interrupt Flag: P1IFG4

12 : P1IV_12

Interrupt Source: Port 1.5 interrupt Interrupt Flag: P1IFG5

14 : P1IV_14

Interrupt Source: Port 1.6 interrupt Interrupt Flag: P1IFG6

16 : P1IV_16

Interrupt Source: Port 1.7 interrupt Interrupt Flag: P1IFG7 Interrupt Priority: Lowest

End of enumeration elements list.



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