\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
Hibernation RTC Counter
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_RTCC : RTC Counter
bits : 0 - 31 (32 bit)
Hibernation RTC Counter
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_RTCC : RTC Counter
bits : 0 - 31 (32 bit)
Hibernation Control
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_CTL_RTCEN : RTC Timer Enable
bits : 0 - 0 (1 bit)
HIB_CTL_HIBREQ : Hibernation Request
bits : 1 - 2 (2 bit)
HIB_CTL_RTCWEN : RTC Wake-up Enable
bits : 3 - 6 (4 bit)
HIB_CTL_PINWEN : External Wake Pin Enable
bits : 4 - 8 (5 bit)
HIB_CTL_CLK32EN : Clocking Enable
bits : 6 - 12 (7 bit)
HIB_CTL_VABORT : Power Cut Abort Enable
bits : 7 - 14 (8 bit)
HIB_CTL_VDD3ON : VDD Powered
bits : 8 - 16 (9 bit)
HIB_CTL_BATWKEN : Wake on Low Battery
bits : 9 - 18 (10 bit)
HIB_CTL_BATCHK : Check Battery Status
bits : 10 - 20 (11 bit)
HIB_CTL_VBATSEL : Select for Low-Battery Comparator
bits : 13 - 27 (15 bit)
Enumeration:
0x0 : HIB_CTL_VBATSEL_1_9V
1.9 Volts
0x1 : HIB_CTL_VBATSEL_2_1V
2.1 Volts (default)
0x2 : HIB_CTL_VBATSEL_2_3V
2.3 Volts
0x3 : HIB_CTL_VBATSEL_2_5V
2.5 Volts
End of enumeration elements list.
HIB_CTL_OSCBYP : Oscillator Bypass
bits : 16 - 32 (17 bit)
HIB_CTL_OSCDRV : Oscillator Drive Capability
bits : 17 - 34 (18 bit)
HIB_CTL_WRC : Write Complete/Capable
bits : 31 - 62 (32 bit)
Hibernation Control
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_CTL_RTCEN : RTC Timer Enable
bits : 0 - 0 (1 bit)
HIB_CTL_HIBREQ : Hibernation Request
bits : 1 - 2 (2 bit)
HIB_CTL_RTCWEN : RTC Wake-up Enable
bits : 3 - 6 (4 bit)
HIB_CTL_PINWEN : External Wake Pin Enable
bits : 4 - 8 (5 bit)
HIB_CTL_CLK32EN : Clocking Enable
bits : 6 - 12 (7 bit)
HIB_CTL_VABORT : Power Cut Abort Enable
bits : 7 - 14 (8 bit)
HIB_CTL_VDD3ON : VDD Powered
bits : 8 - 16 (9 bit)
HIB_CTL_BATWKEN : Wake on Low Battery
bits : 9 - 18 (10 bit)
HIB_CTL_BATCHK : Check Battery Status
bits : 10 - 20 (11 bit)
HIB_CTL_VBATSEL : Select for Low-Battery Comparator
bits : 13 - 27 (15 bit)
Enumeration:
0x0 : HIB_CTL_VBATSEL_1_9V
1.9 Volts
0x1 : HIB_CTL_VBATSEL_2_1V
2.1 Volts (default)
0x2 : HIB_CTL_VBATSEL_2_3V
2.3 Volts
0x3 : HIB_CTL_VBATSEL_2_5V
2.5 Volts
End of enumeration elements list.
HIB_CTL_OSCBYP : Oscillator Bypass
bits : 16 - 32 (17 bit)
HIB_CTL_OSCDRV : Oscillator Drive Capability
bits : 17 - 34 (18 bit)
HIB_CTL_WRC : Write Complete/Capable
bits : 31 - 62 (32 bit)
Hibernation Interrupt Mask
address_offset : 0x14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_IM_RTCALT0 : RTC Alert 0 Interrupt Mask
bits : 0 - 0 (1 bit)
HIB_IM_LOWBAT : Low Battery Voltage Interrupt Mask
bits : 2 - 4 (3 bit)
HIB_IM_EXTW : External Wake-Up Interrupt Mask
bits : 3 - 6 (4 bit)
HIB_IM_WC : External Write Complete/Capable Interrupt Mask
bits : 4 - 8 (5 bit)
Hibernation Interrupt Mask
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_IM_RTCALT0 : RTC Alert 0 Interrupt Mask
bits : 0 - 0 (1 bit)
HIB_IM_LOWBAT : Low Battery Voltage Interrupt Mask
bits : 2 - 4 (3 bit)
HIB_IM_EXTW : External Wake-Up Interrupt Mask
bits : 3 - 6 (4 bit)
HIB_IM_WC : External Write Complete/Capable Interrupt Mask
bits : 4 - 8 (5 bit)
Hibernation Raw Interrupt Status
address_offset : 0x18 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_RIS_RTCALT0 : RTC Alert 0 Raw Interrupt Status
bits : 0 - 0 (1 bit)
HIB_RIS_LOWBAT : Low Battery Voltage Raw Interrupt Status
bits : 2 - 4 (3 bit)
HIB_RIS_EXTW : External Wake-Up Raw Interrupt Status
bits : 3 - 6 (4 bit)
HIB_RIS_WC : Write Complete/Capable Raw Interrupt Status
bits : 4 - 8 (5 bit)
Hibernation Raw Interrupt Status
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_RIS_RTCALT0 : RTC Alert 0 Raw Interrupt Status
bits : 0 - 0 (1 bit)
HIB_RIS_LOWBAT : Low Battery Voltage Raw Interrupt Status
bits : 2 - 4 (3 bit)
HIB_RIS_EXTW : External Wake-Up Raw Interrupt Status
bits : 3 - 6 (4 bit)
HIB_RIS_WC : Write Complete/Capable Raw Interrupt Status
bits : 4 - 8 (5 bit)
Hibernation Masked Interrupt Status
address_offset : 0x1C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_MIS_RTCALT0 : RTC Alert 0 Masked Interrupt Status
bits : 0 - 0 (1 bit)
HIB_MIS_LOWBAT : Low Battery Voltage Masked Interrupt Status
bits : 2 - 4 (3 bit)
HIB_MIS_EXTW : External Wake-Up Masked Interrupt Status
bits : 3 - 6 (4 bit)
HIB_MIS_WC : Write Complete/Capable Masked Interrupt Status
bits : 4 - 8 (5 bit)
Hibernation Masked Interrupt Status
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_MIS_RTCALT0 : RTC Alert 0 Masked Interrupt Status
bits : 0 - 0 (1 bit)
HIB_MIS_LOWBAT : Low Battery Voltage Masked Interrupt Status
bits : 2 - 4 (3 bit)
HIB_MIS_EXTW : External Wake-Up Masked Interrupt Status
bits : 3 - 6 (4 bit)
HIB_MIS_WC : Write Complete/Capable Masked Interrupt Status
bits : 4 - 8 (5 bit)
Hibernation Interrupt Clear
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_IC_RTCALT0 : RTC Alert0 Masked Interrupt Clear
bits : 0 - 0 (1 bit)
HIB_IC_LOWBAT : Low Battery Voltage Interrupt Clear
bits : 2 - 4 (3 bit)
HIB_IC_EXTW : External Wake-Up Interrupt Clear
bits : 3 - 6 (4 bit)
HIB_IC_WC : Write Complete/Capable Interrupt Clear
bits : 4 - 8 (5 bit)
Hibernation Interrupt Clear
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_IC_RTCALT0 : RTC Alert0 Masked Interrupt Clear
bits : 0 - 0 (1 bit)
HIB_IC_LOWBAT : Low Battery Voltage Interrupt Clear
bits : 2 - 4 (3 bit)
HIB_IC_EXTW : External Wake-Up Interrupt Clear
bits : 3 - 6 (4 bit)
HIB_IC_WC : Write Complete/Capable Interrupt Clear
bits : 4 - 8 (5 bit)
Hibernation RTC Trim
address_offset : 0x24 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_RTCT_TRIM : RTC Trim Value
bits : 0 - 15 (16 bit)
Hibernation RTC Trim
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_RTCT_TRIM : RTC Trim Value
bits : 0 - 15 (16 bit)
Hibernation RTC Sub Seconds
address_offset : 0x28 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_RTCSS_RTCSSC : RTC Sub Seconds Count
bits : 0 - 14 (15 bit)
HIB_RTCSS_RTCSSM : RTC Sub Seconds Match
bits : 16 - 46 (31 bit)
Hibernation RTC Sub Seconds
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_RTCSS_RTCSSC : RTC Sub Seconds Count
bits : 0 - 14 (15 bit)
HIB_RTCSS_RTCSSM : RTC Sub Seconds Match
bits : 16 - 46 (31 bit)
Hibernation Data
address_offset : 0x30 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_DATA_RTD : Hibernation Module NV Data
bits : 0 - 31 (32 bit)
Hibernation Data
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_DATA_RTD : Hibernation Module NV Data
bits : 0 - 31 (32 bit)
Hibernation RTC Match 0
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_RTCM0 : RTC Match 0
bits : 0 - 31 (32 bit)
Hibernation RTC Match 0
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_RTCM0 : RTC Match 0
bits : 0 - 31 (32 bit)
Hibernation RTC Load
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_RTCLD : RTC Load
bits : 0 - 31 (32 bit)
Hibernation RTC Load
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIB_RTCLD : RTC Load
bits : 0 - 31 (32 bit)
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