\n
address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
RF Core Power Management and Clock Enable
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RFC : RFC
bits : 0 - 0 (1 bit)
CPE : CPE
bits : 1 - 2 (2 bit)
CPERAM : CPERAM
bits : 2 - 4 (3 bit)
MDM : MDM
bits : 3 - 6 (4 bit)
MDMRAM : MDMRAM
bits : 4 - 8 (5 bit)
RFE : RFE
bits : 5 - 10 (6 bit)
RFERAM : RFERAM
bits : 6 - 12 (7 bit)
RAT : RAT
bits : 7 - 14 (8 bit)
PHA : PHA
bits : 8 - 16 (9 bit)
FSCA : FSCA
bits : 9 - 18 (10 bit)
RFCTRC : RFCTRC
bits : 10 - 20 (11 bit)
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