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UDMA0

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

STATUS

WAITONREQ

SOFTREQ

SETBURST

CLEARBURST

SETREQMASK

CLEARREQMASK

SETCHANNELEN

CLEARCHANNELEN

SETCHNLPRIALT

CLEARCHNLPRIALT

SETCHNLPRIORITY

CLEARCHNLPRIORITY

CFG

ERROR

REQDONE

DONEMASK

CTRL

ALTCTRL


STATUS

Status
address_offset : 0x0 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STATUS STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MASTERENABLE STATE TOTALCHANNELS TEST

MASTERENABLE : MASTERENABLE
bits : 0 - 0 (1 bit)

STATE : STATE
bits : 4 - 11 (8 bit)

TOTALCHANNELS : TOTALCHANNELS
bits : 16 - 36 (21 bit)

TEST : TEST
bits : 28 - 59 (32 bit)


WAITONREQ

Channel Wait On Request Status
address_offset : 0x10 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

WAITONREQ WAITONREQ read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CHNLSTATUS

CHNLSTATUS : CHNLSTATUS
bits : 0 - 31 (32 bit)


SOFTREQ

Channel Software Request
address_offset : 0x14 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

SOFTREQ SOFTREQ write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CHNLS

CHNLS : CHNLS
bits : 0 - 31 (32 bit)


SETBURST

Channel Set UseBurst
address_offset : 0x18 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SETBURST SETBURST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CHNLS

CHNLS : CHNLS
bits : 0 - 31 (32 bit)


CLEARBURST

Channel Clear UseBurst
address_offset : 0x1C Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CLEARBURST CLEARBURST write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CHNLS

CHNLS : CHNLS
bits : 0 - 31 (32 bit)


SETREQMASK

Channel Set Request Mask
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SETREQMASK SETREQMASK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CHNLS

CHNLS : CHNLS
bits : 0 - 31 (32 bit)


CLEARREQMASK

Clear Channel Request Mask
address_offset : 0x24 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CLEARREQMASK CLEARREQMASK write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CHNLS

CHNLS : CHNLS
bits : 0 - 31 (32 bit)


SETCHANNELEN

Set Channel Enable
address_offset : 0x28 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SETCHANNELEN SETCHANNELEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CHNLS

CHNLS : CHNLS
bits : 0 - 31 (32 bit)


CLEARCHANNELEN

Clear Channel Enable
address_offset : 0x2C Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CLEARCHANNELEN CLEARCHANNELEN write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CHNLS

CHNLS : CHNLS
bits : 0 - 31 (32 bit)


SETCHNLPRIALT

Channel Set Primary-Alternate
address_offset : 0x30 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SETCHNLPRIALT SETCHNLPRIALT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CHNLS

CHNLS : CHNLS
bits : 0 - 31 (32 bit)


CLEARCHNLPRIALT

Channel Clear Primary-Alternate
address_offset : 0x34 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CLEARCHNLPRIALT CLEARCHNLPRIALT write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CHNLS

CHNLS : CHNLS
bits : 0 - 31 (32 bit)


SETCHNLPRIORITY

Set Channel Priority
address_offset : 0x38 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SETCHNLPRIORITY SETCHNLPRIORITY read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CHNLS

CHNLS : CHNLS
bits : 0 - 31 (32 bit)


CLEARCHNLPRIORITY

Clear Channel Priority
address_offset : 0x3C Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CLEARCHNLPRIORITY CLEARCHNLPRIORITY write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CHNLS

CHNLS : CHNLS
bits : 0 - 31 (32 bit)


CFG

Configuration
address_offset : 0x4 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CFG CFG write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MASTERENABLE PRTOCTRL

MASTERENABLE : MASTERENABLE
bits : 0 - 0 (1 bit)

PRTOCTRL : PRTOCTRL
bits : 5 - 12 (8 bit)


ERROR

Error Status and Clear
address_offset : 0x4C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ERROR ERROR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STATUS

STATUS : STATUS
bits : 0 - 0 (1 bit)


REQDONE

Channel Request Done
address_offset : 0x504 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

REQDONE REQDONE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CHNLS

CHNLS : CHNLS
bits : 0 - 31 (32 bit)


DONEMASK

Channel Request Done Mask
address_offset : 0x520 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DONEMASK DONEMASK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CHNLS

CHNLS : CHNLS
bits : 0 - 31 (32 bit)


CTRL

Channel Control Data Base Pointer
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BASEPTR

BASEPTR : BASEPTR
bits : 10 - 41 (32 bit)


ALTCTRL

Channel Alternate Control Data Base Pointer
address_offset : 0xC Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ALTCTRL ALTCTRL read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BASEPTR

BASEPTR : BASEPTR
bits : 0 - 31 (32 bit)



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