\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
I2C Configuration Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLEN : Slave Enable
bits : 0 - -1 (0 bit)
Enumeration:
0 : disable
I2C Slave disable
1 : enable
I2C Slave enable
End of enumeration elements list.
MAEN : Master Enable
bits : 2 - 1 (0 bit)
Enumeration:
0 : disable
I2C master disable
1 : enable
I2C Master enable
End of enumeration elements list.
ADDRMODE : Address Mode
bits : 4 - 3 (0 bit)
Enumeration:
0 : 7-bit
7-bit addressing
1 : 10-bit
10-bit addressing
End of enumeration elements list.
I2C master access control
address_offset : 0x30 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
I2CADDRL : Lower I2C address bits 6:0
bits : 0 - 5 (6 bit)
I2CADDRU : Upper I2C address bits 9:7
bits : 7 - 8 (2 bit)
RSTART : Repeated start
bits : 10 - 9 (0 bit)
Enumeration:
0 : no
STOP at end of transfer
1 : yes
No STOP at end of transfer, repeated START
End of enumeration elements list.
XFERTYPE : Master transfer type
bits : 11 - 10 (0 bit)
Enumeration:
0 : write
I2C Master write
1 : read
I2C Master read
End of enumeration elements list.
I2CMACTLF : I2CMACTL full
bits : 13 - 12 (0 bit)
Enumeration:
0 : not full
I2CMACTL processed, write allowed
1 : full
I2CMACTL full, write not allowed, cleared on read
End of enumeration elements list.
I2C master receive data
address_offset : 0x34 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MARXDATA : Master data byte received
bits : 0 - 6 (7 bit)
I2CMARXDATAF : I2CMARXDATA full
bits : 8 - 7 (0 bit)
access : read-only
Enumeration:
0 : empty
I2CMARXDATA register empty
1 : full
I2CMARXDATA register full, cleared on read
End of enumeration elements list.
I2C master transmit data
address_offset : 0x38 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MATXDATA : Master data byte to transmit
bits : 0 - 6 (7 bit)
I2CMATXDATAF : I2CMATXDATA full
bits : 8 - 7 (0 bit)
access : read-only
Enumeration:
0 : empty
I2CMATXDATA register empty
1 : full
I2CMATXDATA register full, cleared on read
End of enumeration elements list.
LBYTE : Last byte of transfer
bits : 9 - 8 (0 bit)
Enumeration:
0 : false
not last byte of transfer
1 : true
last byte of READ or WRITE indicator, initiate STOP after data transfer
End of enumeration elements list.
I2C Interrupt
address_offset : 0x4 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MATXE : Master transmit data register MATXDATA empty
bits : 0 - -1 (0 bit)
Enumeration:
0 : not transmitted
MATXDATA not transmitted since last read of I2CINT
1 : transmitted
MATXDATA transmitted to I2C bus, clears on read
End of enumeration elements list.
MACTLE : MACCTL access register accessed
bits : 1 - 0 (0 bit)
Enumeration:
0 : false
I2CMACTL not accessed by I2C engine since last read of I2CINT
1 : true
I2CMACTL processed by I2C engine, clears on read
End of enumeration elements list.
MARXF : Master receive data register MARXDATA full
bits : 2 - 1 (0 bit)
Enumeration:
0 : false
MARXDATA did not receive data since last read of I2CINT
1 : true
MARXDATA received data from I2C bus, cleared on read
End of enumeration elements list.
MAXFERDONEINT : Master transfer complete
bits : 8 - 7 (0 bit)
Enumeration:
0 : false
not done
1 : true
Master transfer complete, cleared on read
End of enumeration elements list.
MAADDRACKINT : Master address acknowledged
bits : 9 - 8 (0 bit)
Enumeration:
0 : ACK
Master address ACK'd
1 : NACK
Master address NACK'd, cleared on read
End of enumeration elements list.
MAARBLINT : Master lost arbitration
bits : 10 - 9 (0 bit)
Enumeration:
0 : false
no error
1 : true
Master lost arbitration, clear on read
End of enumeration elements list.
MADACKINT : Master data acknowledge
bits : 11 - 10 (0 bit)
Enumeration:
0 : ACK
Master data ACK'd
1 : NACK
Master data NACK'd, cleared on read
End of enumeration elements list.
SLADDRMINT : Slave address match
bits : 16 - 15 (0 bit)
Enumeration:
0 : none
no match
1 : match
Slave address match detected, cleared on read
End of enumeration elements list.
SLTXEINT : Slave transmit data register SLTXDATA empty
bits : 17 - 16 (0 bit)
Enumeration:
0 : false
SLTXDATA not transmitted since last read of I2CINT
1 : true
SLTXDATA transmitted to I2C bus, cleared on read
End of enumeration elements list.
SLRXFINT : Slave receive data register SLRXDATA full
bits : 18 - 17 (0 bit)
Enumeration:
0 : false
SLRXDATA did not receive data since last read of I2CINT
1 : true
SLRXDATA received data from I2C bus, cleared on read
End of enumeration elements list.
SLXFERDONEINT : Slave transfer done interrupt
bits : 24 - 23 (0 bit)
Enumeration:
0 : false
Slave transfer not completed
1 : true
Slave transfer complete, cleared on read
End of enumeration elements list.
I2C baud rate
address_offset : 0x40 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SCLL : Number of HCLK cycles for I2CCL low time
bits : 0 - 9 (10 bit)
SCLH : Number of HCLK cycles for I2CCCL high time
bits : 16 - 25 (10 bit)
I2C slave receive data
address_offset : 0x70 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLRXDATA : Slave data byte received
bits : 0 - 6 (7 bit)
I2CSLRXDATAF : I2CSLRXDATA full
bits : 8 - 7 (0 bit)
access : read-only
Enumeration:
0 : empty
I2CSLRXDATA register empty
1 : full
I2CSLRXDATA register full, data not transmitted
End of enumeration elements list.
I2C slave receive data
address_offset : 0x74 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLTXDATA : Slave data byte to transmit
bits : 0 - 6 (7 bit)
NACK : Slave ACK or NACK
bits : 8 - 7 (0 bit)
Enumeration:
0 : ACK
Issue ACK on I2C write
1 : NACK
Issue NACK on I2C write
End of enumeration elements list.
I2CSLTXDATAF : I2CSLTXDATA full
bits : 9 - 8 (0 bit)
access : read-only
Enumeration:
0 : empty
I2CSLTXDATA register empty
1 : full
I2CSLTXDATA register full, data not transmitted
End of enumeration elements list.
I2C slave address
address_offset : 0x78 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLADDRL : Lower slave address bits 6:0
bits : 0 - 5 (6 bit)
SLADDRH : Higher slave address bits9:7
bits : 7 - 8 (2 bit)
I2C Interrupt Enable
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MATXE : MATXE interrupt enable
bits : 0 - -1 (0 bit)
Enumeration:
0 : disabled
interrupt disabled
1 : enabled
interrupt enabled
End of enumeration elements list.
MACTLE : MACTLE interrupt enable
bits : 1 - 0 (0 bit)
Enumeration:
0 : disabled
interrupt disabled
1 : enabled
interrupt enabled
End of enumeration elements list.
MARXF : MARXF interrupt enable
bits : 2 - 1 (0 bit)
Enumeration:
0 : disabled
interrupt disabled
1 : enabled
interrupt enabled
End of enumeration elements list.
MAXFERDONE : MAXFERDONE interrupt enable
bits : 8 - 7 (0 bit)
Enumeration:
0 : disabled
interrupt disabled
1 : enabled
interrupt enabled
End of enumeration elements list.
SLADDRM : SLADDRM interrupt enable
bits : 16 - 15 (0 bit)
Enumeration:
0 : disabled
interrupt disabled
1 : enabled
interrupt enabled
End of enumeration elements list.
SLTXE : SLTXE interrupt enable
bits : 17 - 16 (0 bit)
Enumeration:
0 : disabled
interrupt disabled
1 : enabled
interrupt enabled
End of enumeration elements list.
SLRXF : SLRXF interrupt enable
bits : 18 - 17 (0 bit)
Enumeration:
0 : disabled
interrupt disabled
1 : enabled
interrupt enabled
End of enumeration elements list.
SLXFERDONEINTEN : SLXFERDONEINTEN interrupt enable
bits : 24 - 23 (0 bit)
Enumeration:
0 : disabled
interrupt disabled
1 : enabled
interrupt enabled
End of enumeration elements list.
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.