\n

AGPIO2

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CON

IN

OUT

SET

CLR

TGL

OEN

PE

IEN


CON

GPIO Port Configuration
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CON CON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PIN0CFG PIN1CFG PIN2CFG PIN3CFG PIN4CFG PIN5CFG PIN6CFG PIN7CFG

PIN0CFG : Pin 0 Configuration Bits
bits : 0 - 1 (2 bit)
access : read-write

PIN1CFG : Pin 1 Configuration Bits
bits : 2 - 3 (2 bit)
access : read-write

PIN2CFG : Pin 2 Configuration Bits
bits : 4 - 5 (2 bit)
access : read-write

PIN3CFG : Pin 3 Configuration Bits
bits : 6 - 7 (2 bit)
access : read-write

PIN4CFG : Pin 4 Configuration Bits
bits : 8 - 9 (2 bit)
access : read-write

PIN5CFG : Pin 5 Configuration Bits
bits : 10 - 11 (2 bit)
access : read-write

PIN6CFG : Pin 6 Configuration Bits
bits : 12 - 13 (2 bit)
access : read-write

PIN7CFG : Pin 7 Configuration Bits
bits : 14 - 15 (2 bit)
access : read-write


IN

GPIO Port Registered Data Input
address_offset : 0x10 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IN IN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IN

IN : Registered data input
bits : 0 - 15 (16 bit)
access : read-only


OUT

GPIO Port Data Output
address_offset : 0x14 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OUT OUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUT

OUT : Data out
bits : 0 - 15 (16 bit)
access : read-write


SET

GPIO Port Data Out Set
address_offset : 0x18 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SET SET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SET

SET : Set the output HIGH for the pin
bits : 0 - 15 (16 bit)
access : write-only


CLR

GPIO Port Data Out Clear
address_offset : 0x1C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLR CLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLR

CLR : Set the output low for the port pin
bits : 0 - 15 (16 bit)
access : write-only


TGL

GPIO Port Pin Toggle
address_offset : 0x20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TGL TGL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TGL

TGL : Toggle the output of the port pin
bits : 0 - 15 (16 bit)
access : write-only


OEN

GPIO Port Output Enable
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OEN OEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OEN

OEN : Pin Output Drive enable
bits : 0 - 15 (16 bit)
access : read-write


PE

GPIO Port Pullup/Pulldown Enable
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PE PE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PE

PE : Pin Pull enable
bits : 0 - 15 (16 bit)
access : read-write


IEN

GPIO Port Input Path Enable
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IEN IEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IEN

IEN : Input path enable
bits : 0 - 15 (16 bit)
access : read-write



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.