\n

DAC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x5C byte (0x0)
mem_usage : registers
protection : not protected

Registers

DACCON

DACDAT


DACCON

Control Register
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DACCON DACCON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RNG MDE CLR CLK BUFBYP NPN PD DMAEN

RNG : DAC Range bits
bits : 0 - 1 (2 bit)

Enumeration:

0 : IntVref

None

3 : AVdd

None

End of enumeration elements list.

MDE : Mode bits
bits : 2 - 3 (2 bit)

Enumeration:

0 : 12bit

None

3 : 16BitSlow

None

2 : 16BitFast

None

End of enumeration elements list.

CLR : bits
bits : 4 - 4 (1 bit)

Enumeration:

1 : Off

None

0 : On

None

End of enumeration elements list.

CLK : bits
bits : 5 - 5 (1 bit)

Enumeration:

0 : HCLK

None

1 : Timer1

None

End of enumeration elements list.

BUFBYP : TBD
bits : 6 - 6 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

NPN : TBD
bits : 8 - 8 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

PD : TBD
bits : 9 - 9 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

DMAEN : bits
bits : 10 - 10 (1 bit)

Enumeration:

0 : Off

None

1 : On

None

End of enumeration elements list.


DACDAT

Data Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DACDAT DACDAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : Data
bits : 12 - 31 (20 bit)



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.