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CLKG0_OSC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x50 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CTL

KEY


CTL

Oscillator Control
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTL CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LFCLK_MUX HFOSC_EN LFX_EN HFX_EN LFX_BYP LFX_MON_EN LFOSC_OK HFOSC_OK LFX_OK HFX_OK LFX_AUTSW_EN LFX_AUTSW_STA LFX_ROBUST_EN LFX_ROBUST_LD ROOT_MON_EN ROOT_AUTSW_EN ROOT_AUTSW_STA ROOT_FAIL_STA LFX_FAIL_STA

LFCLK_MUX : 32 kHz clock select mux
bits : 0 - 0 (1 bit)
access : read-write

HFOSC_EN : High frequency internal oscillator enable
bits : 1 - 1 (1 bit)
access : read-write

LFX_EN : Low frequency crystal oscillator enable
bits : 2 - 2 (1 bit)
access : read-write

HFX_EN : High frequency crystal oscillator enable
bits : 3 - 3 (1 bit)
access : read-write

LFX_BYP : Low frequency crystal oscillator Bypass
bits : 4 - 4 (1 bit)
access : read-write

LFX_MON_EN : LFXTAL clock monitor and Clock FAIL interrupt enable
bits : 5 - 5 (1 bit)
access : read-write

LFOSC_OK : Status of LFOSC oscillator
bits : 8 - 8 (1 bit)
access : read-only

HFOSC_OK : Status of HFOSC oscillator
bits : 9 - 9 (1 bit)
access : read-only

LFX_OK : Status of LFXTAL oscillator
bits : 10 - 10 (1 bit)
access : read-only

HFX_OK : Status of HFXTAL oscillator
bits : 11 - 11 (1 bit)
access : read-only

LFX_AUTSW_EN : Enables automatic Switching of the LF Mux to LFOSC on LFXTAL Failure
bits : 12 - 12 (1 bit)
access : read-write

LFX_AUTSW_STA : Status of automatic switching of the LF Mux to LFOSC upon detection of LFXTAL failure
bits : 13 - 13 (1 bit)
access : read-write

LFX_ROBUST_EN : LFXTAL Mode select
bits : 14 - 14 (1 bit)
access : read-write

LFX_ROBUST_LD : LFXTAL Robust Mode Load select
bits : 15 - 16 (2 bit)
access : read-write

ROOT_MON_EN : ROOT clock monitor and Clock FAIL interrupt enable
bits : 20 - 20 (1 bit)
access : read-write

ROOT_AUTSW_EN : Enables automatic Switching of the Root clock to HFOSC on Root clock Failure
bits : 21 - 21 (1 bit)
access : read-write

ROOT_AUTSW_STA : Status of automatic switching of the Root clock to HFOSC upon detection of Root clock failure
bits : 22 - 22 (1 bit)
access : read-write

ROOT_FAIL_STA : Root clock (crystal clock) Not Stable
bits : 30 - 30 (1 bit)
access : read-write

LFX_FAIL_STA : LF XTAL (crystal clock) Not Stable
bits : 31 - 31 (1 bit)
access : read-write


KEY

Key Protection for OSCCTRL
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEY KEY read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : Oscillator key
bits : 0 - 15 (16 bit)
access : write-only



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