\n
address_offset : 0x0 Bytes (0x0)
size : 0x200 byte (0x0)
mem_usage : registers
protection : not protected
PIO Enable Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : PIO Enable
bits : 0 - 0 (1 bit)
access : write-only
P1 : PIO Enable
bits : 1 - 1 (1 bit)
access : write-only
P2 : PIO Enable
bits : 2 - 2 (1 bit)
access : write-only
P3 : PIO Enable
bits : 3 - 3 (1 bit)
access : write-only
P4 : PIO Enable
bits : 4 - 4 (1 bit)
access : write-only
P5 : PIO Enable
bits : 5 - 5 (1 bit)
access : write-only
P6 : PIO Enable
bits : 6 - 6 (1 bit)
access : write-only
P7 : PIO Enable
bits : 7 - 7 (1 bit)
access : write-only
P8 : PIO Enable
bits : 8 - 8 (1 bit)
access : write-only
P9 : PIO Enable
bits : 9 - 9 (1 bit)
access : write-only
P10 : PIO Enable
bits : 10 - 10 (1 bit)
access : write-only
P11 : PIO Enable
bits : 11 - 11 (1 bit)
access : write-only
P12 : PIO Enable
bits : 12 - 12 (1 bit)
access : write-only
P13 : PIO Enable
bits : 13 - 13 (1 bit)
access : write-only
P14 : PIO Enable
bits : 14 - 14 (1 bit)
access : write-only
P15 : PIO Enable
bits : 15 - 15 (1 bit)
access : write-only
P16 : PIO Enable
bits : 16 - 16 (1 bit)
access : write-only
P17 : PIO Enable
bits : 17 - 17 (1 bit)
access : write-only
P18 : PIO Enable
bits : 18 - 18 (1 bit)
access : write-only
P19 : PIO Enable
bits : 19 - 19 (1 bit)
access : write-only
P20 : PIO Enable
bits : 20 - 20 (1 bit)
access : write-only
P21 : PIO Enable
bits : 21 - 21 (1 bit)
access : write-only
P22 : PIO Enable
bits : 22 - 22 (1 bit)
access : write-only
P23 : PIO Enable
bits : 23 - 23 (1 bit)
access : write-only
P24 : PIO Enable
bits : 24 - 24 (1 bit)
access : write-only
P25 : PIO Enable
bits : 25 - 25 (1 bit)
access : write-only
P26 : PIO Enable
bits : 26 - 26 (1 bit)
access : write-only
P27 : PIO Enable
bits : 27 - 27 (1 bit)
access : write-only
P28 : PIO Enable
bits : 28 - 28 (1 bit)
access : write-only
P29 : PIO Enable
bits : 29 - 29 (1 bit)
access : write-only
P30 : PIO Enable
bits : 30 - 30 (1 bit)
access : write-only
P31 : PIO Enable
bits : 31 - 31 (1 bit)
access : write-only
Output Enable Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Output Enable
bits : 0 - 0 (1 bit)
access : write-only
P1 : Output Enable
bits : 1 - 1 (1 bit)
access : write-only
P2 : Output Enable
bits : 2 - 2 (1 bit)
access : write-only
P3 : Output Enable
bits : 3 - 3 (1 bit)
access : write-only
P4 : Output Enable
bits : 4 - 4 (1 bit)
access : write-only
P5 : Output Enable
bits : 5 - 5 (1 bit)
access : write-only
P6 : Output Enable
bits : 6 - 6 (1 bit)
access : write-only
P7 : Output Enable
bits : 7 - 7 (1 bit)
access : write-only
P8 : Output Enable
bits : 8 - 8 (1 bit)
access : write-only
P9 : Output Enable
bits : 9 - 9 (1 bit)
access : write-only
P10 : Output Enable
bits : 10 - 10 (1 bit)
access : write-only
P11 : Output Enable
bits : 11 - 11 (1 bit)
access : write-only
P12 : Output Enable
bits : 12 - 12 (1 bit)
access : write-only
P13 : Output Enable
bits : 13 - 13 (1 bit)
access : write-only
P14 : Output Enable
bits : 14 - 14 (1 bit)
access : write-only
P15 : Output Enable
bits : 15 - 15 (1 bit)
access : write-only
P16 : Output Enable
bits : 16 - 16 (1 bit)
access : write-only
P17 : Output Enable
bits : 17 - 17 (1 bit)
access : write-only
P18 : Output Enable
bits : 18 - 18 (1 bit)
access : write-only
P19 : Output Enable
bits : 19 - 19 (1 bit)
access : write-only
P20 : Output Enable
bits : 20 - 20 (1 bit)
access : write-only
P21 : Output Enable
bits : 21 - 21 (1 bit)
access : write-only
P22 : Output Enable
bits : 22 - 22 (1 bit)
access : write-only
P23 : Output Enable
bits : 23 - 23 (1 bit)
access : write-only
P24 : Output Enable
bits : 24 - 24 (1 bit)
access : write-only
P25 : Output Enable
bits : 25 - 25 (1 bit)
access : write-only
P26 : Output Enable
bits : 26 - 26 (1 bit)
access : write-only
P27 : Output Enable
bits : 27 - 27 (1 bit)
access : write-only
P28 : Output Enable
bits : 28 - 28 (1 bit)
access : write-only
P29 : Output Enable
bits : 29 - 29 (1 bit)
access : write-only
P30 : Output Enable
bits : 30 - 30 (1 bit)
access : write-only
P31 : Output Enable
bits : 31 - 31 (1 bit)
access : write-only
Schmitt Trigger Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SCHMITT0 : Schmitt Trigger Control
bits : 0 - 0 (1 bit)
access : read-write
SCHMITT1 : Schmitt Trigger Control
bits : 1 - 1 (1 bit)
access : read-write
SCHMITT2 : Schmitt Trigger Control
bits : 2 - 2 (1 bit)
access : read-write
SCHMITT3 : Schmitt Trigger Control
bits : 3 - 3 (1 bit)
access : read-write
SCHMITT4 : Schmitt Trigger Control
bits : 4 - 4 (1 bit)
access : read-write
SCHMITT5 : Schmitt Trigger Control
bits : 5 - 5 (1 bit)
access : read-write
SCHMITT6 : Schmitt Trigger Control
bits : 6 - 6 (1 bit)
access : read-write
SCHMITT7 : Schmitt Trigger Control
bits : 7 - 7 (1 bit)
access : read-write
SCHMITT8 : Schmitt Trigger Control
bits : 8 - 8 (1 bit)
access : read-write
SCHMITT9 : Schmitt Trigger Control
bits : 9 - 9 (1 bit)
access : read-write
SCHMITT10 : Schmitt Trigger Control
bits : 10 - 10 (1 bit)
access : read-write
SCHMITT11 : Schmitt Trigger Control
bits : 11 - 11 (1 bit)
access : read-write
SCHMITT12 : Schmitt Trigger Control
bits : 12 - 12 (1 bit)
access : read-write
SCHMITT13 : Schmitt Trigger Control
bits : 13 - 13 (1 bit)
access : read-write
SCHMITT14 : Schmitt Trigger Control
bits : 14 - 14 (1 bit)
access : read-write
SCHMITT15 : Schmitt Trigger Control
bits : 15 - 15 (1 bit)
access : read-write
SCHMITT16 : Schmitt Trigger Control
bits : 16 - 16 (1 bit)
access : read-write
SCHMITT17 : Schmitt Trigger Control
bits : 17 - 17 (1 bit)
access : read-write
SCHMITT18 : Schmitt Trigger Control
bits : 18 - 18 (1 bit)
access : read-write
SCHMITT19 : Schmitt Trigger Control
bits : 19 - 19 (1 bit)
access : read-write
SCHMITT20 : Schmitt Trigger Control
bits : 20 - 20 (1 bit)
access : read-write
SCHMITT21 : Schmitt Trigger Control
bits : 21 - 21 (1 bit)
access : read-write
SCHMITT22 : Schmitt Trigger Control
bits : 22 - 22 (1 bit)
access : read-write
SCHMITT23 : Schmitt Trigger Control
bits : 23 - 23 (1 bit)
access : read-write
SCHMITT24 : Schmitt Trigger Control
bits : 24 - 24 (1 bit)
access : read-write
SCHMITT25 : Schmitt Trigger Control
bits : 25 - 25 (1 bit)
access : read-write
SCHMITT26 : Schmitt Trigger Control
bits : 26 - 26 (1 bit)
access : read-write
SCHMITT27 : Schmitt Trigger Control
bits : 27 - 27 (1 bit)
access : read-write
SCHMITT28 : Schmitt Trigger Control
bits : 28 - 28 (1 bit)
access : read-write
SCHMITT29 : Schmitt Trigger Control
bits : 29 - 29 (1 bit)
access : read-write
SCHMITT30 : Schmitt Trigger Control
bits : 30 - 30 (1 bit)
access : read-write
SCHMITT31 : Schmitt Trigger Control
bits : 31 - 31 (1 bit)
access : read-write
I/O Delay Register
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Delay0 : Delay Control for Simultaneous Switch Reduction
bits : 0 - 3 (4 bit)
access : read-write
Delay1 : Delay Control for Simultaneous Switch Reduction
bits : 4 - 7 (4 bit)
access : read-write
Delay2 : Delay Control for Simultaneous Switch Reduction
bits : 8 - 11 (4 bit)
access : read-write
Delay3 : Delay Control for Simultaneous Switch Reduction
bits : 12 - 15 (4 bit)
access : read-write
Delay4 : Delay Control for Simultaneous Switch Reduction
bits : 16 - 19 (4 bit)
access : read-write
Delay5 : Delay Control for Simultaneous Switch Reduction
bits : 20 - 23 (4 bit)
access : read-write
Delay6 : Delay Control for Simultaneous Switch Reduction
bits : 24 - 27 (4 bit)
access : read-write
Delay7 : Delay Control for Simultaneous Switch Reduction
bits : 28 - 31 (4 bit)
access : read-write
Output Disable Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Output Disable
bits : 0 - 0 (1 bit)
access : write-only
P1 : Output Disable
bits : 1 - 1 (1 bit)
access : write-only
P2 : Output Disable
bits : 2 - 2 (1 bit)
access : write-only
P3 : Output Disable
bits : 3 - 3 (1 bit)
access : write-only
P4 : Output Disable
bits : 4 - 4 (1 bit)
access : write-only
P5 : Output Disable
bits : 5 - 5 (1 bit)
access : write-only
P6 : Output Disable
bits : 6 - 6 (1 bit)
access : write-only
P7 : Output Disable
bits : 7 - 7 (1 bit)
access : write-only
P8 : Output Disable
bits : 8 - 8 (1 bit)
access : write-only
P9 : Output Disable
bits : 9 - 9 (1 bit)
access : write-only
P10 : Output Disable
bits : 10 - 10 (1 bit)
access : write-only
P11 : Output Disable
bits : 11 - 11 (1 bit)
access : write-only
P12 : Output Disable
bits : 12 - 12 (1 bit)
access : write-only
P13 : Output Disable
bits : 13 - 13 (1 bit)
access : write-only
P14 : Output Disable
bits : 14 - 14 (1 bit)
access : write-only
P15 : Output Disable
bits : 15 - 15 (1 bit)
access : write-only
P16 : Output Disable
bits : 16 - 16 (1 bit)
access : write-only
P17 : Output Disable
bits : 17 - 17 (1 bit)
access : write-only
P18 : Output Disable
bits : 18 - 18 (1 bit)
access : write-only
P19 : Output Disable
bits : 19 - 19 (1 bit)
access : write-only
P20 : Output Disable
bits : 20 - 20 (1 bit)
access : write-only
P21 : Output Disable
bits : 21 - 21 (1 bit)
access : write-only
P22 : Output Disable
bits : 22 - 22 (1 bit)
access : write-only
P23 : Output Disable
bits : 23 - 23 (1 bit)
access : write-only
P24 : Output Disable
bits : 24 - 24 (1 bit)
access : write-only
P25 : Output Disable
bits : 25 - 25 (1 bit)
access : write-only
P26 : Output Disable
bits : 26 - 26 (1 bit)
access : write-only
P27 : Output Disable
bits : 27 - 27 (1 bit)
access : write-only
P28 : Output Disable
bits : 28 - 28 (1 bit)
access : write-only
P29 : Output Disable
bits : 29 - 29 (1 bit)
access : write-only
P30 : Output Disable
bits : 30 - 30 (1 bit)
access : write-only
P31 : Output Disable
bits : 31 - 31 (1 bit)
access : write-only
Parallel Capture Mode Register
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PCEN : Parallel Capture Mode Enable
bits : 0 - 0 (1 bit)
access : read-write
DSIZE : Parallel Capture Mode Data Size
bits : 4 - 5 (2 bit)
access : read-write
Enumeration:
0x0 : BYTE
The reception data in the PIO_PCRHR is a byte (8-bit)
0x1 : HALFWORD
The reception data in the PIO_PCRHR is a half-word (16-bit)
0x2 : WORD
The reception data in the PIO_PCRHR is a word (32-bit)
End of enumeration elements list.
ALWYS : Parallel Capture Mode Always Sampling
bits : 9 - 9 (1 bit)
access : read-write
HALFS : Parallel Capture Mode Half Sampling
bits : 10 - 10 (1 bit)
access : read-write
FRSTS : Parallel Capture Mode First Sample
bits : 11 - 11 (1 bit)
access : read-write
Peripheral Select Register
address_offset : 0x154 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Peripheral Select
bits : 0 - 0 (1 bit)
access : read-write
P1 : Peripheral Select
bits : 1 - 1 (1 bit)
access : read-write
P2 : Peripheral Select
bits : 2 - 2 (1 bit)
access : read-write
P3 : Peripheral Select
bits : 3 - 3 (1 bit)
access : read-write
P4 : Peripheral Select
bits : 4 - 4 (1 bit)
access : read-write
P5 : Peripheral Select
bits : 5 - 5 (1 bit)
access : read-write
P6 : Peripheral Select
bits : 6 - 6 (1 bit)
access : read-write
P7 : Peripheral Select
bits : 7 - 7 (1 bit)
access : read-write
P8 : Peripheral Select
bits : 8 - 8 (1 bit)
access : read-write
P9 : Peripheral Select
bits : 9 - 9 (1 bit)
access : read-write
P10 : Peripheral Select
bits : 10 - 10 (1 bit)
access : read-write
P11 : Peripheral Select
bits : 11 - 11 (1 bit)
access : read-write
P12 : Peripheral Select
bits : 12 - 12 (1 bit)
access : read-write
P13 : Peripheral Select
bits : 13 - 13 (1 bit)
access : read-write
P14 : Peripheral Select
bits : 14 - 14 (1 bit)
access : read-write
P15 : Peripheral Select
bits : 15 - 15 (1 bit)
access : read-write
P16 : Peripheral Select
bits : 16 - 16 (1 bit)
access : read-write
P17 : Peripheral Select
bits : 17 - 17 (1 bit)
access : read-write
P18 : Peripheral Select
bits : 18 - 18 (1 bit)
access : read-write
P19 : Peripheral Select
bits : 19 - 19 (1 bit)
access : read-write
P20 : Peripheral Select
bits : 20 - 20 (1 bit)
access : read-write
P21 : Peripheral Select
bits : 21 - 21 (1 bit)
access : read-write
P22 : Peripheral Select
bits : 22 - 22 (1 bit)
access : read-write
P23 : Peripheral Select
bits : 23 - 23 (1 bit)
access : read-write
P24 : Peripheral Select
bits : 24 - 24 (1 bit)
access : read-write
P25 : Peripheral Select
bits : 25 - 25 (1 bit)
access : read-write
P26 : Peripheral Select
bits : 26 - 26 (1 bit)
access : read-write
P27 : Peripheral Select
bits : 27 - 27 (1 bit)
access : read-write
P28 : Peripheral Select
bits : 28 - 28 (1 bit)
access : read-write
P29 : Peripheral Select
bits : 29 - 29 (1 bit)
access : read-write
P30 : Peripheral Select
bits : 30 - 30 (1 bit)
access : read-write
P31 : Peripheral Select
bits : 31 - 31 (1 bit)
access : read-write
Parallel Capture Interrupt Enable Register
address_offset : 0x154 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
DRDY : Parallel Capture Mode Data Ready Interrupt Enable
bits : 0 - 0 (1 bit)
access : write-only
OVRE : Parallel Capture Mode Overrun Error Interrupt Enable
bits : 1 - 1 (1 bit)
access : write-only
ENDRX : End of Reception Transfer Interrupt Enable
bits : 2 - 2 (1 bit)
access : write-only
RXBUFF : Reception Buffer Full Interrupt Enable
bits : 3 - 3 (1 bit)
access : write-only
Parallel Capture Interrupt Disable Register
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
DRDY : Parallel Capture Mode Data Ready Interrupt Disable
bits : 0 - 0 (1 bit)
access : write-only
OVRE : Parallel Capture Mode Overrun Error Interrupt Disable
bits : 1 - 1 (1 bit)
access : write-only
ENDRX : End of Reception Transfer Interrupt Disable
bits : 2 - 2 (1 bit)
access : write-only
RXBUFF : Reception Buffer Full Interrupt Disable
bits : 3 - 3 (1 bit)
access : write-only
Parallel Capture Interrupt Mask Register
address_offset : 0x15C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DRDY : Parallel Capture Mode Data Ready Interrupt Mask
bits : 0 - 0 (1 bit)
access : read-only
OVRE : Parallel Capture Mode Overrun Error Interrupt Mask
bits : 1 - 1 (1 bit)
access : read-only
ENDRX : End of Reception Transfer Interrupt Mask
bits : 2 - 2 (1 bit)
access : read-only
RXBUFF : Reception Buffer Full Interrupt Mask
bits : 3 - 3 (1 bit)
access : read-only
Parallel Capture Interrupt Status Register
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DRDY : Parallel Capture Mode Data Ready
bits : 0 - 0 (1 bit)
access : read-only
OVRE : Parallel Capture Mode Overrun Error.
bits : 1 - 1 (1 bit)
access : read-only
ENDRX : End of Reception Transfer.
bits : 2 - 2 (1 bit)
access : read-only
RXBUFF : Reception Buffer Full
bits : 3 - 3 (1 bit)
access : read-only
Parallel Capture Reception Holding Register
address_offset : 0x164 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RDATA : Parallel Capture Mode Reception Data.
bits : 0 - 31 (32 bit)
access : read-only
Receive Pointer Register
address_offset : 0x168 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RXPTR : Receive Pointer Register
bits : 0 - 31 (32 bit)
access : read-write
Receive Counter Register
address_offset : 0x16C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RXCTR : Receive Counter Register
bits : 0 - 15 (16 bit)
access : read-write
Receive Next Pointer Register
address_offset : 0x178 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RXNPTR : Receive Next Pointer
bits : 0 - 31 (32 bit)
access : read-write
Receive Next Counter Register
address_offset : 0x17C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RXNCTR : Receive Next Counter
bits : 0 - 15 (16 bit)
access : read-write
Output Status Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Output Status
bits : 0 - 0 (1 bit)
access : read-only
P1 : Output Status
bits : 1 - 1 (1 bit)
access : read-only
P2 : Output Status
bits : 2 - 2 (1 bit)
access : read-only
P3 : Output Status
bits : 3 - 3 (1 bit)
access : read-only
P4 : Output Status
bits : 4 - 4 (1 bit)
access : read-only
P5 : Output Status
bits : 5 - 5 (1 bit)
access : read-only
P6 : Output Status
bits : 6 - 6 (1 bit)
access : read-only
P7 : Output Status
bits : 7 - 7 (1 bit)
access : read-only
P8 : Output Status
bits : 8 - 8 (1 bit)
access : read-only
P9 : Output Status
bits : 9 - 9 (1 bit)
access : read-only
P10 : Output Status
bits : 10 - 10 (1 bit)
access : read-only
P11 : Output Status
bits : 11 - 11 (1 bit)
access : read-only
P12 : Output Status
bits : 12 - 12 (1 bit)
access : read-only
P13 : Output Status
bits : 13 - 13 (1 bit)
access : read-only
P14 : Output Status
bits : 14 - 14 (1 bit)
access : read-only
P15 : Output Status
bits : 15 - 15 (1 bit)
access : read-only
P16 : Output Status
bits : 16 - 16 (1 bit)
access : read-only
P17 : Output Status
bits : 17 - 17 (1 bit)
access : read-only
P18 : Output Status
bits : 18 - 18 (1 bit)
access : read-only
P19 : Output Status
bits : 19 - 19 (1 bit)
access : read-only
P20 : Output Status
bits : 20 - 20 (1 bit)
access : read-only
P21 : Output Status
bits : 21 - 21 (1 bit)
access : read-only
P22 : Output Status
bits : 22 - 22 (1 bit)
access : read-only
P23 : Output Status
bits : 23 - 23 (1 bit)
access : read-only
P24 : Output Status
bits : 24 - 24 (1 bit)
access : read-only
P25 : Output Status
bits : 25 - 25 (1 bit)
access : read-only
P26 : Output Status
bits : 26 - 26 (1 bit)
access : read-only
P27 : Output Status
bits : 27 - 27 (1 bit)
access : read-only
P28 : Output Status
bits : 28 - 28 (1 bit)
access : read-only
P29 : Output Status
bits : 29 - 29 (1 bit)
access : read-only
P30 : Output Status
bits : 30 - 30 (1 bit)
access : read-only
P31 : Output Status
bits : 31 - 31 (1 bit)
access : read-only
Transfer Control Register
address_offset : 0x188 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
RXTEN : Receiver Transfer Enable
bits : 0 - 0 (1 bit)
access : write-only
RXTDIS : Receiver Transfer Disable
bits : 1 - 1 (1 bit)
access : write-only
TXTEN : Transmitter Transfer Enable
bits : 8 - 8 (1 bit)
access : write-only
TXTDIS : Transmitter Transfer Disable
bits : 9 - 9 (1 bit)
access : write-only
Transfer Status Register
address_offset : 0x18C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RXTEN : Receiver Transfer Enable
bits : 0 - 0 (1 bit)
access : read-only
TXTEN : Transmitter Transfer Enable
bits : 8 - 8 (1 bit)
access : read-only
Glitch Input Filter Enable Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Input Filter Enable
bits : 0 - 0 (1 bit)
access : write-only
P1 : Input Filter Enable
bits : 1 - 1 (1 bit)
access : write-only
P2 : Input Filter Enable
bits : 2 - 2 (1 bit)
access : write-only
P3 : Input Filter Enable
bits : 3 - 3 (1 bit)
access : write-only
P4 : Input Filter Enable
bits : 4 - 4 (1 bit)
access : write-only
P5 : Input Filter Enable
bits : 5 - 5 (1 bit)
access : write-only
P6 : Input Filter Enable
bits : 6 - 6 (1 bit)
access : write-only
P7 : Input Filter Enable
bits : 7 - 7 (1 bit)
access : write-only
P8 : Input Filter Enable
bits : 8 - 8 (1 bit)
access : write-only
P9 : Input Filter Enable
bits : 9 - 9 (1 bit)
access : write-only
P10 : Input Filter Enable
bits : 10 - 10 (1 bit)
access : write-only
P11 : Input Filter Enable
bits : 11 - 11 (1 bit)
access : write-only
P12 : Input Filter Enable
bits : 12 - 12 (1 bit)
access : write-only
P13 : Input Filter Enable
bits : 13 - 13 (1 bit)
access : write-only
P14 : Input Filter Enable
bits : 14 - 14 (1 bit)
access : write-only
P15 : Input Filter Enable
bits : 15 - 15 (1 bit)
access : write-only
P16 : Input Filter Enable
bits : 16 - 16 (1 bit)
access : write-only
P17 : Input Filter Enable
bits : 17 - 17 (1 bit)
access : write-only
P18 : Input Filter Enable
bits : 18 - 18 (1 bit)
access : write-only
P19 : Input Filter Enable
bits : 19 - 19 (1 bit)
access : write-only
P20 : Input Filter Enable
bits : 20 - 20 (1 bit)
access : write-only
P21 : Input Filter Enable
bits : 21 - 21 (1 bit)
access : write-only
P22 : Input Filter Enable
bits : 22 - 22 (1 bit)
access : write-only
P23 : Input Filter Enable
bits : 23 - 23 (1 bit)
access : write-only
P24 : Input Filter Enable
bits : 24 - 24 (1 bit)
access : write-only
P25 : Input Filter Enable
bits : 25 - 25 (1 bit)
access : write-only
P26 : Input Filter Enable
bits : 26 - 26 (1 bit)
access : write-only
P27 : Input Filter Enable
bits : 27 - 27 (1 bit)
access : write-only
P28 : Input Filter Enable
bits : 28 - 28 (1 bit)
access : write-only
P29 : Input Filter Enable
bits : 29 - 29 (1 bit)
access : write-only
P30 : Input Filter Enable
bits : 30 - 30 (1 bit)
access : write-only
P31 : Input Filter Enable
bits : 31 - 31 (1 bit)
access : write-only
Glitch Input Filter Disable Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Input Filter Disable
bits : 0 - 0 (1 bit)
access : write-only
P1 : Input Filter Disable
bits : 1 - 1 (1 bit)
access : write-only
P2 : Input Filter Disable
bits : 2 - 2 (1 bit)
access : write-only
P3 : Input Filter Disable
bits : 3 - 3 (1 bit)
access : write-only
P4 : Input Filter Disable
bits : 4 - 4 (1 bit)
access : write-only
P5 : Input Filter Disable
bits : 5 - 5 (1 bit)
access : write-only
P6 : Input Filter Disable
bits : 6 - 6 (1 bit)
access : write-only
P7 : Input Filter Disable
bits : 7 - 7 (1 bit)
access : write-only
P8 : Input Filter Disable
bits : 8 - 8 (1 bit)
access : write-only
P9 : Input Filter Disable
bits : 9 - 9 (1 bit)
access : write-only
P10 : Input Filter Disable
bits : 10 - 10 (1 bit)
access : write-only
P11 : Input Filter Disable
bits : 11 - 11 (1 bit)
access : write-only
P12 : Input Filter Disable
bits : 12 - 12 (1 bit)
access : write-only
P13 : Input Filter Disable
bits : 13 - 13 (1 bit)
access : write-only
P14 : Input Filter Disable
bits : 14 - 14 (1 bit)
access : write-only
P15 : Input Filter Disable
bits : 15 - 15 (1 bit)
access : write-only
P16 : Input Filter Disable
bits : 16 - 16 (1 bit)
access : write-only
P17 : Input Filter Disable
bits : 17 - 17 (1 bit)
access : write-only
P18 : Input Filter Disable
bits : 18 - 18 (1 bit)
access : write-only
P19 : Input Filter Disable
bits : 19 - 19 (1 bit)
access : write-only
P20 : Input Filter Disable
bits : 20 - 20 (1 bit)
access : write-only
P21 : Input Filter Disable
bits : 21 - 21 (1 bit)
access : write-only
P22 : Input Filter Disable
bits : 22 - 22 (1 bit)
access : write-only
P23 : Input Filter Disable
bits : 23 - 23 (1 bit)
access : write-only
P24 : Input Filter Disable
bits : 24 - 24 (1 bit)
access : write-only
P25 : Input Filter Disable
bits : 25 - 25 (1 bit)
access : write-only
P26 : Input Filter Disable
bits : 26 - 26 (1 bit)
access : write-only
P27 : Input Filter Disable
bits : 27 - 27 (1 bit)
access : write-only
P28 : Input Filter Disable
bits : 28 - 28 (1 bit)
access : write-only
P29 : Input Filter Disable
bits : 29 - 29 (1 bit)
access : write-only
P30 : Input Filter Disable
bits : 30 - 30 (1 bit)
access : write-only
P31 : Input Filter Disable
bits : 31 - 31 (1 bit)
access : write-only
Glitch Input Filter Status Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Input Filer Status
bits : 0 - 0 (1 bit)
access : read-only
P1 : Input Filer Status
bits : 1 - 1 (1 bit)
access : read-only
P2 : Input Filer Status
bits : 2 - 2 (1 bit)
access : read-only
P3 : Input Filer Status
bits : 3 - 3 (1 bit)
access : read-only
P4 : Input Filer Status
bits : 4 - 4 (1 bit)
access : read-only
P5 : Input Filer Status
bits : 5 - 5 (1 bit)
access : read-only
P6 : Input Filer Status
bits : 6 - 6 (1 bit)
access : read-only
P7 : Input Filer Status
bits : 7 - 7 (1 bit)
access : read-only
P8 : Input Filer Status
bits : 8 - 8 (1 bit)
access : read-only
P9 : Input Filer Status
bits : 9 - 9 (1 bit)
access : read-only
P10 : Input Filer Status
bits : 10 - 10 (1 bit)
access : read-only
P11 : Input Filer Status
bits : 11 - 11 (1 bit)
access : read-only
P12 : Input Filer Status
bits : 12 - 12 (1 bit)
access : read-only
P13 : Input Filer Status
bits : 13 - 13 (1 bit)
access : read-only
P14 : Input Filer Status
bits : 14 - 14 (1 bit)
access : read-only
P15 : Input Filer Status
bits : 15 - 15 (1 bit)
access : read-only
P16 : Input Filer Status
bits : 16 - 16 (1 bit)
access : read-only
P17 : Input Filer Status
bits : 17 - 17 (1 bit)
access : read-only
P18 : Input Filer Status
bits : 18 - 18 (1 bit)
access : read-only
P19 : Input Filer Status
bits : 19 - 19 (1 bit)
access : read-only
P20 : Input Filer Status
bits : 20 - 20 (1 bit)
access : read-only
P21 : Input Filer Status
bits : 21 - 21 (1 bit)
access : read-only
P22 : Input Filer Status
bits : 22 - 22 (1 bit)
access : read-only
P23 : Input Filer Status
bits : 23 - 23 (1 bit)
access : read-only
P24 : Input Filer Status
bits : 24 - 24 (1 bit)
access : read-only
P25 : Input Filer Status
bits : 25 - 25 (1 bit)
access : read-only
P26 : Input Filer Status
bits : 26 - 26 (1 bit)
access : read-only
P27 : Input Filer Status
bits : 27 - 27 (1 bit)
access : read-only
P28 : Input Filer Status
bits : 28 - 28 (1 bit)
access : read-only
P29 : Input Filer Status
bits : 29 - 29 (1 bit)
access : read-only
P30 : Input Filer Status
bits : 30 - 30 (1 bit)
access : read-only
P31 : Input Filer Status
bits : 31 - 31 (1 bit)
access : read-only
Set Output Data Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Set Output Data
bits : 0 - 0 (1 bit)
access : write-only
P1 : Set Output Data
bits : 1 - 1 (1 bit)
access : write-only
P2 : Set Output Data
bits : 2 - 2 (1 bit)
access : write-only
P3 : Set Output Data
bits : 3 - 3 (1 bit)
access : write-only
P4 : Set Output Data
bits : 4 - 4 (1 bit)
access : write-only
P5 : Set Output Data
bits : 5 - 5 (1 bit)
access : write-only
P6 : Set Output Data
bits : 6 - 6 (1 bit)
access : write-only
P7 : Set Output Data
bits : 7 - 7 (1 bit)
access : write-only
P8 : Set Output Data
bits : 8 - 8 (1 bit)
access : write-only
P9 : Set Output Data
bits : 9 - 9 (1 bit)
access : write-only
P10 : Set Output Data
bits : 10 - 10 (1 bit)
access : write-only
P11 : Set Output Data
bits : 11 - 11 (1 bit)
access : write-only
P12 : Set Output Data
bits : 12 - 12 (1 bit)
access : write-only
P13 : Set Output Data
bits : 13 - 13 (1 bit)
access : write-only
P14 : Set Output Data
bits : 14 - 14 (1 bit)
access : write-only
P15 : Set Output Data
bits : 15 - 15 (1 bit)
access : write-only
P16 : Set Output Data
bits : 16 - 16 (1 bit)
access : write-only
P17 : Set Output Data
bits : 17 - 17 (1 bit)
access : write-only
P18 : Set Output Data
bits : 18 - 18 (1 bit)
access : write-only
P19 : Set Output Data
bits : 19 - 19 (1 bit)
access : write-only
P20 : Set Output Data
bits : 20 - 20 (1 bit)
access : write-only
P21 : Set Output Data
bits : 21 - 21 (1 bit)
access : write-only
P22 : Set Output Data
bits : 22 - 22 (1 bit)
access : write-only
P23 : Set Output Data
bits : 23 - 23 (1 bit)
access : write-only
P24 : Set Output Data
bits : 24 - 24 (1 bit)
access : write-only
P25 : Set Output Data
bits : 25 - 25 (1 bit)
access : write-only
P26 : Set Output Data
bits : 26 - 26 (1 bit)
access : write-only
P27 : Set Output Data
bits : 27 - 27 (1 bit)
access : write-only
P28 : Set Output Data
bits : 28 - 28 (1 bit)
access : write-only
P29 : Set Output Data
bits : 29 - 29 (1 bit)
access : write-only
P30 : Set Output Data
bits : 30 - 30 (1 bit)
access : write-only
P31 : Set Output Data
bits : 31 - 31 (1 bit)
access : write-only
Clear Output Data Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Clear Output Data
bits : 0 - 0 (1 bit)
access : write-only
P1 : Clear Output Data
bits : 1 - 1 (1 bit)
access : write-only
P2 : Clear Output Data
bits : 2 - 2 (1 bit)
access : write-only
P3 : Clear Output Data
bits : 3 - 3 (1 bit)
access : write-only
P4 : Clear Output Data
bits : 4 - 4 (1 bit)
access : write-only
P5 : Clear Output Data
bits : 5 - 5 (1 bit)
access : write-only
P6 : Clear Output Data
bits : 6 - 6 (1 bit)
access : write-only
P7 : Clear Output Data
bits : 7 - 7 (1 bit)
access : write-only
P8 : Clear Output Data
bits : 8 - 8 (1 bit)
access : write-only
P9 : Clear Output Data
bits : 9 - 9 (1 bit)
access : write-only
P10 : Clear Output Data
bits : 10 - 10 (1 bit)
access : write-only
P11 : Clear Output Data
bits : 11 - 11 (1 bit)
access : write-only
P12 : Clear Output Data
bits : 12 - 12 (1 bit)
access : write-only
P13 : Clear Output Data
bits : 13 - 13 (1 bit)
access : write-only
P14 : Clear Output Data
bits : 14 - 14 (1 bit)
access : write-only
P15 : Clear Output Data
bits : 15 - 15 (1 bit)
access : write-only
P16 : Clear Output Data
bits : 16 - 16 (1 bit)
access : write-only
P17 : Clear Output Data
bits : 17 - 17 (1 bit)
access : write-only
P18 : Clear Output Data
bits : 18 - 18 (1 bit)
access : write-only
P19 : Clear Output Data
bits : 19 - 19 (1 bit)
access : write-only
P20 : Clear Output Data
bits : 20 - 20 (1 bit)
access : write-only
P21 : Clear Output Data
bits : 21 - 21 (1 bit)
access : write-only
P22 : Clear Output Data
bits : 22 - 22 (1 bit)
access : write-only
P23 : Clear Output Data
bits : 23 - 23 (1 bit)
access : write-only
P24 : Clear Output Data
bits : 24 - 24 (1 bit)
access : write-only
P25 : Clear Output Data
bits : 25 - 25 (1 bit)
access : write-only
P26 : Clear Output Data
bits : 26 - 26 (1 bit)
access : write-only
P27 : Clear Output Data
bits : 27 - 27 (1 bit)
access : write-only
P28 : Clear Output Data
bits : 28 - 28 (1 bit)
access : write-only
P29 : Clear Output Data
bits : 29 - 29 (1 bit)
access : write-only
P30 : Clear Output Data
bits : 30 - 30 (1 bit)
access : write-only
P31 : Clear Output Data
bits : 31 - 31 (1 bit)
access : write-only
Output Data Status Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Output Data Status
bits : 0 - 0 (1 bit)
access : read-write
P1 : Output Data Status
bits : 1 - 1 (1 bit)
access : read-write
P2 : Output Data Status
bits : 2 - 2 (1 bit)
access : read-write
P3 : Output Data Status
bits : 3 - 3 (1 bit)
access : read-write
P4 : Output Data Status
bits : 4 - 4 (1 bit)
access : read-write
P5 : Output Data Status
bits : 5 - 5 (1 bit)
access : read-write
P6 : Output Data Status
bits : 6 - 6 (1 bit)
access : read-write
P7 : Output Data Status
bits : 7 - 7 (1 bit)
access : read-write
P8 : Output Data Status
bits : 8 - 8 (1 bit)
access : read-write
P9 : Output Data Status
bits : 9 - 9 (1 bit)
access : read-write
P10 : Output Data Status
bits : 10 - 10 (1 bit)
access : read-write
P11 : Output Data Status
bits : 11 - 11 (1 bit)
access : read-write
P12 : Output Data Status
bits : 12 - 12 (1 bit)
access : read-write
P13 : Output Data Status
bits : 13 - 13 (1 bit)
access : read-write
P14 : Output Data Status
bits : 14 - 14 (1 bit)
access : read-write
P15 : Output Data Status
bits : 15 - 15 (1 bit)
access : read-write
P16 : Output Data Status
bits : 16 - 16 (1 bit)
access : read-write
P17 : Output Data Status
bits : 17 - 17 (1 bit)
access : read-write
P18 : Output Data Status
bits : 18 - 18 (1 bit)
access : read-write
P19 : Output Data Status
bits : 19 - 19 (1 bit)
access : read-write
P20 : Output Data Status
bits : 20 - 20 (1 bit)
access : read-write
P21 : Output Data Status
bits : 21 - 21 (1 bit)
access : read-write
P22 : Output Data Status
bits : 22 - 22 (1 bit)
access : read-write
P23 : Output Data Status
bits : 23 - 23 (1 bit)
access : read-write
P24 : Output Data Status
bits : 24 - 24 (1 bit)
access : read-write
P25 : Output Data Status
bits : 25 - 25 (1 bit)
access : read-write
P26 : Output Data Status
bits : 26 - 26 (1 bit)
access : read-write
P27 : Output Data Status
bits : 27 - 27 (1 bit)
access : read-write
P28 : Output Data Status
bits : 28 - 28 (1 bit)
access : read-write
P29 : Output Data Status
bits : 29 - 29 (1 bit)
access : read-write
P30 : Output Data Status
bits : 30 - 30 (1 bit)
access : read-write
P31 : Output Data Status
bits : 31 - 31 (1 bit)
access : read-write
Pin Data Status Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Output Data Status
bits : 0 - 0 (1 bit)
access : read-only
P1 : Output Data Status
bits : 1 - 1 (1 bit)
access : read-only
P2 : Output Data Status
bits : 2 - 2 (1 bit)
access : read-only
P3 : Output Data Status
bits : 3 - 3 (1 bit)
access : read-only
P4 : Output Data Status
bits : 4 - 4 (1 bit)
access : read-only
P5 : Output Data Status
bits : 5 - 5 (1 bit)
access : read-only
P6 : Output Data Status
bits : 6 - 6 (1 bit)
access : read-only
P7 : Output Data Status
bits : 7 - 7 (1 bit)
access : read-only
P8 : Output Data Status
bits : 8 - 8 (1 bit)
access : read-only
P9 : Output Data Status
bits : 9 - 9 (1 bit)
access : read-only
P10 : Output Data Status
bits : 10 - 10 (1 bit)
access : read-only
P11 : Output Data Status
bits : 11 - 11 (1 bit)
access : read-only
P12 : Output Data Status
bits : 12 - 12 (1 bit)
access : read-only
P13 : Output Data Status
bits : 13 - 13 (1 bit)
access : read-only
P14 : Output Data Status
bits : 14 - 14 (1 bit)
access : read-only
P15 : Output Data Status
bits : 15 - 15 (1 bit)
access : read-only
P16 : Output Data Status
bits : 16 - 16 (1 bit)
access : read-only
P17 : Output Data Status
bits : 17 - 17 (1 bit)
access : read-only
P18 : Output Data Status
bits : 18 - 18 (1 bit)
access : read-only
P19 : Output Data Status
bits : 19 - 19 (1 bit)
access : read-only
P20 : Output Data Status
bits : 20 - 20 (1 bit)
access : read-only
P21 : Output Data Status
bits : 21 - 21 (1 bit)
access : read-only
P22 : Output Data Status
bits : 22 - 22 (1 bit)
access : read-only
P23 : Output Data Status
bits : 23 - 23 (1 bit)
access : read-only
P24 : Output Data Status
bits : 24 - 24 (1 bit)
access : read-only
P25 : Output Data Status
bits : 25 - 25 (1 bit)
access : read-only
P26 : Output Data Status
bits : 26 - 26 (1 bit)
access : read-only
P27 : Output Data Status
bits : 27 - 27 (1 bit)
access : read-only
P28 : Output Data Status
bits : 28 - 28 (1 bit)
access : read-only
P29 : Output Data Status
bits : 29 - 29 (1 bit)
access : read-only
P30 : Output Data Status
bits : 30 - 30 (1 bit)
access : read-only
P31 : Output Data Status
bits : 31 - 31 (1 bit)
access : read-only
PIO Disable Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : PIO Disable
bits : 0 - 0 (1 bit)
access : write-only
P1 : PIO Disable
bits : 1 - 1 (1 bit)
access : write-only
P2 : PIO Disable
bits : 2 - 2 (1 bit)
access : write-only
P3 : PIO Disable
bits : 3 - 3 (1 bit)
access : write-only
P4 : PIO Disable
bits : 4 - 4 (1 bit)
access : write-only
P5 : PIO Disable
bits : 5 - 5 (1 bit)
access : write-only
P6 : PIO Disable
bits : 6 - 6 (1 bit)
access : write-only
P7 : PIO Disable
bits : 7 - 7 (1 bit)
access : write-only
P8 : PIO Disable
bits : 8 - 8 (1 bit)
access : write-only
P9 : PIO Disable
bits : 9 - 9 (1 bit)
access : write-only
P10 : PIO Disable
bits : 10 - 10 (1 bit)
access : write-only
P11 : PIO Disable
bits : 11 - 11 (1 bit)
access : write-only
P12 : PIO Disable
bits : 12 - 12 (1 bit)
access : write-only
P13 : PIO Disable
bits : 13 - 13 (1 bit)
access : write-only
P14 : PIO Disable
bits : 14 - 14 (1 bit)
access : write-only
P15 : PIO Disable
bits : 15 - 15 (1 bit)
access : write-only
P16 : PIO Disable
bits : 16 - 16 (1 bit)
access : write-only
P17 : PIO Disable
bits : 17 - 17 (1 bit)
access : write-only
P18 : PIO Disable
bits : 18 - 18 (1 bit)
access : write-only
P19 : PIO Disable
bits : 19 - 19 (1 bit)
access : write-only
P20 : PIO Disable
bits : 20 - 20 (1 bit)
access : write-only
P21 : PIO Disable
bits : 21 - 21 (1 bit)
access : write-only
P22 : PIO Disable
bits : 22 - 22 (1 bit)
access : write-only
P23 : PIO Disable
bits : 23 - 23 (1 bit)
access : write-only
P24 : PIO Disable
bits : 24 - 24 (1 bit)
access : write-only
P25 : PIO Disable
bits : 25 - 25 (1 bit)
access : write-only
P26 : PIO Disable
bits : 26 - 26 (1 bit)
access : write-only
P27 : PIO Disable
bits : 27 - 27 (1 bit)
access : write-only
P28 : PIO Disable
bits : 28 - 28 (1 bit)
access : write-only
P29 : PIO Disable
bits : 29 - 29 (1 bit)
access : write-only
P30 : PIO Disable
bits : 30 - 30 (1 bit)
access : write-only
P31 : PIO Disable
bits : 31 - 31 (1 bit)
access : write-only
Interrupt Enable Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Input Change Interrupt Enable
bits : 0 - 0 (1 bit)
access : write-only
P1 : Input Change Interrupt Enable
bits : 1 - 1 (1 bit)
access : write-only
P2 : Input Change Interrupt Enable
bits : 2 - 2 (1 bit)
access : write-only
P3 : Input Change Interrupt Enable
bits : 3 - 3 (1 bit)
access : write-only
P4 : Input Change Interrupt Enable
bits : 4 - 4 (1 bit)
access : write-only
P5 : Input Change Interrupt Enable
bits : 5 - 5 (1 bit)
access : write-only
P6 : Input Change Interrupt Enable
bits : 6 - 6 (1 bit)
access : write-only
P7 : Input Change Interrupt Enable
bits : 7 - 7 (1 bit)
access : write-only
P8 : Input Change Interrupt Enable
bits : 8 - 8 (1 bit)
access : write-only
P9 : Input Change Interrupt Enable
bits : 9 - 9 (1 bit)
access : write-only
P10 : Input Change Interrupt Enable
bits : 10 - 10 (1 bit)
access : write-only
P11 : Input Change Interrupt Enable
bits : 11 - 11 (1 bit)
access : write-only
P12 : Input Change Interrupt Enable
bits : 12 - 12 (1 bit)
access : write-only
P13 : Input Change Interrupt Enable
bits : 13 - 13 (1 bit)
access : write-only
P14 : Input Change Interrupt Enable
bits : 14 - 14 (1 bit)
access : write-only
P15 : Input Change Interrupt Enable
bits : 15 - 15 (1 bit)
access : write-only
P16 : Input Change Interrupt Enable
bits : 16 - 16 (1 bit)
access : write-only
P17 : Input Change Interrupt Enable
bits : 17 - 17 (1 bit)
access : write-only
P18 : Input Change Interrupt Enable
bits : 18 - 18 (1 bit)
access : write-only
P19 : Input Change Interrupt Enable
bits : 19 - 19 (1 bit)
access : write-only
P20 : Input Change Interrupt Enable
bits : 20 - 20 (1 bit)
access : write-only
P21 : Input Change Interrupt Enable
bits : 21 - 21 (1 bit)
access : write-only
P22 : Input Change Interrupt Enable
bits : 22 - 22 (1 bit)
access : write-only
P23 : Input Change Interrupt Enable
bits : 23 - 23 (1 bit)
access : write-only
P24 : Input Change Interrupt Enable
bits : 24 - 24 (1 bit)
access : write-only
P25 : Input Change Interrupt Enable
bits : 25 - 25 (1 bit)
access : write-only
P26 : Input Change Interrupt Enable
bits : 26 - 26 (1 bit)
access : write-only
P27 : Input Change Interrupt Enable
bits : 27 - 27 (1 bit)
access : write-only
P28 : Input Change Interrupt Enable
bits : 28 - 28 (1 bit)
access : write-only
P29 : Input Change Interrupt Enable
bits : 29 - 29 (1 bit)
access : write-only
P30 : Input Change Interrupt Enable
bits : 30 - 30 (1 bit)
access : write-only
P31 : Input Change Interrupt Enable
bits : 31 - 31 (1 bit)
access : write-only
Interrupt Disable Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Input Change Interrupt Disable
bits : 0 - 0 (1 bit)
access : write-only
P1 : Input Change Interrupt Disable
bits : 1 - 1 (1 bit)
access : write-only
P2 : Input Change Interrupt Disable
bits : 2 - 2 (1 bit)
access : write-only
P3 : Input Change Interrupt Disable
bits : 3 - 3 (1 bit)
access : write-only
P4 : Input Change Interrupt Disable
bits : 4 - 4 (1 bit)
access : write-only
P5 : Input Change Interrupt Disable
bits : 5 - 5 (1 bit)
access : write-only
P6 : Input Change Interrupt Disable
bits : 6 - 6 (1 bit)
access : write-only
P7 : Input Change Interrupt Disable
bits : 7 - 7 (1 bit)
access : write-only
P8 : Input Change Interrupt Disable
bits : 8 - 8 (1 bit)
access : write-only
P9 : Input Change Interrupt Disable
bits : 9 - 9 (1 bit)
access : write-only
P10 : Input Change Interrupt Disable
bits : 10 - 10 (1 bit)
access : write-only
P11 : Input Change Interrupt Disable
bits : 11 - 11 (1 bit)
access : write-only
P12 : Input Change Interrupt Disable
bits : 12 - 12 (1 bit)
access : write-only
P13 : Input Change Interrupt Disable
bits : 13 - 13 (1 bit)
access : write-only
P14 : Input Change Interrupt Disable
bits : 14 - 14 (1 bit)
access : write-only
P15 : Input Change Interrupt Disable
bits : 15 - 15 (1 bit)
access : write-only
P16 : Input Change Interrupt Disable
bits : 16 - 16 (1 bit)
access : write-only
P17 : Input Change Interrupt Disable
bits : 17 - 17 (1 bit)
access : write-only
P18 : Input Change Interrupt Disable
bits : 18 - 18 (1 bit)
access : write-only
P19 : Input Change Interrupt Disable
bits : 19 - 19 (1 bit)
access : write-only
P20 : Input Change Interrupt Disable
bits : 20 - 20 (1 bit)
access : write-only
P21 : Input Change Interrupt Disable
bits : 21 - 21 (1 bit)
access : write-only
P22 : Input Change Interrupt Disable
bits : 22 - 22 (1 bit)
access : write-only
P23 : Input Change Interrupt Disable
bits : 23 - 23 (1 bit)
access : write-only
P24 : Input Change Interrupt Disable
bits : 24 - 24 (1 bit)
access : write-only
P25 : Input Change Interrupt Disable
bits : 25 - 25 (1 bit)
access : write-only
P26 : Input Change Interrupt Disable
bits : 26 - 26 (1 bit)
access : write-only
P27 : Input Change Interrupt Disable
bits : 27 - 27 (1 bit)
access : write-only
P28 : Input Change Interrupt Disable
bits : 28 - 28 (1 bit)
access : write-only
P29 : Input Change Interrupt Disable
bits : 29 - 29 (1 bit)
access : write-only
P30 : Input Change Interrupt Disable
bits : 30 - 30 (1 bit)
access : write-only
P31 : Input Change Interrupt Disable
bits : 31 - 31 (1 bit)
access : write-only
Interrupt Mask Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Input Change Interrupt Mask
bits : 0 - 0 (1 bit)
access : read-only
P1 : Input Change Interrupt Mask
bits : 1 - 1 (1 bit)
access : read-only
P2 : Input Change Interrupt Mask
bits : 2 - 2 (1 bit)
access : read-only
P3 : Input Change Interrupt Mask
bits : 3 - 3 (1 bit)
access : read-only
P4 : Input Change Interrupt Mask
bits : 4 - 4 (1 bit)
access : read-only
P5 : Input Change Interrupt Mask
bits : 5 - 5 (1 bit)
access : read-only
P6 : Input Change Interrupt Mask
bits : 6 - 6 (1 bit)
access : read-only
P7 : Input Change Interrupt Mask
bits : 7 - 7 (1 bit)
access : read-only
P8 : Input Change Interrupt Mask
bits : 8 - 8 (1 bit)
access : read-only
P9 : Input Change Interrupt Mask
bits : 9 - 9 (1 bit)
access : read-only
P10 : Input Change Interrupt Mask
bits : 10 - 10 (1 bit)
access : read-only
P11 : Input Change Interrupt Mask
bits : 11 - 11 (1 bit)
access : read-only
P12 : Input Change Interrupt Mask
bits : 12 - 12 (1 bit)
access : read-only
P13 : Input Change Interrupt Mask
bits : 13 - 13 (1 bit)
access : read-only
P14 : Input Change Interrupt Mask
bits : 14 - 14 (1 bit)
access : read-only
P15 : Input Change Interrupt Mask
bits : 15 - 15 (1 bit)
access : read-only
P16 : Input Change Interrupt Mask
bits : 16 - 16 (1 bit)
access : read-only
P17 : Input Change Interrupt Mask
bits : 17 - 17 (1 bit)
access : read-only
P18 : Input Change Interrupt Mask
bits : 18 - 18 (1 bit)
access : read-only
P19 : Input Change Interrupt Mask
bits : 19 - 19 (1 bit)
access : read-only
P20 : Input Change Interrupt Mask
bits : 20 - 20 (1 bit)
access : read-only
P21 : Input Change Interrupt Mask
bits : 21 - 21 (1 bit)
access : read-only
P22 : Input Change Interrupt Mask
bits : 22 - 22 (1 bit)
access : read-only
P23 : Input Change Interrupt Mask
bits : 23 - 23 (1 bit)
access : read-only
P24 : Input Change Interrupt Mask
bits : 24 - 24 (1 bit)
access : read-only
P25 : Input Change Interrupt Mask
bits : 25 - 25 (1 bit)
access : read-only
P26 : Input Change Interrupt Mask
bits : 26 - 26 (1 bit)
access : read-only
P27 : Input Change Interrupt Mask
bits : 27 - 27 (1 bit)
access : read-only
P28 : Input Change Interrupt Mask
bits : 28 - 28 (1 bit)
access : read-only
P29 : Input Change Interrupt Mask
bits : 29 - 29 (1 bit)
access : read-only
P30 : Input Change Interrupt Mask
bits : 30 - 30 (1 bit)
access : read-only
P31 : Input Change Interrupt Mask
bits : 31 - 31 (1 bit)
access : read-only
Interrupt Status Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Input Change Interrupt Status
bits : 0 - 0 (1 bit)
access : read-only
P1 : Input Change Interrupt Status
bits : 1 - 1 (1 bit)
access : read-only
P2 : Input Change Interrupt Status
bits : 2 - 2 (1 bit)
access : read-only
P3 : Input Change Interrupt Status
bits : 3 - 3 (1 bit)
access : read-only
P4 : Input Change Interrupt Status
bits : 4 - 4 (1 bit)
access : read-only
P5 : Input Change Interrupt Status
bits : 5 - 5 (1 bit)
access : read-only
P6 : Input Change Interrupt Status
bits : 6 - 6 (1 bit)
access : read-only
P7 : Input Change Interrupt Status
bits : 7 - 7 (1 bit)
access : read-only
P8 : Input Change Interrupt Status
bits : 8 - 8 (1 bit)
access : read-only
P9 : Input Change Interrupt Status
bits : 9 - 9 (1 bit)
access : read-only
P10 : Input Change Interrupt Status
bits : 10 - 10 (1 bit)
access : read-only
P11 : Input Change Interrupt Status
bits : 11 - 11 (1 bit)
access : read-only
P12 : Input Change Interrupt Status
bits : 12 - 12 (1 bit)
access : read-only
P13 : Input Change Interrupt Status
bits : 13 - 13 (1 bit)
access : read-only
P14 : Input Change Interrupt Status
bits : 14 - 14 (1 bit)
access : read-only
P15 : Input Change Interrupt Status
bits : 15 - 15 (1 bit)
access : read-only
P16 : Input Change Interrupt Status
bits : 16 - 16 (1 bit)
access : read-only
P17 : Input Change Interrupt Status
bits : 17 - 17 (1 bit)
access : read-only
P18 : Input Change Interrupt Status
bits : 18 - 18 (1 bit)
access : read-only
P19 : Input Change Interrupt Status
bits : 19 - 19 (1 bit)
access : read-only
P20 : Input Change Interrupt Status
bits : 20 - 20 (1 bit)
access : read-only
P21 : Input Change Interrupt Status
bits : 21 - 21 (1 bit)
access : read-only
P22 : Input Change Interrupt Status
bits : 22 - 22 (1 bit)
access : read-only
P23 : Input Change Interrupt Status
bits : 23 - 23 (1 bit)
access : read-only
P24 : Input Change Interrupt Status
bits : 24 - 24 (1 bit)
access : read-only
P25 : Input Change Interrupt Status
bits : 25 - 25 (1 bit)
access : read-only
P26 : Input Change Interrupt Status
bits : 26 - 26 (1 bit)
access : read-only
P27 : Input Change Interrupt Status
bits : 27 - 27 (1 bit)
access : read-only
P28 : Input Change Interrupt Status
bits : 28 - 28 (1 bit)
access : read-only
P29 : Input Change Interrupt Status
bits : 29 - 29 (1 bit)
access : read-only
P30 : Input Change Interrupt Status
bits : 30 - 30 (1 bit)
access : read-only
P31 : Input Change Interrupt Status
bits : 31 - 31 (1 bit)
access : read-only
Multi-driver Enable Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Multi-drive Enable
bits : 0 - 0 (1 bit)
access : write-only
P1 : Multi-drive Enable
bits : 1 - 1 (1 bit)
access : write-only
P2 : Multi-drive Enable
bits : 2 - 2 (1 bit)
access : write-only
P3 : Multi-drive Enable
bits : 3 - 3 (1 bit)
access : write-only
P4 : Multi-drive Enable
bits : 4 - 4 (1 bit)
access : write-only
P5 : Multi-drive Enable
bits : 5 - 5 (1 bit)
access : write-only
P6 : Multi-drive Enable
bits : 6 - 6 (1 bit)
access : write-only
P7 : Multi-drive Enable
bits : 7 - 7 (1 bit)
access : write-only
P8 : Multi-drive Enable
bits : 8 - 8 (1 bit)
access : write-only
P9 : Multi-drive Enable
bits : 9 - 9 (1 bit)
access : write-only
P10 : Multi-drive Enable
bits : 10 - 10 (1 bit)
access : write-only
P11 : Multi-drive Enable
bits : 11 - 11 (1 bit)
access : write-only
P12 : Multi-drive Enable
bits : 12 - 12 (1 bit)
access : write-only
P13 : Multi-drive Enable
bits : 13 - 13 (1 bit)
access : write-only
P14 : Multi-drive Enable
bits : 14 - 14 (1 bit)
access : write-only
P15 : Multi-drive Enable
bits : 15 - 15 (1 bit)
access : write-only
P16 : Multi-drive Enable
bits : 16 - 16 (1 bit)
access : write-only
P17 : Multi-drive Enable
bits : 17 - 17 (1 bit)
access : write-only
P18 : Multi-drive Enable
bits : 18 - 18 (1 bit)
access : write-only
P19 : Multi-drive Enable
bits : 19 - 19 (1 bit)
access : write-only
P20 : Multi-drive Enable
bits : 20 - 20 (1 bit)
access : write-only
P21 : Multi-drive Enable
bits : 21 - 21 (1 bit)
access : write-only
P22 : Multi-drive Enable
bits : 22 - 22 (1 bit)
access : write-only
P23 : Multi-drive Enable
bits : 23 - 23 (1 bit)
access : write-only
P24 : Multi-drive Enable
bits : 24 - 24 (1 bit)
access : write-only
P25 : Multi-drive Enable
bits : 25 - 25 (1 bit)
access : write-only
P26 : Multi-drive Enable
bits : 26 - 26 (1 bit)
access : write-only
P27 : Multi-drive Enable
bits : 27 - 27 (1 bit)
access : write-only
P28 : Multi-drive Enable
bits : 28 - 28 (1 bit)
access : write-only
P29 : Multi-drive Enable
bits : 29 - 29 (1 bit)
access : write-only
P30 : Multi-drive Enable
bits : 30 - 30 (1 bit)
access : write-only
P31 : Multi-drive Enable
bits : 31 - 31 (1 bit)
access : write-only
Multi-driver Disable Register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Multi-drive Disable
bits : 0 - 0 (1 bit)
access : write-only
P1 : Multi-drive Disable
bits : 1 - 1 (1 bit)
access : write-only
P2 : Multi-drive Disable
bits : 2 - 2 (1 bit)
access : write-only
P3 : Multi-drive Disable
bits : 3 - 3 (1 bit)
access : write-only
P4 : Multi-drive Disable
bits : 4 - 4 (1 bit)
access : write-only
P5 : Multi-drive Disable
bits : 5 - 5 (1 bit)
access : write-only
P6 : Multi-drive Disable
bits : 6 - 6 (1 bit)
access : write-only
P7 : Multi-drive Disable
bits : 7 - 7 (1 bit)
access : write-only
P8 : Multi-drive Disable
bits : 8 - 8 (1 bit)
access : write-only
P9 : Multi-drive Disable
bits : 9 - 9 (1 bit)
access : write-only
P10 : Multi-drive Disable
bits : 10 - 10 (1 bit)
access : write-only
P11 : Multi-drive Disable
bits : 11 - 11 (1 bit)
access : write-only
P12 : Multi-drive Disable
bits : 12 - 12 (1 bit)
access : write-only
P13 : Multi-drive Disable
bits : 13 - 13 (1 bit)
access : write-only
P14 : Multi-drive Disable
bits : 14 - 14 (1 bit)
access : write-only
P15 : Multi-drive Disable
bits : 15 - 15 (1 bit)
access : write-only
P16 : Multi-drive Disable
bits : 16 - 16 (1 bit)
access : write-only
P17 : Multi-drive Disable
bits : 17 - 17 (1 bit)
access : write-only
P18 : Multi-drive Disable
bits : 18 - 18 (1 bit)
access : write-only
P19 : Multi-drive Disable
bits : 19 - 19 (1 bit)
access : write-only
P20 : Multi-drive Disable
bits : 20 - 20 (1 bit)
access : write-only
P21 : Multi-drive Disable
bits : 21 - 21 (1 bit)
access : write-only
P22 : Multi-drive Disable
bits : 22 - 22 (1 bit)
access : write-only
P23 : Multi-drive Disable
bits : 23 - 23 (1 bit)
access : write-only
P24 : Multi-drive Disable
bits : 24 - 24 (1 bit)
access : write-only
P25 : Multi-drive Disable
bits : 25 - 25 (1 bit)
access : write-only
P26 : Multi-drive Disable
bits : 26 - 26 (1 bit)
access : write-only
P27 : Multi-drive Disable
bits : 27 - 27 (1 bit)
access : write-only
P28 : Multi-drive Disable
bits : 28 - 28 (1 bit)
access : write-only
P29 : Multi-drive Disable
bits : 29 - 29 (1 bit)
access : write-only
P30 : Multi-drive Disable
bits : 30 - 30 (1 bit)
access : write-only
P31 : Multi-drive Disable
bits : 31 - 31 (1 bit)
access : write-only
Multi-driver Status Register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Multi-drive Status
bits : 0 - 0 (1 bit)
access : read-only
P1 : Multi-drive Status
bits : 1 - 1 (1 bit)
access : read-only
P2 : Multi-drive Status
bits : 2 - 2 (1 bit)
access : read-only
P3 : Multi-drive Status
bits : 3 - 3 (1 bit)
access : read-only
P4 : Multi-drive Status
bits : 4 - 4 (1 bit)
access : read-only
P5 : Multi-drive Status
bits : 5 - 5 (1 bit)
access : read-only
P6 : Multi-drive Status
bits : 6 - 6 (1 bit)
access : read-only
P7 : Multi-drive Status
bits : 7 - 7 (1 bit)
access : read-only
P8 : Multi-drive Status
bits : 8 - 8 (1 bit)
access : read-only
P9 : Multi-drive Status
bits : 9 - 9 (1 bit)
access : read-only
P10 : Multi-drive Status
bits : 10 - 10 (1 bit)
access : read-only
P11 : Multi-drive Status
bits : 11 - 11 (1 bit)
access : read-only
P12 : Multi-drive Status
bits : 12 - 12 (1 bit)
access : read-only
P13 : Multi-drive Status
bits : 13 - 13 (1 bit)
access : read-only
P14 : Multi-drive Status
bits : 14 - 14 (1 bit)
access : read-only
P15 : Multi-drive Status
bits : 15 - 15 (1 bit)
access : read-only
P16 : Multi-drive Status
bits : 16 - 16 (1 bit)
access : read-only
P17 : Multi-drive Status
bits : 17 - 17 (1 bit)
access : read-only
P18 : Multi-drive Status
bits : 18 - 18 (1 bit)
access : read-only
P19 : Multi-drive Status
bits : 19 - 19 (1 bit)
access : read-only
P20 : Multi-drive Status
bits : 20 - 20 (1 bit)
access : read-only
P21 : Multi-drive Status
bits : 21 - 21 (1 bit)
access : read-only
P22 : Multi-drive Status
bits : 22 - 22 (1 bit)
access : read-only
P23 : Multi-drive Status
bits : 23 - 23 (1 bit)
access : read-only
P24 : Multi-drive Status
bits : 24 - 24 (1 bit)
access : read-only
P25 : Multi-drive Status
bits : 25 - 25 (1 bit)
access : read-only
P26 : Multi-drive Status
bits : 26 - 26 (1 bit)
access : read-only
P27 : Multi-drive Status
bits : 27 - 27 (1 bit)
access : read-only
P28 : Multi-drive Status
bits : 28 - 28 (1 bit)
access : read-only
P29 : Multi-drive Status
bits : 29 - 29 (1 bit)
access : read-only
P30 : Multi-drive Status
bits : 30 - 30 (1 bit)
access : read-only
P31 : Multi-drive Status
bits : 31 - 31 (1 bit)
access : read-only
Pull-up Disable Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Pull-Up Disable
bits : 0 - 0 (1 bit)
access : write-only
P1 : Pull-Up Disable
bits : 1 - 1 (1 bit)
access : write-only
P2 : Pull-Up Disable
bits : 2 - 2 (1 bit)
access : write-only
P3 : Pull-Up Disable
bits : 3 - 3 (1 bit)
access : write-only
P4 : Pull-Up Disable
bits : 4 - 4 (1 bit)
access : write-only
P5 : Pull-Up Disable
bits : 5 - 5 (1 bit)
access : write-only
P6 : Pull-Up Disable
bits : 6 - 6 (1 bit)
access : write-only
P7 : Pull-Up Disable
bits : 7 - 7 (1 bit)
access : write-only
P8 : Pull-Up Disable
bits : 8 - 8 (1 bit)
access : write-only
P9 : Pull-Up Disable
bits : 9 - 9 (1 bit)
access : write-only
P10 : Pull-Up Disable
bits : 10 - 10 (1 bit)
access : write-only
P11 : Pull-Up Disable
bits : 11 - 11 (1 bit)
access : write-only
P12 : Pull-Up Disable
bits : 12 - 12 (1 bit)
access : write-only
P13 : Pull-Up Disable
bits : 13 - 13 (1 bit)
access : write-only
P14 : Pull-Up Disable
bits : 14 - 14 (1 bit)
access : write-only
P15 : Pull-Up Disable
bits : 15 - 15 (1 bit)
access : write-only
P16 : Pull-Up Disable
bits : 16 - 16 (1 bit)
access : write-only
P17 : Pull-Up Disable
bits : 17 - 17 (1 bit)
access : write-only
P18 : Pull-Up Disable
bits : 18 - 18 (1 bit)
access : write-only
P19 : Pull-Up Disable
bits : 19 - 19 (1 bit)
access : write-only
P20 : Pull-Up Disable
bits : 20 - 20 (1 bit)
access : write-only
P21 : Pull-Up Disable
bits : 21 - 21 (1 bit)
access : write-only
P22 : Pull-Up Disable
bits : 22 - 22 (1 bit)
access : write-only
P23 : Pull-Up Disable
bits : 23 - 23 (1 bit)
access : write-only
P24 : Pull-Up Disable
bits : 24 - 24 (1 bit)
access : write-only
P25 : Pull-Up Disable
bits : 25 - 25 (1 bit)
access : write-only
P26 : Pull-Up Disable
bits : 26 - 26 (1 bit)
access : write-only
P27 : Pull-Up Disable
bits : 27 - 27 (1 bit)
access : write-only
P28 : Pull-Up Disable
bits : 28 - 28 (1 bit)
access : write-only
P29 : Pull-Up Disable
bits : 29 - 29 (1 bit)
access : write-only
P30 : Pull-Up Disable
bits : 30 - 30 (1 bit)
access : write-only
P31 : Pull-Up Disable
bits : 31 - 31 (1 bit)
access : write-only
Pull-up Enable Register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Pull-Up Enable
bits : 0 - 0 (1 bit)
access : write-only
P1 : Pull-Up Enable
bits : 1 - 1 (1 bit)
access : write-only
P2 : Pull-Up Enable
bits : 2 - 2 (1 bit)
access : write-only
P3 : Pull-Up Enable
bits : 3 - 3 (1 bit)
access : write-only
P4 : Pull-Up Enable
bits : 4 - 4 (1 bit)
access : write-only
P5 : Pull-Up Enable
bits : 5 - 5 (1 bit)
access : write-only
P6 : Pull-Up Enable
bits : 6 - 6 (1 bit)
access : write-only
P7 : Pull-Up Enable
bits : 7 - 7 (1 bit)
access : write-only
P8 : Pull-Up Enable
bits : 8 - 8 (1 bit)
access : write-only
P9 : Pull-Up Enable
bits : 9 - 9 (1 bit)
access : write-only
P10 : Pull-Up Enable
bits : 10 - 10 (1 bit)
access : write-only
P11 : Pull-Up Enable
bits : 11 - 11 (1 bit)
access : write-only
P12 : Pull-Up Enable
bits : 12 - 12 (1 bit)
access : write-only
P13 : Pull-Up Enable
bits : 13 - 13 (1 bit)
access : write-only
P14 : Pull-Up Enable
bits : 14 - 14 (1 bit)
access : write-only
P15 : Pull-Up Enable
bits : 15 - 15 (1 bit)
access : write-only
P16 : Pull-Up Enable
bits : 16 - 16 (1 bit)
access : write-only
P17 : Pull-Up Enable
bits : 17 - 17 (1 bit)
access : write-only
P18 : Pull-Up Enable
bits : 18 - 18 (1 bit)
access : write-only
P19 : Pull-Up Enable
bits : 19 - 19 (1 bit)
access : write-only
P20 : Pull-Up Enable
bits : 20 - 20 (1 bit)
access : write-only
P21 : Pull-Up Enable
bits : 21 - 21 (1 bit)
access : write-only
P22 : Pull-Up Enable
bits : 22 - 22 (1 bit)
access : write-only
P23 : Pull-Up Enable
bits : 23 - 23 (1 bit)
access : write-only
P24 : Pull-Up Enable
bits : 24 - 24 (1 bit)
access : write-only
P25 : Pull-Up Enable
bits : 25 - 25 (1 bit)
access : write-only
P26 : Pull-Up Enable
bits : 26 - 26 (1 bit)
access : write-only
P27 : Pull-Up Enable
bits : 27 - 27 (1 bit)
access : write-only
P28 : Pull-Up Enable
bits : 28 - 28 (1 bit)
access : write-only
P29 : Pull-Up Enable
bits : 29 - 29 (1 bit)
access : write-only
P30 : Pull-Up Enable
bits : 30 - 30 (1 bit)
access : write-only
P31 : Pull-Up Enable
bits : 31 - 31 (1 bit)
access : write-only
Pad Pull-up Status Register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Pull-Up Status
bits : 0 - 0 (1 bit)
access : read-only
P1 : Pull-Up Status
bits : 1 - 1 (1 bit)
access : read-only
P2 : Pull-Up Status
bits : 2 - 2 (1 bit)
access : read-only
P3 : Pull-Up Status
bits : 3 - 3 (1 bit)
access : read-only
P4 : Pull-Up Status
bits : 4 - 4 (1 bit)
access : read-only
P5 : Pull-Up Status
bits : 5 - 5 (1 bit)
access : read-only
P6 : Pull-Up Status
bits : 6 - 6 (1 bit)
access : read-only
P7 : Pull-Up Status
bits : 7 - 7 (1 bit)
access : read-only
P8 : Pull-Up Status
bits : 8 - 8 (1 bit)
access : read-only
P9 : Pull-Up Status
bits : 9 - 9 (1 bit)
access : read-only
P10 : Pull-Up Status
bits : 10 - 10 (1 bit)
access : read-only
P11 : Pull-Up Status
bits : 11 - 11 (1 bit)
access : read-only
P12 : Pull-Up Status
bits : 12 - 12 (1 bit)
access : read-only
P13 : Pull-Up Status
bits : 13 - 13 (1 bit)
access : read-only
P14 : Pull-Up Status
bits : 14 - 14 (1 bit)
access : read-only
P15 : Pull-Up Status
bits : 15 - 15 (1 bit)
access : read-only
P16 : Pull-Up Status
bits : 16 - 16 (1 bit)
access : read-only
P17 : Pull-Up Status
bits : 17 - 17 (1 bit)
access : read-only
P18 : Pull-Up Status
bits : 18 - 18 (1 bit)
access : read-only
P19 : Pull-Up Status
bits : 19 - 19 (1 bit)
access : read-only
P20 : Pull-Up Status
bits : 20 - 20 (1 bit)
access : read-only
P21 : Pull-Up Status
bits : 21 - 21 (1 bit)
access : read-only
P22 : Pull-Up Status
bits : 22 - 22 (1 bit)
access : read-only
P23 : Pull-Up Status
bits : 23 - 23 (1 bit)
access : read-only
P24 : Pull-Up Status
bits : 24 - 24 (1 bit)
access : read-only
P25 : Pull-Up Status
bits : 25 - 25 (1 bit)
access : read-only
P26 : Pull-Up Status
bits : 26 - 26 (1 bit)
access : read-only
P27 : Pull-Up Status
bits : 27 - 27 (1 bit)
access : read-only
P28 : Pull-Up Status
bits : 28 - 28 (1 bit)
access : read-only
P29 : Pull-Up Status
bits : 29 - 29 (1 bit)
access : read-only
P30 : Pull-Up Status
bits : 30 - 30 (1 bit)
access : read-only
P31 : Pull-Up Status
bits : 31 - 31 (1 bit)
access : read-only
Peripheral Select Register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
P0 : Peripheral Select
bits : 0 - 0 (1 bit)
access : read-write
P1 : Peripheral Select
bits : 1 - 1 (1 bit)
access : read-write
P2 : Peripheral Select
bits : 2 - 2 (1 bit)
access : read-write
P3 : Peripheral Select
bits : 3 - 3 (1 bit)
access : read-write
P4 : Peripheral Select
bits : 4 - 4 (1 bit)
access : read-write
P5 : Peripheral Select
bits : 5 - 5 (1 bit)
access : read-write
P6 : Peripheral Select
bits : 6 - 6 (1 bit)
access : read-write
P7 : Peripheral Select
bits : 7 - 7 (1 bit)
access : read-write
P8 : Peripheral Select
bits : 8 - 8 (1 bit)
access : read-write
P9 : Peripheral Select
bits : 9 - 9 (1 bit)
access : read-write
P10 : Peripheral Select
bits : 10 - 10 (1 bit)
access : read-write
P11 : Peripheral Select
bits : 11 - 11 (1 bit)
access : read-write
P12 : Peripheral Select
bits : 12 - 12 (1 bit)
access : read-write
P13 : Peripheral Select
bits : 13 - 13 (1 bit)
access : read-write
P14 : Peripheral Select
bits : 14 - 14 (1 bit)
access : read-write
P15 : Peripheral Select
bits : 15 - 15 (1 bit)
access : read-write
P16 : Peripheral Select
bits : 16 - 16 (1 bit)
access : read-write
P17 : Peripheral Select
bits : 17 - 17 (1 bit)
access : read-write
P18 : Peripheral Select
bits : 18 - 18 (1 bit)
access : read-write
P19 : Peripheral Select
bits : 19 - 19 (1 bit)
access : read-write
P20 : Peripheral Select
bits : 20 - 20 (1 bit)
access : read-write
P21 : Peripheral Select
bits : 21 - 21 (1 bit)
access : read-write
P22 : Peripheral Select
bits : 22 - 22 (1 bit)
access : read-write
P23 : Peripheral Select
bits : 23 - 23 (1 bit)
access : read-write
P24 : Peripheral Select
bits : 24 - 24 (1 bit)
access : read-write
P25 : Peripheral Select
bits : 25 - 25 (1 bit)
access : read-write
P26 : Peripheral Select
bits : 26 - 26 (1 bit)
access : read-write
P27 : Peripheral Select
bits : 27 - 27 (1 bit)
access : read-write
P28 : Peripheral Select
bits : 28 - 28 (1 bit)
access : read-write
P29 : Peripheral Select
bits : 29 - 29 (1 bit)
access : read-write
P30 : Peripheral Select
bits : 30 - 30 (1 bit)
access : read-write
P31 : Peripheral Select
bits : 31 - 31 (1 bit)
access : read-write
Peripheral Select Register
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
P0 : Peripheral Select
bits : 0 - 0 (1 bit)
access : read-write
P1 : Peripheral Select
bits : 1 - 1 (1 bit)
access : read-write
P2 : Peripheral Select
bits : 2 - 2 (1 bit)
access : read-write
P3 : Peripheral Select
bits : 3 - 3 (1 bit)
access : read-write
P4 : Peripheral Select
bits : 4 - 4 (1 bit)
access : read-write
P5 : Peripheral Select
bits : 5 - 5 (1 bit)
access : read-write
P6 : Peripheral Select
bits : 6 - 6 (1 bit)
access : read-write
P7 : Peripheral Select
bits : 7 - 7 (1 bit)
access : read-write
P8 : Peripheral Select
bits : 8 - 8 (1 bit)
access : read-write
P9 : Peripheral Select
bits : 9 - 9 (1 bit)
access : read-write
P10 : Peripheral Select
bits : 10 - 10 (1 bit)
access : read-write
P11 : Peripheral Select
bits : 11 - 11 (1 bit)
access : read-write
P12 : Peripheral Select
bits : 12 - 12 (1 bit)
access : read-write
P13 : Peripheral Select
bits : 13 - 13 (1 bit)
access : read-write
P14 : Peripheral Select
bits : 14 - 14 (1 bit)
access : read-write
P15 : Peripheral Select
bits : 15 - 15 (1 bit)
access : read-write
P16 : Peripheral Select
bits : 16 - 16 (1 bit)
access : read-write
P17 : Peripheral Select
bits : 17 - 17 (1 bit)
access : read-write
P18 : Peripheral Select
bits : 18 - 18 (1 bit)
access : read-write
P19 : Peripheral Select
bits : 19 - 19 (1 bit)
access : read-write
P20 : Peripheral Select
bits : 20 - 20 (1 bit)
access : read-write
P21 : Peripheral Select
bits : 21 - 21 (1 bit)
access : read-write
P22 : Peripheral Select
bits : 22 - 22 (1 bit)
access : read-write
P23 : Peripheral Select
bits : 23 - 23 (1 bit)
access : read-write
P24 : Peripheral Select
bits : 24 - 24 (1 bit)
access : read-write
P25 : Peripheral Select
bits : 25 - 25 (1 bit)
access : read-write
P26 : Peripheral Select
bits : 26 - 26 (1 bit)
access : read-write
P27 : Peripheral Select
bits : 27 - 27 (1 bit)
access : read-write
P28 : Peripheral Select
bits : 28 - 28 (1 bit)
access : read-write
P29 : Peripheral Select
bits : 29 - 29 (1 bit)
access : read-write
P30 : Peripheral Select
bits : 30 - 30 (1 bit)
access : read-write
P31 : Peripheral Select
bits : 31 - 31 (1 bit)
access : read-write
PIO Status Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : PIO Status
bits : 0 - 0 (1 bit)
access : read-only
P1 : PIO Status
bits : 1 - 1 (1 bit)
access : read-only
P2 : PIO Status
bits : 2 - 2 (1 bit)
access : read-only
P3 : PIO Status
bits : 3 - 3 (1 bit)
access : read-only
P4 : PIO Status
bits : 4 - 4 (1 bit)
access : read-only
P5 : PIO Status
bits : 5 - 5 (1 bit)
access : read-only
P6 : PIO Status
bits : 6 - 6 (1 bit)
access : read-only
P7 : PIO Status
bits : 7 - 7 (1 bit)
access : read-only
P8 : PIO Status
bits : 8 - 8 (1 bit)
access : read-only
P9 : PIO Status
bits : 9 - 9 (1 bit)
access : read-only
P10 : PIO Status
bits : 10 - 10 (1 bit)
access : read-only
P11 : PIO Status
bits : 11 - 11 (1 bit)
access : read-only
P12 : PIO Status
bits : 12 - 12 (1 bit)
access : read-only
P13 : PIO Status
bits : 13 - 13 (1 bit)
access : read-only
P14 : PIO Status
bits : 14 - 14 (1 bit)
access : read-only
P15 : PIO Status
bits : 15 - 15 (1 bit)
access : read-only
P16 : PIO Status
bits : 16 - 16 (1 bit)
access : read-only
P17 : PIO Status
bits : 17 - 17 (1 bit)
access : read-only
P18 : PIO Status
bits : 18 - 18 (1 bit)
access : read-only
P19 : PIO Status
bits : 19 - 19 (1 bit)
access : read-only
P20 : PIO Status
bits : 20 - 20 (1 bit)
access : read-only
P21 : PIO Status
bits : 21 - 21 (1 bit)
access : read-only
P22 : PIO Status
bits : 22 - 22 (1 bit)
access : read-only
P23 : PIO Status
bits : 23 - 23 (1 bit)
access : read-only
P24 : PIO Status
bits : 24 - 24 (1 bit)
access : read-only
P25 : PIO Status
bits : 25 - 25 (1 bit)
access : read-only
P26 : PIO Status
bits : 26 - 26 (1 bit)
access : read-only
P27 : PIO Status
bits : 27 - 27 (1 bit)
access : read-only
P28 : PIO Status
bits : 28 - 28 (1 bit)
access : read-only
P29 : PIO Status
bits : 29 - 29 (1 bit)
access : read-only
P30 : PIO Status
bits : 30 - 30 (1 bit)
access : read-only
P31 : PIO Status
bits : 31 - 31 (1 bit)
access : read-only
Input Filter Slow Clock Disable Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Peripheral Clock Glitch Filtering Select
bits : 0 - 0 (1 bit)
access : write-only
P1 : Peripheral Clock Glitch Filtering Select
bits : 1 - 1 (1 bit)
access : write-only
P2 : Peripheral Clock Glitch Filtering Select
bits : 2 - 2 (1 bit)
access : write-only
P3 : Peripheral Clock Glitch Filtering Select
bits : 3 - 3 (1 bit)
access : write-only
P4 : Peripheral Clock Glitch Filtering Select
bits : 4 - 4 (1 bit)
access : write-only
P5 : Peripheral Clock Glitch Filtering Select
bits : 5 - 5 (1 bit)
access : write-only
P6 : Peripheral Clock Glitch Filtering Select
bits : 6 - 6 (1 bit)
access : write-only
P7 : Peripheral Clock Glitch Filtering Select
bits : 7 - 7 (1 bit)
access : write-only
P8 : Peripheral Clock Glitch Filtering Select
bits : 8 - 8 (1 bit)
access : write-only
P9 : Peripheral Clock Glitch Filtering Select
bits : 9 - 9 (1 bit)
access : write-only
P10 : Peripheral Clock Glitch Filtering Select
bits : 10 - 10 (1 bit)
access : write-only
P11 : Peripheral Clock Glitch Filtering Select
bits : 11 - 11 (1 bit)
access : write-only
P12 : Peripheral Clock Glitch Filtering Select
bits : 12 - 12 (1 bit)
access : write-only
P13 : Peripheral Clock Glitch Filtering Select
bits : 13 - 13 (1 bit)
access : write-only
P14 : Peripheral Clock Glitch Filtering Select
bits : 14 - 14 (1 bit)
access : write-only
P15 : Peripheral Clock Glitch Filtering Select
bits : 15 - 15 (1 bit)
access : write-only
P16 : Peripheral Clock Glitch Filtering Select
bits : 16 - 16 (1 bit)
access : write-only
P17 : Peripheral Clock Glitch Filtering Select
bits : 17 - 17 (1 bit)
access : write-only
P18 : Peripheral Clock Glitch Filtering Select
bits : 18 - 18 (1 bit)
access : write-only
P19 : Peripheral Clock Glitch Filtering Select
bits : 19 - 19 (1 bit)
access : write-only
P20 : Peripheral Clock Glitch Filtering Select
bits : 20 - 20 (1 bit)
access : write-only
P21 : Peripheral Clock Glitch Filtering Select
bits : 21 - 21 (1 bit)
access : write-only
P22 : Peripheral Clock Glitch Filtering Select
bits : 22 - 22 (1 bit)
access : write-only
P23 : Peripheral Clock Glitch Filtering Select
bits : 23 - 23 (1 bit)
access : write-only
P24 : Peripheral Clock Glitch Filtering Select
bits : 24 - 24 (1 bit)
access : write-only
P25 : Peripheral Clock Glitch Filtering Select
bits : 25 - 25 (1 bit)
access : write-only
P26 : Peripheral Clock Glitch Filtering Select
bits : 26 - 26 (1 bit)
access : write-only
P27 : Peripheral Clock Glitch Filtering Select
bits : 27 - 27 (1 bit)
access : write-only
P28 : Peripheral Clock Glitch Filtering Select
bits : 28 - 28 (1 bit)
access : write-only
P29 : Peripheral Clock Glitch Filtering Select
bits : 29 - 29 (1 bit)
access : write-only
P30 : Peripheral Clock Glitch Filtering Select
bits : 30 - 30 (1 bit)
access : write-only
P31 : Peripheral Clock Glitch Filtering Select
bits : 31 - 31 (1 bit)
access : write-only
Input Filter Slow Clock Enable Register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Slow Clock Debouncing Filtering Select
bits : 0 - 0 (1 bit)
access : write-only
P1 : Slow Clock Debouncing Filtering Select
bits : 1 - 1 (1 bit)
access : write-only
P2 : Slow Clock Debouncing Filtering Select
bits : 2 - 2 (1 bit)
access : write-only
P3 : Slow Clock Debouncing Filtering Select
bits : 3 - 3 (1 bit)
access : write-only
P4 : Slow Clock Debouncing Filtering Select
bits : 4 - 4 (1 bit)
access : write-only
P5 : Slow Clock Debouncing Filtering Select
bits : 5 - 5 (1 bit)
access : write-only
P6 : Slow Clock Debouncing Filtering Select
bits : 6 - 6 (1 bit)
access : write-only
P7 : Slow Clock Debouncing Filtering Select
bits : 7 - 7 (1 bit)
access : write-only
P8 : Slow Clock Debouncing Filtering Select
bits : 8 - 8 (1 bit)
access : write-only
P9 : Slow Clock Debouncing Filtering Select
bits : 9 - 9 (1 bit)
access : write-only
P10 : Slow Clock Debouncing Filtering Select
bits : 10 - 10 (1 bit)
access : write-only
P11 : Slow Clock Debouncing Filtering Select
bits : 11 - 11 (1 bit)
access : write-only
P12 : Slow Clock Debouncing Filtering Select
bits : 12 - 12 (1 bit)
access : write-only
P13 : Slow Clock Debouncing Filtering Select
bits : 13 - 13 (1 bit)
access : write-only
P14 : Slow Clock Debouncing Filtering Select
bits : 14 - 14 (1 bit)
access : write-only
P15 : Slow Clock Debouncing Filtering Select
bits : 15 - 15 (1 bit)
access : write-only
P16 : Slow Clock Debouncing Filtering Select
bits : 16 - 16 (1 bit)
access : write-only
P17 : Slow Clock Debouncing Filtering Select
bits : 17 - 17 (1 bit)
access : write-only
P18 : Slow Clock Debouncing Filtering Select
bits : 18 - 18 (1 bit)
access : write-only
P19 : Slow Clock Debouncing Filtering Select
bits : 19 - 19 (1 bit)
access : write-only
P20 : Slow Clock Debouncing Filtering Select
bits : 20 - 20 (1 bit)
access : write-only
P21 : Slow Clock Debouncing Filtering Select
bits : 21 - 21 (1 bit)
access : write-only
P22 : Slow Clock Debouncing Filtering Select
bits : 22 - 22 (1 bit)
access : write-only
P23 : Slow Clock Debouncing Filtering Select
bits : 23 - 23 (1 bit)
access : write-only
P24 : Slow Clock Debouncing Filtering Select
bits : 24 - 24 (1 bit)
access : write-only
P25 : Slow Clock Debouncing Filtering Select
bits : 25 - 25 (1 bit)
access : write-only
P26 : Slow Clock Debouncing Filtering Select
bits : 26 - 26 (1 bit)
access : write-only
P27 : Slow Clock Debouncing Filtering Select
bits : 27 - 27 (1 bit)
access : write-only
P28 : Slow Clock Debouncing Filtering Select
bits : 28 - 28 (1 bit)
access : write-only
P29 : Slow Clock Debouncing Filtering Select
bits : 29 - 29 (1 bit)
access : write-only
P30 : Slow Clock Debouncing Filtering Select
bits : 30 - 30 (1 bit)
access : write-only
P31 : Slow Clock Debouncing Filtering Select
bits : 31 - 31 (1 bit)
access : write-only
Input Filter Slow Clock Status Register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Glitch or Debouncing Filter Selection Status
bits : 0 - 0 (1 bit)
access : read-only
P1 : Glitch or Debouncing Filter Selection Status
bits : 1 - 1 (1 bit)
access : read-only
P2 : Glitch or Debouncing Filter Selection Status
bits : 2 - 2 (1 bit)
access : read-only
P3 : Glitch or Debouncing Filter Selection Status
bits : 3 - 3 (1 bit)
access : read-only
P4 : Glitch or Debouncing Filter Selection Status
bits : 4 - 4 (1 bit)
access : read-only
P5 : Glitch or Debouncing Filter Selection Status
bits : 5 - 5 (1 bit)
access : read-only
P6 : Glitch or Debouncing Filter Selection Status
bits : 6 - 6 (1 bit)
access : read-only
P7 : Glitch or Debouncing Filter Selection Status
bits : 7 - 7 (1 bit)
access : read-only
P8 : Glitch or Debouncing Filter Selection Status
bits : 8 - 8 (1 bit)
access : read-only
P9 : Glitch or Debouncing Filter Selection Status
bits : 9 - 9 (1 bit)
access : read-only
P10 : Glitch or Debouncing Filter Selection Status
bits : 10 - 10 (1 bit)
access : read-only
P11 : Glitch or Debouncing Filter Selection Status
bits : 11 - 11 (1 bit)
access : read-only
P12 : Glitch or Debouncing Filter Selection Status
bits : 12 - 12 (1 bit)
access : read-only
P13 : Glitch or Debouncing Filter Selection Status
bits : 13 - 13 (1 bit)
access : read-only
P14 : Glitch or Debouncing Filter Selection Status
bits : 14 - 14 (1 bit)
access : read-only
P15 : Glitch or Debouncing Filter Selection Status
bits : 15 - 15 (1 bit)
access : read-only
P16 : Glitch or Debouncing Filter Selection Status
bits : 16 - 16 (1 bit)
access : read-only
P17 : Glitch or Debouncing Filter Selection Status
bits : 17 - 17 (1 bit)
access : read-only
P18 : Glitch or Debouncing Filter Selection Status
bits : 18 - 18 (1 bit)
access : read-only
P19 : Glitch or Debouncing Filter Selection Status
bits : 19 - 19 (1 bit)
access : read-only
P20 : Glitch or Debouncing Filter Selection Status
bits : 20 - 20 (1 bit)
access : read-only
P21 : Glitch or Debouncing Filter Selection Status
bits : 21 - 21 (1 bit)
access : read-only
P22 : Glitch or Debouncing Filter Selection Status
bits : 22 - 22 (1 bit)
access : read-only
P23 : Glitch or Debouncing Filter Selection Status
bits : 23 - 23 (1 bit)
access : read-only
P24 : Glitch or Debouncing Filter Selection Status
bits : 24 - 24 (1 bit)
access : read-only
P25 : Glitch or Debouncing Filter Selection Status
bits : 25 - 25 (1 bit)
access : read-only
P26 : Glitch or Debouncing Filter Selection Status
bits : 26 - 26 (1 bit)
access : read-only
P27 : Glitch or Debouncing Filter Selection Status
bits : 27 - 27 (1 bit)
access : read-only
P28 : Glitch or Debouncing Filter Selection Status
bits : 28 - 28 (1 bit)
access : read-only
P29 : Glitch or Debouncing Filter Selection Status
bits : 29 - 29 (1 bit)
access : read-only
P30 : Glitch or Debouncing Filter Selection Status
bits : 30 - 30 (1 bit)
access : read-only
P31 : Glitch or Debouncing Filter Selection Status
bits : 31 - 31 (1 bit)
access : read-only
Slow Clock Divider Debouncing Register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIV : Slow Clock Divider Selection for Debouncing
bits : 0 - 13 (14 bit)
access : read-write
Pad Pull-down Disable Register
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Pull-Down Disable
bits : 0 - 0 (1 bit)
access : write-only
P1 : Pull-Down Disable
bits : 1 - 1 (1 bit)
access : write-only
P2 : Pull-Down Disable
bits : 2 - 2 (1 bit)
access : write-only
P3 : Pull-Down Disable
bits : 3 - 3 (1 bit)
access : write-only
P4 : Pull-Down Disable
bits : 4 - 4 (1 bit)
access : write-only
P5 : Pull-Down Disable
bits : 5 - 5 (1 bit)
access : write-only
P6 : Pull-Down Disable
bits : 6 - 6 (1 bit)
access : write-only
P7 : Pull-Down Disable
bits : 7 - 7 (1 bit)
access : write-only
P8 : Pull-Down Disable
bits : 8 - 8 (1 bit)
access : write-only
P9 : Pull-Down Disable
bits : 9 - 9 (1 bit)
access : write-only
P10 : Pull-Down Disable
bits : 10 - 10 (1 bit)
access : write-only
P11 : Pull-Down Disable
bits : 11 - 11 (1 bit)
access : write-only
P12 : Pull-Down Disable
bits : 12 - 12 (1 bit)
access : write-only
P13 : Pull-Down Disable
bits : 13 - 13 (1 bit)
access : write-only
P14 : Pull-Down Disable
bits : 14 - 14 (1 bit)
access : write-only
P15 : Pull-Down Disable
bits : 15 - 15 (1 bit)
access : write-only
P16 : Pull-Down Disable
bits : 16 - 16 (1 bit)
access : write-only
P17 : Pull-Down Disable
bits : 17 - 17 (1 bit)
access : write-only
P18 : Pull-Down Disable
bits : 18 - 18 (1 bit)
access : write-only
P19 : Pull-Down Disable
bits : 19 - 19 (1 bit)
access : write-only
P20 : Pull-Down Disable
bits : 20 - 20 (1 bit)
access : write-only
P21 : Pull-Down Disable
bits : 21 - 21 (1 bit)
access : write-only
P22 : Pull-Down Disable
bits : 22 - 22 (1 bit)
access : write-only
P23 : Pull-Down Disable
bits : 23 - 23 (1 bit)
access : write-only
P24 : Pull-Down Disable
bits : 24 - 24 (1 bit)
access : write-only
P25 : Pull-Down Disable
bits : 25 - 25 (1 bit)
access : write-only
P26 : Pull-Down Disable
bits : 26 - 26 (1 bit)
access : write-only
P27 : Pull-Down Disable
bits : 27 - 27 (1 bit)
access : write-only
P28 : Pull-Down Disable
bits : 28 - 28 (1 bit)
access : write-only
P29 : Pull-Down Disable
bits : 29 - 29 (1 bit)
access : write-only
P30 : Pull-Down Disable
bits : 30 - 30 (1 bit)
access : write-only
P31 : Pull-Down Disable
bits : 31 - 31 (1 bit)
access : write-only
Pad Pull-down Enable Register
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Pull-Down Enable
bits : 0 - 0 (1 bit)
access : write-only
P1 : Pull-Down Enable
bits : 1 - 1 (1 bit)
access : write-only
P2 : Pull-Down Enable
bits : 2 - 2 (1 bit)
access : write-only
P3 : Pull-Down Enable
bits : 3 - 3 (1 bit)
access : write-only
P4 : Pull-Down Enable
bits : 4 - 4 (1 bit)
access : write-only
P5 : Pull-Down Enable
bits : 5 - 5 (1 bit)
access : write-only
P6 : Pull-Down Enable
bits : 6 - 6 (1 bit)
access : write-only
P7 : Pull-Down Enable
bits : 7 - 7 (1 bit)
access : write-only
P8 : Pull-Down Enable
bits : 8 - 8 (1 bit)
access : write-only
P9 : Pull-Down Enable
bits : 9 - 9 (1 bit)
access : write-only
P10 : Pull-Down Enable
bits : 10 - 10 (1 bit)
access : write-only
P11 : Pull-Down Enable
bits : 11 - 11 (1 bit)
access : write-only
P12 : Pull-Down Enable
bits : 12 - 12 (1 bit)
access : write-only
P13 : Pull-Down Enable
bits : 13 - 13 (1 bit)
access : write-only
P14 : Pull-Down Enable
bits : 14 - 14 (1 bit)
access : write-only
P15 : Pull-Down Enable
bits : 15 - 15 (1 bit)
access : write-only
P16 : Pull-Down Enable
bits : 16 - 16 (1 bit)
access : write-only
P17 : Pull-Down Enable
bits : 17 - 17 (1 bit)
access : write-only
P18 : Pull-Down Enable
bits : 18 - 18 (1 bit)
access : write-only
P19 : Pull-Down Enable
bits : 19 - 19 (1 bit)
access : write-only
P20 : Pull-Down Enable
bits : 20 - 20 (1 bit)
access : write-only
P21 : Pull-Down Enable
bits : 21 - 21 (1 bit)
access : write-only
P22 : Pull-Down Enable
bits : 22 - 22 (1 bit)
access : write-only
P23 : Pull-Down Enable
bits : 23 - 23 (1 bit)
access : write-only
P24 : Pull-Down Enable
bits : 24 - 24 (1 bit)
access : write-only
P25 : Pull-Down Enable
bits : 25 - 25 (1 bit)
access : write-only
P26 : Pull-Down Enable
bits : 26 - 26 (1 bit)
access : write-only
P27 : Pull-Down Enable
bits : 27 - 27 (1 bit)
access : write-only
P28 : Pull-Down Enable
bits : 28 - 28 (1 bit)
access : write-only
P29 : Pull-Down Enable
bits : 29 - 29 (1 bit)
access : write-only
P30 : Pull-Down Enable
bits : 30 - 30 (1 bit)
access : write-only
P31 : Pull-Down Enable
bits : 31 - 31 (1 bit)
access : write-only
Pad Pull-down Status Register
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Pull-Down Status
bits : 0 - 0 (1 bit)
access : read-only
P1 : Pull-Down Status
bits : 1 - 1 (1 bit)
access : read-only
P2 : Pull-Down Status
bits : 2 - 2 (1 bit)
access : read-only
P3 : Pull-Down Status
bits : 3 - 3 (1 bit)
access : read-only
P4 : Pull-Down Status
bits : 4 - 4 (1 bit)
access : read-only
P5 : Pull-Down Status
bits : 5 - 5 (1 bit)
access : read-only
P6 : Pull-Down Status
bits : 6 - 6 (1 bit)
access : read-only
P7 : Pull-Down Status
bits : 7 - 7 (1 bit)
access : read-only
P8 : Pull-Down Status
bits : 8 - 8 (1 bit)
access : read-only
P9 : Pull-Down Status
bits : 9 - 9 (1 bit)
access : read-only
P10 : Pull-Down Status
bits : 10 - 10 (1 bit)
access : read-only
P11 : Pull-Down Status
bits : 11 - 11 (1 bit)
access : read-only
P12 : Pull-Down Status
bits : 12 - 12 (1 bit)
access : read-only
P13 : Pull-Down Status
bits : 13 - 13 (1 bit)
access : read-only
P14 : Pull-Down Status
bits : 14 - 14 (1 bit)
access : read-only
P15 : Pull-Down Status
bits : 15 - 15 (1 bit)
access : read-only
P16 : Pull-Down Status
bits : 16 - 16 (1 bit)
access : read-only
P17 : Pull-Down Status
bits : 17 - 17 (1 bit)
access : read-only
P18 : Pull-Down Status
bits : 18 - 18 (1 bit)
access : read-only
P19 : Pull-Down Status
bits : 19 - 19 (1 bit)
access : read-only
P20 : Pull-Down Status
bits : 20 - 20 (1 bit)
access : read-only
P21 : Pull-Down Status
bits : 21 - 21 (1 bit)
access : read-only
P22 : Pull-Down Status
bits : 22 - 22 (1 bit)
access : read-only
P23 : Pull-Down Status
bits : 23 - 23 (1 bit)
access : read-only
P24 : Pull-Down Status
bits : 24 - 24 (1 bit)
access : read-only
P25 : Pull-Down Status
bits : 25 - 25 (1 bit)
access : read-only
P26 : Pull-Down Status
bits : 26 - 26 (1 bit)
access : read-only
P27 : Pull-Down Status
bits : 27 - 27 (1 bit)
access : read-only
P28 : Pull-Down Status
bits : 28 - 28 (1 bit)
access : read-only
P29 : Pull-Down Status
bits : 29 - 29 (1 bit)
access : read-only
P30 : Pull-Down Status
bits : 30 - 30 (1 bit)
access : read-only
P31 : Pull-Down Status
bits : 31 - 31 (1 bit)
access : read-only
Output Write Enable
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Output Write Enable
bits : 0 - 0 (1 bit)
access : write-only
P1 : Output Write Enable
bits : 1 - 1 (1 bit)
access : write-only
P2 : Output Write Enable
bits : 2 - 2 (1 bit)
access : write-only
P3 : Output Write Enable
bits : 3 - 3 (1 bit)
access : write-only
P4 : Output Write Enable
bits : 4 - 4 (1 bit)
access : write-only
P5 : Output Write Enable
bits : 5 - 5 (1 bit)
access : write-only
P6 : Output Write Enable
bits : 6 - 6 (1 bit)
access : write-only
P7 : Output Write Enable
bits : 7 - 7 (1 bit)
access : write-only
P8 : Output Write Enable
bits : 8 - 8 (1 bit)
access : write-only
P9 : Output Write Enable
bits : 9 - 9 (1 bit)
access : write-only
P10 : Output Write Enable
bits : 10 - 10 (1 bit)
access : write-only
P11 : Output Write Enable
bits : 11 - 11 (1 bit)
access : write-only
P12 : Output Write Enable
bits : 12 - 12 (1 bit)
access : write-only
P13 : Output Write Enable
bits : 13 - 13 (1 bit)
access : write-only
P14 : Output Write Enable
bits : 14 - 14 (1 bit)
access : write-only
P15 : Output Write Enable
bits : 15 - 15 (1 bit)
access : write-only
P16 : Output Write Enable
bits : 16 - 16 (1 bit)
access : write-only
P17 : Output Write Enable
bits : 17 - 17 (1 bit)
access : write-only
P18 : Output Write Enable
bits : 18 - 18 (1 bit)
access : write-only
P19 : Output Write Enable
bits : 19 - 19 (1 bit)
access : write-only
P20 : Output Write Enable
bits : 20 - 20 (1 bit)
access : write-only
P21 : Output Write Enable
bits : 21 - 21 (1 bit)
access : write-only
P22 : Output Write Enable
bits : 22 - 22 (1 bit)
access : write-only
P23 : Output Write Enable
bits : 23 - 23 (1 bit)
access : write-only
P24 : Output Write Enable
bits : 24 - 24 (1 bit)
access : write-only
P25 : Output Write Enable
bits : 25 - 25 (1 bit)
access : write-only
P26 : Output Write Enable
bits : 26 - 26 (1 bit)
access : write-only
P27 : Output Write Enable
bits : 27 - 27 (1 bit)
access : write-only
P28 : Output Write Enable
bits : 28 - 28 (1 bit)
access : write-only
P29 : Output Write Enable
bits : 29 - 29 (1 bit)
access : write-only
P30 : Output Write Enable
bits : 30 - 30 (1 bit)
access : write-only
P31 : Output Write Enable
bits : 31 - 31 (1 bit)
access : write-only
Output Write Disable
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Output Write Disable
bits : 0 - 0 (1 bit)
access : write-only
P1 : Output Write Disable
bits : 1 - 1 (1 bit)
access : write-only
P2 : Output Write Disable
bits : 2 - 2 (1 bit)
access : write-only
P3 : Output Write Disable
bits : 3 - 3 (1 bit)
access : write-only
P4 : Output Write Disable
bits : 4 - 4 (1 bit)
access : write-only
P5 : Output Write Disable
bits : 5 - 5 (1 bit)
access : write-only
P6 : Output Write Disable
bits : 6 - 6 (1 bit)
access : write-only
P7 : Output Write Disable
bits : 7 - 7 (1 bit)
access : write-only
P8 : Output Write Disable
bits : 8 - 8 (1 bit)
access : write-only
P9 : Output Write Disable
bits : 9 - 9 (1 bit)
access : write-only
P10 : Output Write Disable
bits : 10 - 10 (1 bit)
access : write-only
P11 : Output Write Disable
bits : 11 - 11 (1 bit)
access : write-only
P12 : Output Write Disable
bits : 12 - 12 (1 bit)
access : write-only
P13 : Output Write Disable
bits : 13 - 13 (1 bit)
access : write-only
P14 : Output Write Disable
bits : 14 - 14 (1 bit)
access : write-only
P15 : Output Write Disable
bits : 15 - 15 (1 bit)
access : write-only
P16 : Output Write Disable
bits : 16 - 16 (1 bit)
access : write-only
P17 : Output Write Disable
bits : 17 - 17 (1 bit)
access : write-only
P18 : Output Write Disable
bits : 18 - 18 (1 bit)
access : write-only
P19 : Output Write Disable
bits : 19 - 19 (1 bit)
access : write-only
P20 : Output Write Disable
bits : 20 - 20 (1 bit)
access : write-only
P21 : Output Write Disable
bits : 21 - 21 (1 bit)
access : write-only
P22 : Output Write Disable
bits : 22 - 22 (1 bit)
access : write-only
P23 : Output Write Disable
bits : 23 - 23 (1 bit)
access : write-only
P24 : Output Write Disable
bits : 24 - 24 (1 bit)
access : write-only
P25 : Output Write Disable
bits : 25 - 25 (1 bit)
access : write-only
P26 : Output Write Disable
bits : 26 - 26 (1 bit)
access : write-only
P27 : Output Write Disable
bits : 27 - 27 (1 bit)
access : write-only
P28 : Output Write Disable
bits : 28 - 28 (1 bit)
access : write-only
P29 : Output Write Disable
bits : 29 - 29 (1 bit)
access : write-only
P30 : Output Write Disable
bits : 30 - 30 (1 bit)
access : write-only
P31 : Output Write Disable
bits : 31 - 31 (1 bit)
access : write-only
Output Write Status Register
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Output Write Status
bits : 0 - 0 (1 bit)
access : read-only
P1 : Output Write Status
bits : 1 - 1 (1 bit)
access : read-only
P2 : Output Write Status
bits : 2 - 2 (1 bit)
access : read-only
P3 : Output Write Status
bits : 3 - 3 (1 bit)
access : read-only
P4 : Output Write Status
bits : 4 - 4 (1 bit)
access : read-only
P5 : Output Write Status
bits : 5 - 5 (1 bit)
access : read-only
P6 : Output Write Status
bits : 6 - 6 (1 bit)
access : read-only
P7 : Output Write Status
bits : 7 - 7 (1 bit)
access : read-only
P8 : Output Write Status
bits : 8 - 8 (1 bit)
access : read-only
P9 : Output Write Status
bits : 9 - 9 (1 bit)
access : read-only
P10 : Output Write Status
bits : 10 - 10 (1 bit)
access : read-only
P11 : Output Write Status
bits : 11 - 11 (1 bit)
access : read-only
P12 : Output Write Status
bits : 12 - 12 (1 bit)
access : read-only
P13 : Output Write Status
bits : 13 - 13 (1 bit)
access : read-only
P14 : Output Write Status
bits : 14 - 14 (1 bit)
access : read-only
P15 : Output Write Status
bits : 15 - 15 (1 bit)
access : read-only
P16 : Output Write Status
bits : 16 - 16 (1 bit)
access : read-only
P17 : Output Write Status
bits : 17 - 17 (1 bit)
access : read-only
P18 : Output Write Status
bits : 18 - 18 (1 bit)
access : read-only
P19 : Output Write Status
bits : 19 - 19 (1 bit)
access : read-only
P20 : Output Write Status
bits : 20 - 20 (1 bit)
access : read-only
P21 : Output Write Status
bits : 21 - 21 (1 bit)
access : read-only
P22 : Output Write Status
bits : 22 - 22 (1 bit)
access : read-only
P23 : Output Write Status
bits : 23 - 23 (1 bit)
access : read-only
P24 : Output Write Status
bits : 24 - 24 (1 bit)
access : read-only
P25 : Output Write Status
bits : 25 - 25 (1 bit)
access : read-only
P26 : Output Write Status
bits : 26 - 26 (1 bit)
access : read-only
P27 : Output Write Status
bits : 27 - 27 (1 bit)
access : read-only
P28 : Output Write Status
bits : 28 - 28 (1 bit)
access : read-only
P29 : Output Write Status
bits : 29 - 29 (1 bit)
access : read-only
P30 : Output Write Status
bits : 30 - 30 (1 bit)
access : read-only
P31 : Output Write Status
bits : 31 - 31 (1 bit)
access : read-only
Additional Interrupt Modes Enable Register
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Additional Interrupt Modes Enable
bits : 0 - 0 (1 bit)
access : write-only
P1 : Additional Interrupt Modes Enable
bits : 1 - 1 (1 bit)
access : write-only
P2 : Additional Interrupt Modes Enable
bits : 2 - 2 (1 bit)
access : write-only
P3 : Additional Interrupt Modes Enable
bits : 3 - 3 (1 bit)
access : write-only
P4 : Additional Interrupt Modes Enable
bits : 4 - 4 (1 bit)
access : write-only
P5 : Additional Interrupt Modes Enable
bits : 5 - 5 (1 bit)
access : write-only
P6 : Additional Interrupt Modes Enable
bits : 6 - 6 (1 bit)
access : write-only
P7 : Additional Interrupt Modes Enable
bits : 7 - 7 (1 bit)
access : write-only
P8 : Additional Interrupt Modes Enable
bits : 8 - 8 (1 bit)
access : write-only
P9 : Additional Interrupt Modes Enable
bits : 9 - 9 (1 bit)
access : write-only
P10 : Additional Interrupt Modes Enable
bits : 10 - 10 (1 bit)
access : write-only
P11 : Additional Interrupt Modes Enable
bits : 11 - 11 (1 bit)
access : write-only
P12 : Additional Interrupt Modes Enable
bits : 12 - 12 (1 bit)
access : write-only
P13 : Additional Interrupt Modes Enable
bits : 13 - 13 (1 bit)
access : write-only
P14 : Additional Interrupt Modes Enable
bits : 14 - 14 (1 bit)
access : write-only
P15 : Additional Interrupt Modes Enable
bits : 15 - 15 (1 bit)
access : write-only
P16 : Additional Interrupt Modes Enable
bits : 16 - 16 (1 bit)
access : write-only
P17 : Additional Interrupt Modes Enable
bits : 17 - 17 (1 bit)
access : write-only
P18 : Additional Interrupt Modes Enable
bits : 18 - 18 (1 bit)
access : write-only
P19 : Additional Interrupt Modes Enable
bits : 19 - 19 (1 bit)
access : write-only
P20 : Additional Interrupt Modes Enable
bits : 20 - 20 (1 bit)
access : write-only
P21 : Additional Interrupt Modes Enable
bits : 21 - 21 (1 bit)
access : write-only
P22 : Additional Interrupt Modes Enable
bits : 22 - 22 (1 bit)
access : write-only
P23 : Additional Interrupt Modes Enable
bits : 23 - 23 (1 bit)
access : write-only
P24 : Additional Interrupt Modes Enable
bits : 24 - 24 (1 bit)
access : write-only
P25 : Additional Interrupt Modes Enable
bits : 25 - 25 (1 bit)
access : write-only
P26 : Additional Interrupt Modes Enable
bits : 26 - 26 (1 bit)
access : write-only
P27 : Additional Interrupt Modes Enable
bits : 27 - 27 (1 bit)
access : write-only
P28 : Additional Interrupt Modes Enable
bits : 28 - 28 (1 bit)
access : write-only
P29 : Additional Interrupt Modes Enable
bits : 29 - 29 (1 bit)
access : write-only
P30 : Additional Interrupt Modes Enable
bits : 30 - 30 (1 bit)
access : write-only
P31 : Additional Interrupt Modes Enable
bits : 31 - 31 (1 bit)
access : write-only
Additional Interrupt Modes Disable Register
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Additional Interrupt Modes Disable
bits : 0 - 0 (1 bit)
access : write-only
P1 : Additional Interrupt Modes Disable
bits : 1 - 1 (1 bit)
access : write-only
P2 : Additional Interrupt Modes Disable
bits : 2 - 2 (1 bit)
access : write-only
P3 : Additional Interrupt Modes Disable
bits : 3 - 3 (1 bit)
access : write-only
P4 : Additional Interrupt Modes Disable
bits : 4 - 4 (1 bit)
access : write-only
P5 : Additional Interrupt Modes Disable
bits : 5 - 5 (1 bit)
access : write-only
P6 : Additional Interrupt Modes Disable
bits : 6 - 6 (1 bit)
access : write-only
P7 : Additional Interrupt Modes Disable
bits : 7 - 7 (1 bit)
access : write-only
P8 : Additional Interrupt Modes Disable
bits : 8 - 8 (1 bit)
access : write-only
P9 : Additional Interrupt Modes Disable
bits : 9 - 9 (1 bit)
access : write-only
P10 : Additional Interrupt Modes Disable
bits : 10 - 10 (1 bit)
access : write-only
P11 : Additional Interrupt Modes Disable
bits : 11 - 11 (1 bit)
access : write-only
P12 : Additional Interrupt Modes Disable
bits : 12 - 12 (1 bit)
access : write-only
P13 : Additional Interrupt Modes Disable
bits : 13 - 13 (1 bit)
access : write-only
P14 : Additional Interrupt Modes Disable
bits : 14 - 14 (1 bit)
access : write-only
P15 : Additional Interrupt Modes Disable
bits : 15 - 15 (1 bit)
access : write-only
P16 : Additional Interrupt Modes Disable
bits : 16 - 16 (1 bit)
access : write-only
P17 : Additional Interrupt Modes Disable
bits : 17 - 17 (1 bit)
access : write-only
P18 : Additional Interrupt Modes Disable
bits : 18 - 18 (1 bit)
access : write-only
P19 : Additional Interrupt Modes Disable
bits : 19 - 19 (1 bit)
access : write-only
P20 : Additional Interrupt Modes Disable
bits : 20 - 20 (1 bit)
access : write-only
P21 : Additional Interrupt Modes Disable
bits : 21 - 21 (1 bit)
access : write-only
P22 : Additional Interrupt Modes Disable
bits : 22 - 22 (1 bit)
access : write-only
P23 : Additional Interrupt Modes Disable
bits : 23 - 23 (1 bit)
access : write-only
P24 : Additional Interrupt Modes Disable
bits : 24 - 24 (1 bit)
access : write-only
P25 : Additional Interrupt Modes Disable
bits : 25 - 25 (1 bit)
access : write-only
P26 : Additional Interrupt Modes Disable
bits : 26 - 26 (1 bit)
access : write-only
P27 : Additional Interrupt Modes Disable
bits : 27 - 27 (1 bit)
access : write-only
P28 : Additional Interrupt Modes Disable
bits : 28 - 28 (1 bit)
access : write-only
P29 : Additional Interrupt Modes Disable
bits : 29 - 29 (1 bit)
access : write-only
P30 : Additional Interrupt Modes Disable
bits : 30 - 30 (1 bit)
access : write-only
P31 : Additional Interrupt Modes Disable
bits : 31 - 31 (1 bit)
access : write-only
Additional Interrupt Modes Mask Register
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Peripheral CD Status
bits : 0 - 0 (1 bit)
access : read-only
P1 : Peripheral CD Status
bits : 1 - 1 (1 bit)
access : read-only
P2 : Peripheral CD Status
bits : 2 - 2 (1 bit)
access : read-only
P3 : Peripheral CD Status
bits : 3 - 3 (1 bit)
access : read-only
P4 : Peripheral CD Status
bits : 4 - 4 (1 bit)
access : read-only
P5 : Peripheral CD Status
bits : 5 - 5 (1 bit)
access : read-only
P6 : Peripheral CD Status
bits : 6 - 6 (1 bit)
access : read-only
P7 : Peripheral CD Status
bits : 7 - 7 (1 bit)
access : read-only
P8 : Peripheral CD Status
bits : 8 - 8 (1 bit)
access : read-only
P9 : Peripheral CD Status
bits : 9 - 9 (1 bit)
access : read-only
P10 : Peripheral CD Status
bits : 10 - 10 (1 bit)
access : read-only
P11 : Peripheral CD Status
bits : 11 - 11 (1 bit)
access : read-only
P12 : Peripheral CD Status
bits : 12 - 12 (1 bit)
access : read-only
P13 : Peripheral CD Status
bits : 13 - 13 (1 bit)
access : read-only
P14 : Peripheral CD Status
bits : 14 - 14 (1 bit)
access : read-only
P15 : Peripheral CD Status
bits : 15 - 15 (1 bit)
access : read-only
P16 : Peripheral CD Status
bits : 16 - 16 (1 bit)
access : read-only
P17 : Peripheral CD Status
bits : 17 - 17 (1 bit)
access : read-only
P18 : Peripheral CD Status
bits : 18 - 18 (1 bit)
access : read-only
P19 : Peripheral CD Status
bits : 19 - 19 (1 bit)
access : read-only
P20 : Peripheral CD Status
bits : 20 - 20 (1 bit)
access : read-only
P21 : Peripheral CD Status
bits : 21 - 21 (1 bit)
access : read-only
P22 : Peripheral CD Status
bits : 22 - 22 (1 bit)
access : read-only
P23 : Peripheral CD Status
bits : 23 - 23 (1 bit)
access : read-only
P24 : Peripheral CD Status
bits : 24 - 24 (1 bit)
access : read-only
P25 : Peripheral CD Status
bits : 25 - 25 (1 bit)
access : read-only
P26 : Peripheral CD Status
bits : 26 - 26 (1 bit)
access : read-only
P27 : Peripheral CD Status
bits : 27 - 27 (1 bit)
access : read-only
P28 : Peripheral CD Status
bits : 28 - 28 (1 bit)
access : read-only
P29 : Peripheral CD Status
bits : 29 - 29 (1 bit)
access : read-only
P30 : Peripheral CD Status
bits : 30 - 30 (1 bit)
access : read-only
P31 : Peripheral CD Status
bits : 31 - 31 (1 bit)
access : read-only
Edge Select Register
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Edge Interrupt Selection
bits : 0 - 0 (1 bit)
access : write-only
P1 : Edge Interrupt Selection
bits : 1 - 1 (1 bit)
access : write-only
P2 : Edge Interrupt Selection
bits : 2 - 2 (1 bit)
access : write-only
P3 : Edge Interrupt Selection
bits : 3 - 3 (1 bit)
access : write-only
P4 : Edge Interrupt Selection
bits : 4 - 4 (1 bit)
access : write-only
P5 : Edge Interrupt Selection
bits : 5 - 5 (1 bit)
access : write-only
P6 : Edge Interrupt Selection
bits : 6 - 6 (1 bit)
access : write-only
P7 : Edge Interrupt Selection
bits : 7 - 7 (1 bit)
access : write-only
P8 : Edge Interrupt Selection
bits : 8 - 8 (1 bit)
access : write-only
P9 : Edge Interrupt Selection
bits : 9 - 9 (1 bit)
access : write-only
P10 : Edge Interrupt Selection
bits : 10 - 10 (1 bit)
access : write-only
P11 : Edge Interrupt Selection
bits : 11 - 11 (1 bit)
access : write-only
P12 : Edge Interrupt Selection
bits : 12 - 12 (1 bit)
access : write-only
P13 : Edge Interrupt Selection
bits : 13 - 13 (1 bit)
access : write-only
P14 : Edge Interrupt Selection
bits : 14 - 14 (1 bit)
access : write-only
P15 : Edge Interrupt Selection
bits : 15 - 15 (1 bit)
access : write-only
P16 : Edge Interrupt Selection
bits : 16 - 16 (1 bit)
access : write-only
P17 : Edge Interrupt Selection
bits : 17 - 17 (1 bit)
access : write-only
P18 : Edge Interrupt Selection
bits : 18 - 18 (1 bit)
access : write-only
P19 : Edge Interrupt Selection
bits : 19 - 19 (1 bit)
access : write-only
P20 : Edge Interrupt Selection
bits : 20 - 20 (1 bit)
access : write-only
P21 : Edge Interrupt Selection
bits : 21 - 21 (1 bit)
access : write-only
P22 : Edge Interrupt Selection
bits : 22 - 22 (1 bit)
access : write-only
P23 : Edge Interrupt Selection
bits : 23 - 23 (1 bit)
access : write-only
P24 : Edge Interrupt Selection
bits : 24 - 24 (1 bit)
access : write-only
P25 : Edge Interrupt Selection
bits : 25 - 25 (1 bit)
access : write-only
P26 : Edge Interrupt Selection
bits : 26 - 26 (1 bit)
access : write-only
P27 : Edge Interrupt Selection
bits : 27 - 27 (1 bit)
access : write-only
P28 : Edge Interrupt Selection
bits : 28 - 28 (1 bit)
access : write-only
P29 : Edge Interrupt Selection
bits : 29 - 29 (1 bit)
access : write-only
P30 : Edge Interrupt Selection
bits : 30 - 30 (1 bit)
access : write-only
P31 : Edge Interrupt Selection
bits : 31 - 31 (1 bit)
access : write-only
Level Select Register
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Level Interrupt Selection
bits : 0 - 0 (1 bit)
access : write-only
P1 : Level Interrupt Selection
bits : 1 - 1 (1 bit)
access : write-only
P2 : Level Interrupt Selection
bits : 2 - 2 (1 bit)
access : write-only
P3 : Level Interrupt Selection
bits : 3 - 3 (1 bit)
access : write-only
P4 : Level Interrupt Selection
bits : 4 - 4 (1 bit)
access : write-only
P5 : Level Interrupt Selection
bits : 5 - 5 (1 bit)
access : write-only
P6 : Level Interrupt Selection
bits : 6 - 6 (1 bit)
access : write-only
P7 : Level Interrupt Selection
bits : 7 - 7 (1 bit)
access : write-only
P8 : Level Interrupt Selection
bits : 8 - 8 (1 bit)
access : write-only
P9 : Level Interrupt Selection
bits : 9 - 9 (1 bit)
access : write-only
P10 : Level Interrupt Selection
bits : 10 - 10 (1 bit)
access : write-only
P11 : Level Interrupt Selection
bits : 11 - 11 (1 bit)
access : write-only
P12 : Level Interrupt Selection
bits : 12 - 12 (1 bit)
access : write-only
P13 : Level Interrupt Selection
bits : 13 - 13 (1 bit)
access : write-only
P14 : Level Interrupt Selection
bits : 14 - 14 (1 bit)
access : write-only
P15 : Level Interrupt Selection
bits : 15 - 15 (1 bit)
access : write-only
P16 : Level Interrupt Selection
bits : 16 - 16 (1 bit)
access : write-only
P17 : Level Interrupt Selection
bits : 17 - 17 (1 bit)
access : write-only
P18 : Level Interrupt Selection
bits : 18 - 18 (1 bit)
access : write-only
P19 : Level Interrupt Selection
bits : 19 - 19 (1 bit)
access : write-only
P20 : Level Interrupt Selection
bits : 20 - 20 (1 bit)
access : write-only
P21 : Level Interrupt Selection
bits : 21 - 21 (1 bit)
access : write-only
P22 : Level Interrupt Selection
bits : 22 - 22 (1 bit)
access : write-only
P23 : Level Interrupt Selection
bits : 23 - 23 (1 bit)
access : write-only
P24 : Level Interrupt Selection
bits : 24 - 24 (1 bit)
access : write-only
P25 : Level Interrupt Selection
bits : 25 - 25 (1 bit)
access : write-only
P26 : Level Interrupt Selection
bits : 26 - 26 (1 bit)
access : write-only
P27 : Level Interrupt Selection
bits : 27 - 27 (1 bit)
access : write-only
P28 : Level Interrupt Selection
bits : 28 - 28 (1 bit)
access : write-only
P29 : Level Interrupt Selection
bits : 29 - 29 (1 bit)
access : write-only
P30 : Level Interrupt Selection
bits : 30 - 30 (1 bit)
access : write-only
P31 : Level Interrupt Selection
bits : 31 - 31 (1 bit)
access : write-only
Edge/Level Status Register
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Edge/Level Interrupt Source Selection
bits : 0 - 0 (1 bit)
access : read-only
P1 : Edge/Level Interrupt Source Selection
bits : 1 - 1 (1 bit)
access : read-only
P2 : Edge/Level Interrupt Source Selection
bits : 2 - 2 (1 bit)
access : read-only
P3 : Edge/Level Interrupt Source Selection
bits : 3 - 3 (1 bit)
access : read-only
P4 : Edge/Level Interrupt Source Selection
bits : 4 - 4 (1 bit)
access : read-only
P5 : Edge/Level Interrupt Source Selection
bits : 5 - 5 (1 bit)
access : read-only
P6 : Edge/Level Interrupt Source Selection
bits : 6 - 6 (1 bit)
access : read-only
P7 : Edge/Level Interrupt Source Selection
bits : 7 - 7 (1 bit)
access : read-only
P8 : Edge/Level Interrupt Source Selection
bits : 8 - 8 (1 bit)
access : read-only
P9 : Edge/Level Interrupt Source Selection
bits : 9 - 9 (1 bit)
access : read-only
P10 : Edge/Level Interrupt Source Selection
bits : 10 - 10 (1 bit)
access : read-only
P11 : Edge/Level Interrupt Source Selection
bits : 11 - 11 (1 bit)
access : read-only
P12 : Edge/Level Interrupt Source Selection
bits : 12 - 12 (1 bit)
access : read-only
P13 : Edge/Level Interrupt Source Selection
bits : 13 - 13 (1 bit)
access : read-only
P14 : Edge/Level Interrupt Source Selection
bits : 14 - 14 (1 bit)
access : read-only
P15 : Edge/Level Interrupt Source Selection
bits : 15 - 15 (1 bit)
access : read-only
P16 : Edge/Level Interrupt Source Selection
bits : 16 - 16 (1 bit)
access : read-only
P17 : Edge/Level Interrupt Source Selection
bits : 17 - 17 (1 bit)
access : read-only
P18 : Edge/Level Interrupt Source Selection
bits : 18 - 18 (1 bit)
access : read-only
P19 : Edge/Level Interrupt Source Selection
bits : 19 - 19 (1 bit)
access : read-only
P20 : Edge/Level Interrupt Source Selection
bits : 20 - 20 (1 bit)
access : read-only
P21 : Edge/Level Interrupt Source Selection
bits : 21 - 21 (1 bit)
access : read-only
P22 : Edge/Level Interrupt Source Selection
bits : 22 - 22 (1 bit)
access : read-only
P23 : Edge/Level Interrupt Source Selection
bits : 23 - 23 (1 bit)
access : read-only
P24 : Edge/Level Interrupt Source Selection
bits : 24 - 24 (1 bit)
access : read-only
P25 : Edge/Level Interrupt Source Selection
bits : 25 - 25 (1 bit)
access : read-only
P26 : Edge/Level Interrupt Source Selection
bits : 26 - 26 (1 bit)
access : read-only
P27 : Edge/Level Interrupt Source Selection
bits : 27 - 27 (1 bit)
access : read-only
P28 : Edge/Level Interrupt Source Selection
bits : 28 - 28 (1 bit)
access : read-only
P29 : Edge/Level Interrupt Source Selection
bits : 29 - 29 (1 bit)
access : read-only
P30 : Edge/Level Interrupt Source Selection
bits : 30 - 30 (1 bit)
access : read-only
P31 : Edge/Level Interrupt Source Selection
bits : 31 - 31 (1 bit)
access : read-only
Falling Edge/Low-Level Select Register
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Falling Edge/Low-Level Interrupt Selection
bits : 0 - 0 (1 bit)
access : write-only
P1 : Falling Edge/Low-Level Interrupt Selection
bits : 1 - 1 (1 bit)
access : write-only
P2 : Falling Edge/Low-Level Interrupt Selection
bits : 2 - 2 (1 bit)
access : write-only
P3 : Falling Edge/Low-Level Interrupt Selection
bits : 3 - 3 (1 bit)
access : write-only
P4 : Falling Edge/Low-Level Interrupt Selection
bits : 4 - 4 (1 bit)
access : write-only
P5 : Falling Edge/Low-Level Interrupt Selection
bits : 5 - 5 (1 bit)
access : write-only
P6 : Falling Edge/Low-Level Interrupt Selection
bits : 6 - 6 (1 bit)
access : write-only
P7 : Falling Edge/Low-Level Interrupt Selection
bits : 7 - 7 (1 bit)
access : write-only
P8 : Falling Edge/Low-Level Interrupt Selection
bits : 8 - 8 (1 bit)
access : write-only
P9 : Falling Edge/Low-Level Interrupt Selection
bits : 9 - 9 (1 bit)
access : write-only
P10 : Falling Edge/Low-Level Interrupt Selection
bits : 10 - 10 (1 bit)
access : write-only
P11 : Falling Edge/Low-Level Interrupt Selection
bits : 11 - 11 (1 bit)
access : write-only
P12 : Falling Edge/Low-Level Interrupt Selection
bits : 12 - 12 (1 bit)
access : write-only
P13 : Falling Edge/Low-Level Interrupt Selection
bits : 13 - 13 (1 bit)
access : write-only
P14 : Falling Edge/Low-Level Interrupt Selection
bits : 14 - 14 (1 bit)
access : write-only
P15 : Falling Edge/Low-Level Interrupt Selection
bits : 15 - 15 (1 bit)
access : write-only
P16 : Falling Edge/Low-Level Interrupt Selection
bits : 16 - 16 (1 bit)
access : write-only
P17 : Falling Edge/Low-Level Interrupt Selection
bits : 17 - 17 (1 bit)
access : write-only
P18 : Falling Edge/Low-Level Interrupt Selection
bits : 18 - 18 (1 bit)
access : write-only
P19 : Falling Edge/Low-Level Interrupt Selection
bits : 19 - 19 (1 bit)
access : write-only
P20 : Falling Edge/Low-Level Interrupt Selection
bits : 20 - 20 (1 bit)
access : write-only
P21 : Falling Edge/Low-Level Interrupt Selection
bits : 21 - 21 (1 bit)
access : write-only
P22 : Falling Edge/Low-Level Interrupt Selection
bits : 22 - 22 (1 bit)
access : write-only
P23 : Falling Edge/Low-Level Interrupt Selection
bits : 23 - 23 (1 bit)
access : write-only
P24 : Falling Edge/Low-Level Interrupt Selection
bits : 24 - 24 (1 bit)
access : write-only
P25 : Falling Edge/Low-Level Interrupt Selection
bits : 25 - 25 (1 bit)
access : write-only
P26 : Falling Edge/Low-Level Interrupt Selection
bits : 26 - 26 (1 bit)
access : write-only
P27 : Falling Edge/Low-Level Interrupt Selection
bits : 27 - 27 (1 bit)
access : write-only
P28 : Falling Edge/Low-Level Interrupt Selection
bits : 28 - 28 (1 bit)
access : write-only
P29 : Falling Edge/Low-Level Interrupt Selection
bits : 29 - 29 (1 bit)
access : write-only
P30 : Falling Edge/Low-Level Interrupt Selection
bits : 30 - 30 (1 bit)
access : write-only
P31 : Falling Edge/Low-Level Interrupt Selection
bits : 31 - 31 (1 bit)
access : write-only
Rising Edge/High-Level Select Register
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Rising Edge/High-Level Interrupt Selection
bits : 0 - 0 (1 bit)
access : write-only
P1 : Rising Edge/High-Level Interrupt Selection
bits : 1 - 1 (1 bit)
access : write-only
P2 : Rising Edge/High-Level Interrupt Selection
bits : 2 - 2 (1 bit)
access : write-only
P3 : Rising Edge/High-Level Interrupt Selection
bits : 3 - 3 (1 bit)
access : write-only
P4 : Rising Edge/High-Level Interrupt Selection
bits : 4 - 4 (1 bit)
access : write-only
P5 : Rising Edge/High-Level Interrupt Selection
bits : 5 - 5 (1 bit)
access : write-only
P6 : Rising Edge/High-Level Interrupt Selection
bits : 6 - 6 (1 bit)
access : write-only
P7 : Rising Edge/High-Level Interrupt Selection
bits : 7 - 7 (1 bit)
access : write-only
P8 : Rising Edge/High-Level Interrupt Selection
bits : 8 - 8 (1 bit)
access : write-only
P9 : Rising Edge/High-Level Interrupt Selection
bits : 9 - 9 (1 bit)
access : write-only
P10 : Rising Edge/High-Level Interrupt Selection
bits : 10 - 10 (1 bit)
access : write-only
P11 : Rising Edge/High-Level Interrupt Selection
bits : 11 - 11 (1 bit)
access : write-only
P12 : Rising Edge/High-Level Interrupt Selection
bits : 12 - 12 (1 bit)
access : write-only
P13 : Rising Edge/High-Level Interrupt Selection
bits : 13 - 13 (1 bit)
access : write-only
P14 : Rising Edge/High-Level Interrupt Selection
bits : 14 - 14 (1 bit)
access : write-only
P15 : Rising Edge/High-Level Interrupt Selection
bits : 15 - 15 (1 bit)
access : write-only
P16 : Rising Edge/High-Level Interrupt Selection
bits : 16 - 16 (1 bit)
access : write-only
P17 : Rising Edge/High-Level Interrupt Selection
bits : 17 - 17 (1 bit)
access : write-only
P18 : Rising Edge/High-Level Interrupt Selection
bits : 18 - 18 (1 bit)
access : write-only
P19 : Rising Edge/High-Level Interrupt Selection
bits : 19 - 19 (1 bit)
access : write-only
P20 : Rising Edge/High-Level Interrupt Selection
bits : 20 - 20 (1 bit)
access : write-only
P21 : Rising Edge/High-Level Interrupt Selection
bits : 21 - 21 (1 bit)
access : write-only
P22 : Rising Edge/High-Level Interrupt Selection
bits : 22 - 22 (1 bit)
access : write-only
P23 : Rising Edge/High-Level Interrupt Selection
bits : 23 - 23 (1 bit)
access : write-only
P24 : Rising Edge/High-Level Interrupt Selection
bits : 24 - 24 (1 bit)
access : write-only
P25 : Rising Edge/High-Level Interrupt Selection
bits : 25 - 25 (1 bit)
access : write-only
P26 : Rising Edge/High-Level Interrupt Selection
bits : 26 - 26 (1 bit)
access : write-only
P27 : Rising Edge/High-Level Interrupt Selection
bits : 27 - 27 (1 bit)
access : write-only
P28 : Rising Edge/High-Level Interrupt Selection
bits : 28 - 28 (1 bit)
access : write-only
P29 : Rising Edge/High-Level Interrupt Selection
bits : 29 - 29 (1 bit)
access : write-only
P30 : Rising Edge/High-Level Interrupt Selection
bits : 30 - 30 (1 bit)
access : write-only
P31 : Rising Edge/High-Level Interrupt Selection
bits : 31 - 31 (1 bit)
access : write-only
Fall/Rise - Low/High Status Register
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Edge/Level Interrupt Source Selection
bits : 0 - 0 (1 bit)
access : read-only
P1 : Edge/Level Interrupt Source Selection
bits : 1 - 1 (1 bit)
access : read-only
P2 : Edge/Level Interrupt Source Selection
bits : 2 - 2 (1 bit)
access : read-only
P3 : Edge/Level Interrupt Source Selection
bits : 3 - 3 (1 bit)
access : read-only
P4 : Edge/Level Interrupt Source Selection
bits : 4 - 4 (1 bit)
access : read-only
P5 : Edge/Level Interrupt Source Selection
bits : 5 - 5 (1 bit)
access : read-only
P6 : Edge/Level Interrupt Source Selection
bits : 6 - 6 (1 bit)
access : read-only
P7 : Edge/Level Interrupt Source Selection
bits : 7 - 7 (1 bit)
access : read-only
P8 : Edge/Level Interrupt Source Selection
bits : 8 - 8 (1 bit)
access : read-only
P9 : Edge/Level Interrupt Source Selection
bits : 9 - 9 (1 bit)
access : read-only
P10 : Edge/Level Interrupt Source Selection
bits : 10 - 10 (1 bit)
access : read-only
P11 : Edge/Level Interrupt Source Selection
bits : 11 - 11 (1 bit)
access : read-only
P12 : Edge/Level Interrupt Source Selection
bits : 12 - 12 (1 bit)
access : read-only
P13 : Edge/Level Interrupt Source Selection
bits : 13 - 13 (1 bit)
access : read-only
P14 : Edge/Level Interrupt Source Selection
bits : 14 - 14 (1 bit)
access : read-only
P15 : Edge/Level Interrupt Source Selection
bits : 15 - 15 (1 bit)
access : read-only
P16 : Edge/Level Interrupt Source Selection
bits : 16 - 16 (1 bit)
access : read-only
P17 : Edge/Level Interrupt Source Selection
bits : 17 - 17 (1 bit)
access : read-only
P18 : Edge/Level Interrupt Source Selection
bits : 18 - 18 (1 bit)
access : read-only
P19 : Edge/Level Interrupt Source Selection
bits : 19 - 19 (1 bit)
access : read-only
P20 : Edge/Level Interrupt Source Selection
bits : 20 - 20 (1 bit)
access : read-only
P21 : Edge/Level Interrupt Source Selection
bits : 21 - 21 (1 bit)
access : read-only
P22 : Edge/Level Interrupt Source Selection
bits : 22 - 22 (1 bit)
access : read-only
P23 : Edge/Level Interrupt Source Selection
bits : 23 - 23 (1 bit)
access : read-only
P24 : Edge/Level Interrupt Source Selection
bits : 24 - 24 (1 bit)
access : read-only
P25 : Edge/Level Interrupt Source Selection
bits : 25 - 25 (1 bit)
access : read-only
P26 : Edge/Level Interrupt Source Selection
bits : 26 - 26 (1 bit)
access : read-only
P27 : Edge/Level Interrupt Source Selection
bits : 27 - 27 (1 bit)
access : read-only
P28 : Edge/Level Interrupt Source Selection
bits : 28 - 28 (1 bit)
access : read-only
P29 : Edge/Level Interrupt Source Selection
bits : 29 - 29 (1 bit)
access : read-only
P30 : Edge/Level Interrupt Source Selection
bits : 30 - 30 (1 bit)
access : read-only
P31 : Edge/Level Interrupt Source Selection
bits : 31 - 31 (1 bit)
access : read-only
Peripheral Select Register
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Peripheral Select
bits : 0 - 0 (1 bit)
access : read-write
P1 : Peripheral Select
bits : 1 - 1 (1 bit)
access : read-write
P2 : Peripheral Select
bits : 2 - 2 (1 bit)
access : read-write
P3 : Peripheral Select
bits : 3 - 3 (1 bit)
access : read-write
P4 : Peripheral Select
bits : 4 - 4 (1 bit)
access : read-write
P5 : Peripheral Select
bits : 5 - 5 (1 bit)
access : read-write
P6 : Peripheral Select
bits : 6 - 6 (1 bit)
access : read-write
P7 : Peripheral Select
bits : 7 - 7 (1 bit)
access : read-write
P8 : Peripheral Select
bits : 8 - 8 (1 bit)
access : read-write
P9 : Peripheral Select
bits : 9 - 9 (1 bit)
access : read-write
P10 : Peripheral Select
bits : 10 - 10 (1 bit)
access : read-write
P11 : Peripheral Select
bits : 11 - 11 (1 bit)
access : read-write
P12 : Peripheral Select
bits : 12 - 12 (1 bit)
access : read-write
P13 : Peripheral Select
bits : 13 - 13 (1 bit)
access : read-write
P14 : Peripheral Select
bits : 14 - 14 (1 bit)
access : read-write
P15 : Peripheral Select
bits : 15 - 15 (1 bit)
access : read-write
P16 : Peripheral Select
bits : 16 - 16 (1 bit)
access : read-write
P17 : Peripheral Select
bits : 17 - 17 (1 bit)
access : read-write
P18 : Peripheral Select
bits : 18 - 18 (1 bit)
access : read-write
P19 : Peripheral Select
bits : 19 - 19 (1 bit)
access : read-write
P20 : Peripheral Select
bits : 20 - 20 (1 bit)
access : read-write
P21 : Peripheral Select
bits : 21 - 21 (1 bit)
access : read-write
P22 : Peripheral Select
bits : 22 - 22 (1 bit)
access : read-write
P23 : Peripheral Select
bits : 23 - 23 (1 bit)
access : read-write
P24 : Peripheral Select
bits : 24 - 24 (1 bit)
access : read-write
P25 : Peripheral Select
bits : 25 - 25 (1 bit)
access : read-write
P26 : Peripheral Select
bits : 26 - 26 (1 bit)
access : read-write
P27 : Peripheral Select
bits : 27 - 27 (1 bit)
access : read-write
P28 : Peripheral Select
bits : 28 - 28 (1 bit)
access : read-write
P29 : Peripheral Select
bits : 29 - 29 (1 bit)
access : read-write
P30 : Peripheral Select
bits : 30 - 30 (1 bit)
access : read-write
P31 : Peripheral Select
bits : 31 - 31 (1 bit)
access : read-write
Lock Status
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Lock Status
bits : 0 - 0 (1 bit)
access : read-only
P1 : Lock Status
bits : 1 - 1 (1 bit)
access : read-only
P2 : Lock Status
bits : 2 - 2 (1 bit)
access : read-only
P3 : Lock Status
bits : 3 - 3 (1 bit)
access : read-only
P4 : Lock Status
bits : 4 - 4 (1 bit)
access : read-only
P5 : Lock Status
bits : 5 - 5 (1 bit)
access : read-only
P6 : Lock Status
bits : 6 - 6 (1 bit)
access : read-only
P7 : Lock Status
bits : 7 - 7 (1 bit)
access : read-only
P8 : Lock Status
bits : 8 - 8 (1 bit)
access : read-only
P9 : Lock Status
bits : 9 - 9 (1 bit)
access : read-only
P10 : Lock Status
bits : 10 - 10 (1 bit)
access : read-only
P11 : Lock Status
bits : 11 - 11 (1 bit)
access : read-only
P12 : Lock Status
bits : 12 - 12 (1 bit)
access : read-only
P13 : Lock Status
bits : 13 - 13 (1 bit)
access : read-only
P14 : Lock Status
bits : 14 - 14 (1 bit)
access : read-only
P15 : Lock Status
bits : 15 - 15 (1 bit)
access : read-only
P16 : Lock Status
bits : 16 - 16 (1 bit)
access : read-only
P17 : Lock Status
bits : 17 - 17 (1 bit)
access : read-only
P18 : Lock Status
bits : 18 - 18 (1 bit)
access : read-only
P19 : Lock Status
bits : 19 - 19 (1 bit)
access : read-only
P20 : Lock Status
bits : 20 - 20 (1 bit)
access : read-only
P21 : Lock Status
bits : 21 - 21 (1 bit)
access : read-only
P22 : Lock Status
bits : 22 - 22 (1 bit)
access : read-only
P23 : Lock Status
bits : 23 - 23 (1 bit)
access : read-only
P24 : Lock Status
bits : 24 - 24 (1 bit)
access : read-only
P25 : Lock Status
bits : 25 - 25 (1 bit)
access : read-only
P26 : Lock Status
bits : 26 - 26 (1 bit)
access : read-only
P27 : Lock Status
bits : 27 - 27 (1 bit)
access : read-only
P28 : Lock Status
bits : 28 - 28 (1 bit)
access : read-only
P29 : Lock Status
bits : 29 - 29 (1 bit)
access : read-only
P30 : Lock Status
bits : 30 - 30 (1 bit)
access : read-only
P31 : Lock Status
bits : 31 - 31 (1 bit)
access : read-only
Write Protection Mode Register
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WPEN : Write Protection Enable
bits : 0 - 0 (1 bit)
access : read-write
WPKEY : Write Protection Key
bits : 8 - 31 (24 bit)
access : read-write
Enumeration:
0x50494F : PASSWD
Writing any other value in this field aborts the write operation of the WPEN bit. Always reads as 0.
End of enumeration elements list.
Write Protection Status Register
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
WPVS : Write Protection Violation Status
bits : 0 - 0 (1 bit)
access : read-only
WPVSRC : Write Protection Violation Source
bits : 8 - 23 (16 bit)
access : read-only
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