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GPIO

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

GPER0

GPERC0

PDER0

PDERS0

PDERC0

PDERT0

IER0

IERS0

IERC0

IERT0

IMR00

IMR0S0

IMR0C0

IMR0T0

IMR10

IMR1S0

IMR1C0

IMR1T0

GPERT0

GFER0

GFERS0

GFERC0

GFERT0

IFR0

IFRC0

ODMER0

ODMERS0

ODMERC0

ODMERT0

PMR00

GPER1

ODCR00

ODCR0S0

GPERS1

ODCR0C0

GPERC1

ODCR0T0

ODCR10

GPERT1

ODCR1S0

ODCR1C0

PMR01

ODCR1T0

PMR0S1

PMR0C1

PMR0T1

OSRR00

PMR11

OSRR0S0

PMR1S1

OSRR0C0

OSRR0T0

PMR1C1

PMR0S0

PMR1T1

PMR21

PMR2S1

PMR2C1

PMR2T1

ODER1

STER0

STERS0

ODERS1

STERC0

ODERC1

STERT0

ODERT1

OVR1

OVRS1

PMR0C0

EVER0

EVERS0

OVRC1

EVERC0

OVRT1

EVERT0

PVR1

LOCK0

LOCKS0

LOCKC0

PUER1

LOCKT0

PUERS1

PUERC1

PUERT1

PMR0T0

PDER1

PDERS1

PDERC1

PDERT1

IER1

IERS1

UNLOCK0

ASR0

IERC1

IERT1

IMR01

IMR0S1

PARAMETER0

IMR0C1

VERSION0

PMR10

IMR0T1

IMR11

IMR1S1

IMR1C1

IMR1T1

GFER1

GFERS1

GFERC1

GFERT1

IFR1

PMR1S0

IFRC1

ODMER1

ODMERS1

ODMERC1

ODMERT1

PMR1C0

ODCR01

ODCR0S1

ODCR0C1

ODCR0T1

ODCR11

ODCR1S1

ODCR1C1

ODCR1T1

PMR1T0

OSRR01

OSRR0S1

OSRR0C1

OSRR0T1

PMR20

GPER2

GPERS2

GPERC2

STER1

STERS1

GPERT2

STERC1

PMR02

STERT1

PMR0S2

PMR0C2

PMR0T2

PMR2S0

EVER1

PMR12

EVERS1

PMR1S2

EVERC1

PMR1C2

EVERT1

PMR1T2

PMR22

PMR2S2

LOCK1

PMR2C2

LOCKS1

PMR2T2

LOCKC1

PMR2C0

ODER2

LOCKT1

ODERS2

ODERC2

ODERT2

OVR2

OVRS2

OVRC2

OVRT2

PMR2T0

PVR2

UNLOCK1

ASR1

PUER2

PUERS2

PUERC2

PARAMETER1

PUERT2

VERSION1

GPERS0

ODER0

PDER2

PDERS2

PDERC2

PDERT2

IER2

IERS2

IERC2

IERT2

ODERS0

IMR02

IMR0S2

IMR0C2

IMR0T2

IMR12

IMR1S2

IMR1C2

IMR1T2

ODERC0

GFER2

GFERS2

GFERC2

GFERT2

IFR2

IFRC2

ODERT0

ODMER2

ODMERS2

ODMERC2

ODMERT2

OVR0

ODCR02

ODCR0S2

ODCR0C2

ODCR0T2

ODCR12

ODCR1S2

ODCR1C2

ODCR1T2

OVRS0

OSRR02

OSRR0S2

OSRR0C2

OSRR0T2

OVRC0

OVRT0

STER2

STERS2

STERC2

STERT2

PVR0

EVER2

EVERS2

EVERC2

EVERT2

LOCK2

LOCKS2

LOCKC2

LOCKT2

UNLOCK2

ASR2

PARAMETER2

VERSION2

PUER0

PUERS0

PUERC0

PUERT0


GPER0

GPIO Enable Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPER0 GPER0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : GPIO Enable
bits : 0 - 0 (1 bit)

P1 : GPIO Enable
bits : 1 - 1 (1 bit)

P2 : GPIO Enable
bits : 2 - 2 (1 bit)

P3 : GPIO Enable
bits : 3 - 3 (1 bit)

P4 : GPIO Enable
bits : 4 - 4 (1 bit)

P5 : GPIO Enable
bits : 5 - 5 (1 bit)

P6 : GPIO Enable
bits : 6 - 6 (1 bit)

P7 : GPIO Enable
bits : 7 - 7 (1 bit)

P8 : GPIO Enable
bits : 8 - 8 (1 bit)

P9 : GPIO Enable
bits : 9 - 9 (1 bit)

P10 : GPIO Enable
bits : 10 - 10 (1 bit)

P11 : GPIO Enable
bits : 11 - 11 (1 bit)

P12 : GPIO Enable
bits : 12 - 12 (1 bit)

P13 : GPIO Enable
bits : 13 - 13 (1 bit)

P14 : GPIO Enable
bits : 14 - 14 (1 bit)

P15 : GPIO Enable
bits : 15 - 15 (1 bit)

P16 : GPIO Enable
bits : 16 - 16 (1 bit)

P17 : GPIO Enable
bits : 17 - 17 (1 bit)

P18 : GPIO Enable
bits : 18 - 18 (1 bit)

P19 : GPIO Enable
bits : 19 - 19 (1 bit)

P20 : GPIO Enable
bits : 20 - 20 (1 bit)

P21 : GPIO Enable
bits : 21 - 21 (1 bit)

P22 : GPIO Enable
bits : 22 - 22 (1 bit)

P23 : GPIO Enable
bits : 23 - 23 (1 bit)

P24 : GPIO Enable
bits : 24 - 24 (1 bit)

P25 : GPIO Enable
bits : 25 - 25 (1 bit)

P26 : GPIO Enable
bits : 26 - 26 (1 bit)

P27 : GPIO Enable
bits : 27 - 27 (1 bit)

P28 : GPIO Enable
bits : 28 - 28 (1 bit)

P29 : GPIO Enable
bits : 29 - 29 (1 bit)

P30 : GPIO Enable
bits : 30 - 30 (1 bit)

P31 : GPIO Enable
bits : 31 - 31 (1 bit)


GPERC0

GPIO Enable Register - Clear
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GPERC0 GPERC0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : GPIO Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : GPIO Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : GPIO Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : GPIO Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : GPIO Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : GPIO Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : GPIO Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : GPIO Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : GPIO Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : GPIO Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : GPIO Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : GPIO Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : GPIO Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : GPIO Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : GPIO Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : GPIO Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : GPIO Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : GPIO Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : GPIO Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : GPIO Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : GPIO Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : GPIO Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : GPIO Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : GPIO Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : GPIO Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : GPIO Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : GPIO Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : GPIO Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : GPIO Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : GPIO Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : GPIO Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : GPIO Enable
bits : 31 - 31 (1 bit)
access : write-only


PDER0

Pull-down Enable Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDER0 PDER0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-down Enable
bits : 0 - 0 (1 bit)

P1 : Pull-down Enable
bits : 1 - 1 (1 bit)

P2 : Pull-down Enable
bits : 2 - 2 (1 bit)

P3 : Pull-down Enable
bits : 3 - 3 (1 bit)

P4 : Pull-down Enable
bits : 4 - 4 (1 bit)

P5 : Pull-down Enable
bits : 5 - 5 (1 bit)

P6 : Pull-down Enable
bits : 6 - 6 (1 bit)

P7 : Pull-down Enable
bits : 7 - 7 (1 bit)

P8 : Pull-down Enable
bits : 8 - 8 (1 bit)

P9 : Pull-down Enable
bits : 9 - 9 (1 bit)

P10 : Pull-down Enable
bits : 10 - 10 (1 bit)

P11 : Pull-down Enable
bits : 11 - 11 (1 bit)

P12 : Pull-down Enable
bits : 12 - 12 (1 bit)

P13 : Pull-down Enable
bits : 13 - 13 (1 bit)

P14 : Pull-down Enable
bits : 14 - 14 (1 bit)

P15 : Pull-down Enable
bits : 15 - 15 (1 bit)

P16 : Pull-down Enable
bits : 16 - 16 (1 bit)

P17 : Pull-down Enable
bits : 17 - 17 (1 bit)

P18 : Pull-down Enable
bits : 18 - 18 (1 bit)

P19 : Pull-down Enable
bits : 19 - 19 (1 bit)

P20 : Pull-down Enable
bits : 20 - 20 (1 bit)

P21 : Pull-down Enable
bits : 21 - 21 (1 bit)

P22 : Pull-down Enable
bits : 22 - 22 (1 bit)

P23 : Pull-down Enable
bits : 23 - 23 (1 bit)

P24 : Pull-down Enable
bits : 24 - 24 (1 bit)

P25 : Pull-down Enable
bits : 25 - 25 (1 bit)

P26 : Pull-down Enable
bits : 26 - 26 (1 bit)

P27 : Pull-down Enable
bits : 27 - 27 (1 bit)

P28 : Pull-down Enable
bits : 28 - 28 (1 bit)

P29 : Pull-down Enable
bits : 29 - 29 (1 bit)

P30 : Pull-down Enable
bits : 30 - 30 (1 bit)

P31 : Pull-down Enable
bits : 31 - 31 (1 bit)


PDERS0

Pull-down Enable Register - Set
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PDERS0 PDERS0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-down Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Pull-down Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Pull-down Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Pull-down Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Pull-down Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Pull-down Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Pull-down Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Pull-down Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Pull-down Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Pull-down Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Pull-down Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Pull-down Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Pull-down Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Pull-down Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Pull-down Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Pull-down Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Pull-down Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Pull-down Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Pull-down Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Pull-down Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Pull-down Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Pull-down Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Pull-down Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Pull-down Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Pull-down Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Pull-down Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Pull-down Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Pull-down Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Pull-down Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Pull-down Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Pull-down Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Pull-down Enable
bits : 31 - 31 (1 bit)
access : write-only


PDERC0

Pull-down Enable Register - Clear
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PDERC0 PDERC0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-down Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Pull-down Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Pull-down Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Pull-down Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Pull-down Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Pull-down Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Pull-down Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Pull-down Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Pull-down Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Pull-down Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Pull-down Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Pull-down Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Pull-down Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Pull-down Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Pull-down Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Pull-down Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Pull-down Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Pull-down Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Pull-down Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Pull-down Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Pull-down Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Pull-down Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Pull-down Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Pull-down Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Pull-down Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Pull-down Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Pull-down Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Pull-down Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Pull-down Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Pull-down Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Pull-down Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Pull-down Enable
bits : 31 - 31 (1 bit)
access : write-only


PDERT0

Pull-down Enable Register - Toggle
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PDERT0 PDERT0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-down Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Pull-down Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Pull-down Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Pull-down Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Pull-down Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Pull-down Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Pull-down Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Pull-down Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Pull-down Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Pull-down Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Pull-down Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Pull-down Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Pull-down Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Pull-down Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Pull-down Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Pull-down Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Pull-down Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Pull-down Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Pull-down Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Pull-down Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Pull-down Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Pull-down Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Pull-down Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Pull-down Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Pull-down Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Pull-down Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Pull-down Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Pull-down Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Pull-down Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Pull-down Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Pull-down Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Pull-down Enable
bits : 31 - 31 (1 bit)
access : write-only


IER0

Interrupt Enable Register
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IER0 IER0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Enable
bits : 0 - 0 (1 bit)

P1 : Interrupt Enable
bits : 1 - 1 (1 bit)

P2 : Interrupt Enable
bits : 2 - 2 (1 bit)

P3 : Interrupt Enable
bits : 3 - 3 (1 bit)

P4 : Interrupt Enable
bits : 4 - 4 (1 bit)

P5 : Interrupt Enable
bits : 5 - 5 (1 bit)

P6 : Interrupt Enable
bits : 6 - 6 (1 bit)

P7 : Interrupt Enable
bits : 7 - 7 (1 bit)

P8 : Interrupt Enable
bits : 8 - 8 (1 bit)

P9 : Interrupt Enable
bits : 9 - 9 (1 bit)

P10 : Interrupt Enable
bits : 10 - 10 (1 bit)

P11 : Interrupt Enable
bits : 11 - 11 (1 bit)

P12 : Interrupt Enable
bits : 12 - 12 (1 bit)

P13 : Interrupt Enable
bits : 13 - 13 (1 bit)

P14 : Interrupt Enable
bits : 14 - 14 (1 bit)

P15 : Interrupt Enable
bits : 15 - 15 (1 bit)

P16 : Interrupt Enable
bits : 16 - 16 (1 bit)

P17 : Interrupt Enable
bits : 17 - 17 (1 bit)

P18 : Interrupt Enable
bits : 18 - 18 (1 bit)

P19 : Interrupt Enable
bits : 19 - 19 (1 bit)

P20 : Interrupt Enable
bits : 20 - 20 (1 bit)

P21 : Interrupt Enable
bits : 21 - 21 (1 bit)

P22 : Interrupt Enable
bits : 22 - 22 (1 bit)

P23 : Interrupt Enable
bits : 23 - 23 (1 bit)

P24 : Interrupt Enable
bits : 24 - 24 (1 bit)

P25 : Interrupt Enable
bits : 25 - 25 (1 bit)

P26 : Interrupt Enable
bits : 26 - 26 (1 bit)

P27 : Interrupt Enable
bits : 27 - 27 (1 bit)

P28 : Interrupt Enable
bits : 28 - 28 (1 bit)

P29 : Interrupt Enable
bits : 29 - 29 (1 bit)

P30 : Interrupt Enable
bits : 30 - 30 (1 bit)

P31 : Interrupt Enable
bits : 31 - 31 (1 bit)


IERS0

Interrupt Enable Register - Set
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IERS0 IERS0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Enable
bits : 31 - 31 (1 bit)
access : write-only


IERC0

Interrupt Enable Register - Clear
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IERC0 IERC0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Enable
bits : 31 - 31 (1 bit)
access : write-only


IERT0

Interrupt Enable Register - Toggle
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IERT0 IERT0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Enable
bits : 31 - 31 (1 bit)
access : write-only


IMR00

Interrupt Mode Register 0
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMR00 IMR00 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 0
bits : 0 - 0 (1 bit)

P1 : Interrupt Mode Bit 0
bits : 1 - 1 (1 bit)

P2 : Interrupt Mode Bit 0
bits : 2 - 2 (1 bit)

P3 : Interrupt Mode Bit 0
bits : 3 - 3 (1 bit)

P4 : Interrupt Mode Bit 0
bits : 4 - 4 (1 bit)

P5 : Interrupt Mode Bit 0
bits : 5 - 5 (1 bit)

P6 : Interrupt Mode Bit 0
bits : 6 - 6 (1 bit)

P7 : Interrupt Mode Bit 0
bits : 7 - 7 (1 bit)

P8 : Interrupt Mode Bit 0
bits : 8 - 8 (1 bit)

P9 : Interrupt Mode Bit 0
bits : 9 - 9 (1 bit)

P10 : Interrupt Mode Bit 0
bits : 10 - 10 (1 bit)

P11 : Interrupt Mode Bit 0
bits : 11 - 11 (1 bit)

P12 : Interrupt Mode Bit 0
bits : 12 - 12 (1 bit)

P13 : Interrupt Mode Bit 0
bits : 13 - 13 (1 bit)

P14 : Interrupt Mode Bit 0
bits : 14 - 14 (1 bit)

P15 : Interrupt Mode Bit 0
bits : 15 - 15 (1 bit)

P16 : Interrupt Mode Bit 0
bits : 16 - 16 (1 bit)

P17 : Interrupt Mode Bit 0
bits : 17 - 17 (1 bit)

P18 : Interrupt Mode Bit 0
bits : 18 - 18 (1 bit)

P19 : Interrupt Mode Bit 0
bits : 19 - 19 (1 bit)

P20 : Interrupt Mode Bit 0
bits : 20 - 20 (1 bit)

P21 : Interrupt Mode Bit 0
bits : 21 - 21 (1 bit)

P22 : Interrupt Mode Bit 0
bits : 22 - 22 (1 bit)

P23 : Interrupt Mode Bit 0
bits : 23 - 23 (1 bit)

P24 : Interrupt Mode Bit 0
bits : 24 - 24 (1 bit)

P25 : Interrupt Mode Bit 0
bits : 25 - 25 (1 bit)

P26 : Interrupt Mode Bit 0
bits : 26 - 26 (1 bit)

P27 : Interrupt Mode Bit 0
bits : 27 - 27 (1 bit)

P28 : Interrupt Mode Bit 0
bits : 28 - 28 (1 bit)

P29 : Interrupt Mode Bit 0
bits : 29 - 29 (1 bit)

P30 : Interrupt Mode Bit 0
bits : 30 - 30 (1 bit)

P31 : Interrupt Mode Bit 0
bits : 31 - 31 (1 bit)


IMR0S0

Interrupt Mode Register 0 - Set
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IMR0S0 IMR0S0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 0
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Mode Bit 0
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Mode Bit 0
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Mode Bit 0
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Mode Bit 0
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Mode Bit 0
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Mode Bit 0
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Mode Bit 0
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Mode Bit 0
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Mode Bit 0
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Mode Bit 0
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Mode Bit 0
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Mode Bit 0
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Mode Bit 0
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Mode Bit 0
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Mode Bit 0
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Mode Bit 0
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Mode Bit 0
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Mode Bit 0
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Mode Bit 0
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Mode Bit 0
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Mode Bit 0
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Mode Bit 0
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Mode Bit 0
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Mode Bit 0
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Mode Bit 0
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Mode Bit 0
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Mode Bit 0
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Mode Bit 0
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Mode Bit 0
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Mode Bit 0
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Mode Bit 0
bits : 31 - 31 (1 bit)
access : write-only


IMR0C0

Interrupt Mode Register 0 - Clear
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IMR0C0 IMR0C0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 0
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Mode Bit 0
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Mode Bit 0
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Mode Bit 0
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Mode Bit 0
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Mode Bit 0
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Mode Bit 0
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Mode Bit 0
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Mode Bit 0
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Mode Bit 0
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Mode Bit 0
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Mode Bit 0
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Mode Bit 0
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Mode Bit 0
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Mode Bit 0
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Mode Bit 0
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Mode Bit 0
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Mode Bit 0
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Mode Bit 0
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Mode Bit 0
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Mode Bit 0
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Mode Bit 0
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Mode Bit 0
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Mode Bit 0
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Mode Bit 0
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Mode Bit 0
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Mode Bit 0
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Mode Bit 0
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Mode Bit 0
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Mode Bit 0
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Mode Bit 0
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Mode Bit 0
bits : 31 - 31 (1 bit)
access : write-only


IMR0T0

Interrupt Mode Register 0 - Toggle
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IMR0T0 IMR0T0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 0
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Mode Bit 0
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Mode Bit 0
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Mode Bit 0
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Mode Bit 0
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Mode Bit 0
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Mode Bit 0
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Mode Bit 0
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Mode Bit 0
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Mode Bit 0
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Mode Bit 0
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Mode Bit 0
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Mode Bit 0
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Mode Bit 0
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Mode Bit 0
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Mode Bit 0
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Mode Bit 0
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Mode Bit 0
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Mode Bit 0
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Mode Bit 0
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Mode Bit 0
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Mode Bit 0
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Mode Bit 0
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Mode Bit 0
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Mode Bit 0
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Mode Bit 0
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Mode Bit 0
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Mode Bit 0
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Mode Bit 0
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Mode Bit 0
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Mode Bit 0
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Mode Bit 0
bits : 31 - 31 (1 bit)
access : write-only


IMR10

Interrupt Mode Register 1
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMR10 IMR10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 1
bits : 0 - 0 (1 bit)

P1 : Interrupt Mode Bit 1
bits : 1 - 1 (1 bit)

P2 : Interrupt Mode Bit 1
bits : 2 - 2 (1 bit)

P3 : Interrupt Mode Bit 1
bits : 3 - 3 (1 bit)

P4 : Interrupt Mode Bit 1
bits : 4 - 4 (1 bit)

P5 : Interrupt Mode Bit 1
bits : 5 - 5 (1 bit)

P6 : Interrupt Mode Bit 1
bits : 6 - 6 (1 bit)

P7 : Interrupt Mode Bit 1
bits : 7 - 7 (1 bit)

P8 : Interrupt Mode Bit 1
bits : 8 - 8 (1 bit)

P9 : Interrupt Mode Bit 1
bits : 9 - 9 (1 bit)

P10 : Interrupt Mode Bit 1
bits : 10 - 10 (1 bit)

P11 : Interrupt Mode Bit 1
bits : 11 - 11 (1 bit)

P12 : Interrupt Mode Bit 1
bits : 12 - 12 (1 bit)

P13 : Interrupt Mode Bit 1
bits : 13 - 13 (1 bit)

P14 : Interrupt Mode Bit 1
bits : 14 - 14 (1 bit)

P15 : Interrupt Mode Bit 1
bits : 15 - 15 (1 bit)

P16 : Interrupt Mode Bit 1
bits : 16 - 16 (1 bit)

P17 : Interrupt Mode Bit 1
bits : 17 - 17 (1 bit)

P18 : Interrupt Mode Bit 1
bits : 18 - 18 (1 bit)

P19 : Interrupt Mode Bit 1
bits : 19 - 19 (1 bit)

P20 : Interrupt Mode Bit 1
bits : 20 - 20 (1 bit)

P21 : Interrupt Mode Bit 1
bits : 21 - 21 (1 bit)

P22 : Interrupt Mode Bit 1
bits : 22 - 22 (1 bit)

P23 : Interrupt Mode Bit 1
bits : 23 - 23 (1 bit)

P24 : Interrupt Mode Bit 1
bits : 24 - 24 (1 bit)

P25 : Interrupt Mode Bit 1
bits : 25 - 25 (1 bit)

P26 : Interrupt Mode Bit 1
bits : 26 - 26 (1 bit)

P27 : Interrupt Mode Bit 1
bits : 27 - 27 (1 bit)

P28 : Interrupt Mode Bit 1
bits : 28 - 28 (1 bit)

P29 : Interrupt Mode Bit 1
bits : 29 - 29 (1 bit)

P30 : Interrupt Mode Bit 1
bits : 30 - 30 (1 bit)

P31 : Interrupt Mode Bit 1
bits : 31 - 31 (1 bit)


IMR1S0

Interrupt Mode Register 1 - Set
address_offset : 0x168 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IMR1S0 IMR1S0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 1
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Mode Bit 1
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Mode Bit 1
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Mode Bit 1
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Mode Bit 1
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Mode Bit 1
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Mode Bit 1
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Mode Bit 1
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Mode Bit 1
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Mode Bit 1
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Mode Bit 1
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Mode Bit 1
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Mode Bit 1
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Mode Bit 1
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Mode Bit 1
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Mode Bit 1
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Mode Bit 1
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Mode Bit 1
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Mode Bit 1
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Mode Bit 1
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Mode Bit 1
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Mode Bit 1
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Mode Bit 1
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Mode Bit 1
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Mode Bit 1
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Mode Bit 1
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Mode Bit 1
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Mode Bit 1
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Mode Bit 1
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Mode Bit 1
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Mode Bit 1
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Mode Bit 1
bits : 31 - 31 (1 bit)
access : write-only


IMR1C0

Interrupt Mode Register 1 - Clear
address_offset : 0x170 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IMR1C0 IMR1C0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 1
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Mode Bit 1
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Mode Bit 1
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Mode Bit 1
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Mode Bit 1
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Mode Bit 1
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Mode Bit 1
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Mode Bit 1
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Mode Bit 1
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Mode Bit 1
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Mode Bit 1
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Mode Bit 1
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Mode Bit 1
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Mode Bit 1
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Mode Bit 1
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Mode Bit 1
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Mode Bit 1
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Mode Bit 1
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Mode Bit 1
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Mode Bit 1
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Mode Bit 1
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Mode Bit 1
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Mode Bit 1
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Mode Bit 1
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Mode Bit 1
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Mode Bit 1
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Mode Bit 1
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Mode Bit 1
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Mode Bit 1
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Mode Bit 1
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Mode Bit 1
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Mode Bit 1
bits : 31 - 31 (1 bit)
access : write-only


IMR1T0

Interrupt Mode Register 1 - Toggle
address_offset : 0x178 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IMR1T0 IMR1T0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 1
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Mode Bit 1
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Mode Bit 1
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Mode Bit 1
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Mode Bit 1
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Mode Bit 1
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Mode Bit 1
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Mode Bit 1
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Mode Bit 1
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Mode Bit 1
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Mode Bit 1
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Mode Bit 1
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Mode Bit 1
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Mode Bit 1
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Mode Bit 1
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Mode Bit 1
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Mode Bit 1
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Mode Bit 1
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Mode Bit 1
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Mode Bit 1
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Mode Bit 1
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Mode Bit 1
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Mode Bit 1
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Mode Bit 1
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Mode Bit 1
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Mode Bit 1
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Mode Bit 1
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Mode Bit 1
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Mode Bit 1
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Mode Bit 1
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Mode Bit 1
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Mode Bit 1
bits : 31 - 31 (1 bit)
access : write-only


GPERT0

GPIO Enable Register - Toggle
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GPERT0 GPERT0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : GPIO Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : GPIO Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : GPIO Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : GPIO Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : GPIO Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : GPIO Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : GPIO Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : GPIO Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : GPIO Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : GPIO Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : GPIO Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : GPIO Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : GPIO Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : GPIO Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : GPIO Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : GPIO Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : GPIO Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : GPIO Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : GPIO Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : GPIO Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : GPIO Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : GPIO Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : GPIO Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : GPIO Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : GPIO Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : GPIO Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : GPIO Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : GPIO Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : GPIO Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : GPIO Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : GPIO Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : GPIO Enable
bits : 31 - 31 (1 bit)
access : write-only


GFER0

Glitch Filter Enable Register
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GFER0 GFER0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Glitch Filter Enable
bits : 0 - 0 (1 bit)

P1 : Glitch Filter Enable
bits : 1 - 1 (1 bit)

P2 : Glitch Filter Enable
bits : 2 - 2 (1 bit)

P3 : Glitch Filter Enable
bits : 3 - 3 (1 bit)

P4 : Glitch Filter Enable
bits : 4 - 4 (1 bit)

P5 : Glitch Filter Enable
bits : 5 - 5 (1 bit)

P6 : Glitch Filter Enable
bits : 6 - 6 (1 bit)

P7 : Glitch Filter Enable
bits : 7 - 7 (1 bit)

P8 : Glitch Filter Enable
bits : 8 - 8 (1 bit)

P9 : Glitch Filter Enable
bits : 9 - 9 (1 bit)

P10 : Glitch Filter Enable
bits : 10 - 10 (1 bit)

P11 : Glitch Filter Enable
bits : 11 - 11 (1 bit)

P12 : Glitch Filter Enable
bits : 12 - 12 (1 bit)

P13 : Glitch Filter Enable
bits : 13 - 13 (1 bit)

P14 : Glitch Filter Enable
bits : 14 - 14 (1 bit)

P15 : Glitch Filter Enable
bits : 15 - 15 (1 bit)

P16 : Glitch Filter Enable
bits : 16 - 16 (1 bit)

P17 : Glitch Filter Enable
bits : 17 - 17 (1 bit)

P18 : Glitch Filter Enable
bits : 18 - 18 (1 bit)

P19 : Glitch Filter Enable
bits : 19 - 19 (1 bit)

P20 : Glitch Filter Enable
bits : 20 - 20 (1 bit)

P21 : Glitch Filter Enable
bits : 21 - 21 (1 bit)

P22 : Glitch Filter Enable
bits : 22 - 22 (1 bit)

P23 : Glitch Filter Enable
bits : 23 - 23 (1 bit)

P24 : Glitch Filter Enable
bits : 24 - 24 (1 bit)

P25 : Glitch Filter Enable
bits : 25 - 25 (1 bit)

P26 : Glitch Filter Enable
bits : 26 - 26 (1 bit)

P27 : Glitch Filter Enable
bits : 27 - 27 (1 bit)

P28 : Glitch Filter Enable
bits : 28 - 28 (1 bit)

P29 : Glitch Filter Enable
bits : 29 - 29 (1 bit)

P30 : Glitch Filter Enable
bits : 30 - 30 (1 bit)

P31 : Glitch Filter Enable
bits : 31 - 31 (1 bit)


GFERS0

Glitch Filter Enable Register - Set
address_offset : 0x188 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GFERS0 GFERS0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Glitch Filter Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Glitch Filter Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Glitch Filter Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Glitch Filter Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Glitch Filter Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Glitch Filter Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Glitch Filter Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Glitch Filter Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Glitch Filter Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Glitch Filter Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Glitch Filter Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Glitch Filter Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Glitch Filter Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Glitch Filter Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Glitch Filter Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Glitch Filter Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Glitch Filter Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Glitch Filter Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Glitch Filter Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Glitch Filter Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Glitch Filter Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Glitch Filter Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Glitch Filter Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Glitch Filter Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Glitch Filter Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Glitch Filter Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Glitch Filter Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Glitch Filter Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Glitch Filter Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Glitch Filter Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Glitch Filter Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Glitch Filter Enable
bits : 31 - 31 (1 bit)
access : write-only


GFERC0

Glitch Filter Enable Register - Clear
address_offset : 0x190 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GFERC0 GFERC0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Glitch Filter Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Glitch Filter Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Glitch Filter Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Glitch Filter Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Glitch Filter Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Glitch Filter Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Glitch Filter Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Glitch Filter Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Glitch Filter Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Glitch Filter Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Glitch Filter Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Glitch Filter Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Glitch Filter Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Glitch Filter Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Glitch Filter Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Glitch Filter Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Glitch Filter Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Glitch Filter Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Glitch Filter Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Glitch Filter Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Glitch Filter Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Glitch Filter Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Glitch Filter Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Glitch Filter Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Glitch Filter Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Glitch Filter Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Glitch Filter Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Glitch Filter Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Glitch Filter Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Glitch Filter Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Glitch Filter Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Glitch Filter Enable
bits : 31 - 31 (1 bit)
access : write-only


GFERT0

Glitch Filter Enable Register - Toggle
address_offset : 0x198 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GFERT0 GFERT0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Glitch Filter Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Glitch Filter Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Glitch Filter Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Glitch Filter Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Glitch Filter Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Glitch Filter Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Glitch Filter Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Glitch Filter Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Glitch Filter Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Glitch Filter Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Glitch Filter Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Glitch Filter Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Glitch Filter Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Glitch Filter Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Glitch Filter Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Glitch Filter Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Glitch Filter Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Glitch Filter Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Glitch Filter Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Glitch Filter Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Glitch Filter Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Glitch Filter Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Glitch Filter Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Glitch Filter Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Glitch Filter Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Glitch Filter Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Glitch Filter Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Glitch Filter Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Glitch Filter Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Glitch Filter Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Glitch Filter Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Glitch Filter Enable
bits : 31 - 31 (1 bit)
access : write-only


IFR0

Interrupt Flag Register
address_offset : 0x1A0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IFR0 IFR0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Flag
bits : 0 - 0 (1 bit)
access : read-only

P1 : Interrupt Flag
bits : 1 - 1 (1 bit)
access : read-only

P2 : Interrupt Flag
bits : 2 - 2 (1 bit)
access : read-only

P3 : Interrupt Flag
bits : 3 - 3 (1 bit)
access : read-only

P4 : Interrupt Flag
bits : 4 - 4 (1 bit)
access : read-only

P5 : Interrupt Flag
bits : 5 - 5 (1 bit)
access : read-only

P6 : Interrupt Flag
bits : 6 - 6 (1 bit)
access : read-only

P7 : Interrupt Flag
bits : 7 - 7 (1 bit)
access : read-only

P8 : Interrupt Flag
bits : 8 - 8 (1 bit)
access : read-only

P9 : Interrupt Flag
bits : 9 - 9 (1 bit)
access : read-only

P10 : Interrupt Flag
bits : 10 - 10 (1 bit)
access : read-only

P11 : Interrupt Flag
bits : 11 - 11 (1 bit)
access : read-only

P12 : Interrupt Flag
bits : 12 - 12 (1 bit)
access : read-only

P13 : Interrupt Flag
bits : 13 - 13 (1 bit)
access : read-only

P14 : Interrupt Flag
bits : 14 - 14 (1 bit)
access : read-only

P15 : Interrupt Flag
bits : 15 - 15 (1 bit)
access : read-only

P16 : Interrupt Flag
bits : 16 - 16 (1 bit)
access : read-only

P17 : Interrupt Flag
bits : 17 - 17 (1 bit)
access : read-only

P18 : Interrupt Flag
bits : 18 - 18 (1 bit)
access : read-only

P19 : Interrupt Flag
bits : 19 - 19 (1 bit)
access : read-only

P20 : Interrupt Flag
bits : 20 - 20 (1 bit)
access : read-only

P21 : Interrupt Flag
bits : 21 - 21 (1 bit)
access : read-only

P22 : Interrupt Flag
bits : 22 - 22 (1 bit)
access : read-only

P23 : Interrupt Flag
bits : 23 - 23 (1 bit)
access : read-only

P24 : Interrupt Flag
bits : 24 - 24 (1 bit)
access : read-only

P25 : Interrupt Flag
bits : 25 - 25 (1 bit)
access : read-only

P26 : Interrupt Flag
bits : 26 - 26 (1 bit)
access : read-only

P27 : Interrupt Flag
bits : 27 - 27 (1 bit)
access : read-only

P28 : Interrupt Flag
bits : 28 - 28 (1 bit)
access : read-only

P29 : Interrupt Flag
bits : 29 - 29 (1 bit)
access : read-only

P30 : Interrupt Flag
bits : 30 - 30 (1 bit)
access : read-only

P31 : Interrupt Flag
bits : 31 - 31 (1 bit)
access : read-only


IFRC0

Interrupt Flag Register - Clear
address_offset : 0x1B0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IFRC0 IFRC0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Flag
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Flag
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Flag
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Flag
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Flag
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Flag
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Flag
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Flag
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Flag
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Flag
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Flag
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Flag
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Flag
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Flag
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Flag
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Flag
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Flag
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Flag
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Flag
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Flag
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Flag
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Flag
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Flag
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Flag
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Flag
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Flag
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Flag
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Flag
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Flag
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Flag
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Flag
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Flag
bits : 31 - 31 (1 bit)
access : write-only


ODMER0

Open Drain Mode Register
address_offset : 0x1C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODMER0 ODMER0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Open Drain Mode Enable
bits : 0 - 0 (1 bit)

P1 : Open Drain Mode Enable
bits : 1 - 1 (1 bit)

P2 : Open Drain Mode Enable
bits : 2 - 2 (1 bit)

P3 : Open Drain Mode Enable
bits : 3 - 3 (1 bit)

P4 : Open Drain Mode Enable
bits : 4 - 4 (1 bit)

P5 : Open Drain Mode Enable
bits : 5 - 5 (1 bit)

P6 : Open Drain Mode Enable
bits : 6 - 6 (1 bit)

P7 : Open Drain Mode Enable
bits : 7 - 7 (1 bit)

P8 : Open Drain Mode Enable
bits : 8 - 8 (1 bit)

P9 : Open Drain Mode Enable
bits : 9 - 9 (1 bit)

P10 : Open Drain Mode Enable
bits : 10 - 10 (1 bit)

P11 : Open Drain Mode Enable
bits : 11 - 11 (1 bit)

P12 : Open Drain Mode Enable
bits : 12 - 12 (1 bit)

P13 : Open Drain Mode Enable
bits : 13 - 13 (1 bit)

P14 : Open Drain Mode Enable
bits : 14 - 14 (1 bit)

P15 : Open Drain Mode Enable
bits : 15 - 15 (1 bit)

P16 : Open Drain Mode Enable
bits : 16 - 16 (1 bit)

P17 : Open Drain Mode Enable
bits : 17 - 17 (1 bit)

P18 : Open Drain Mode Enable
bits : 18 - 18 (1 bit)

P19 : Open Drain Mode Enable
bits : 19 - 19 (1 bit)

P20 : Open Drain Mode Enable
bits : 20 - 20 (1 bit)

P21 : Open Drain Mode Enable
bits : 21 - 21 (1 bit)

P22 : Open Drain Mode Enable
bits : 22 - 22 (1 bit)

P23 : Open Drain Mode Enable
bits : 23 - 23 (1 bit)

P24 : Open Drain Mode Enable
bits : 24 - 24 (1 bit)

P25 : Open Drain Mode Enable
bits : 25 - 25 (1 bit)

P26 : Open Drain Mode Enable
bits : 26 - 26 (1 bit)

P27 : Open Drain Mode Enable
bits : 27 - 27 (1 bit)

P28 : Open Drain Mode Enable
bits : 28 - 28 (1 bit)

P29 : Open Drain Mode Enable
bits : 29 - 29 (1 bit)

P30 : Open Drain Mode Enable
bits : 30 - 30 (1 bit)

P31 : Open Drain Mode Enable
bits : 31 - 31 (1 bit)


ODMERS0

Open Drain Mode Register - Set
address_offset : 0x1C8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ODMERS0 ODMERS0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Open Drain Mode Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Open Drain Mode Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Open Drain Mode Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Open Drain Mode Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Open Drain Mode Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Open Drain Mode Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Open Drain Mode Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Open Drain Mode Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Open Drain Mode Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Open Drain Mode Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Open Drain Mode Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Open Drain Mode Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Open Drain Mode Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Open Drain Mode Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Open Drain Mode Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Open Drain Mode Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Open Drain Mode Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Open Drain Mode Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Open Drain Mode Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Open Drain Mode Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Open Drain Mode Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Open Drain Mode Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Open Drain Mode Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Open Drain Mode Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Open Drain Mode Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Open Drain Mode Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Open Drain Mode Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Open Drain Mode Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Open Drain Mode Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Open Drain Mode Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Open Drain Mode Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Open Drain Mode Enable
bits : 31 - 31 (1 bit)
access : write-only


ODMERC0

Open Drain Mode Register - Clear
address_offset : 0x1D0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ODMERC0 ODMERC0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Open Drain Mode Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Open Drain Mode Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Open Drain Mode Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Open Drain Mode Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Open Drain Mode Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Open Drain Mode Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Open Drain Mode Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Open Drain Mode Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Open Drain Mode Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Open Drain Mode Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Open Drain Mode Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Open Drain Mode Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Open Drain Mode Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Open Drain Mode Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Open Drain Mode Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Open Drain Mode Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Open Drain Mode Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Open Drain Mode Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Open Drain Mode Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Open Drain Mode Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Open Drain Mode Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Open Drain Mode Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Open Drain Mode Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Open Drain Mode Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Open Drain Mode Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Open Drain Mode Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Open Drain Mode Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Open Drain Mode Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Open Drain Mode Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Open Drain Mode Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Open Drain Mode Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Open Drain Mode Enable
bits : 31 - 31 (1 bit)
access : write-only


ODMERT0

Open Drain Mode Register - Toggle
address_offset : 0x1D8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ODMERT0 ODMERT0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Open Drain Mode Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Open Drain Mode Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Open Drain Mode Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Open Drain Mode Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Open Drain Mode Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Open Drain Mode Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Open Drain Mode Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Open Drain Mode Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Open Drain Mode Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Open Drain Mode Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Open Drain Mode Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Open Drain Mode Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Open Drain Mode Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Open Drain Mode Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Open Drain Mode Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Open Drain Mode Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Open Drain Mode Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Open Drain Mode Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Open Drain Mode Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Open Drain Mode Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Open Drain Mode Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Open Drain Mode Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Open Drain Mode Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Open Drain Mode Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Open Drain Mode Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Open Drain Mode Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Open Drain Mode Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Open Drain Mode Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Open Drain Mode Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Open Drain Mode Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Open Drain Mode Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Open Drain Mode Enable
bits : 31 - 31 (1 bit)
access : write-only


PMR00

Peripheral Mux Register 0
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMR00 PMR00 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 0
bits : 0 - 0 (1 bit)

P1 : Peripheral Multiplexer Select bit 0
bits : 1 - 1 (1 bit)

P2 : Peripheral Multiplexer Select bit 0
bits : 2 - 2 (1 bit)

P3 : Peripheral Multiplexer Select bit 0
bits : 3 - 3 (1 bit)

P4 : Peripheral Multiplexer Select bit 0
bits : 4 - 4 (1 bit)

P5 : Peripheral Multiplexer Select bit 0
bits : 5 - 5 (1 bit)

P6 : Peripheral Multiplexer Select bit 0
bits : 6 - 6 (1 bit)

P7 : Peripheral Multiplexer Select bit 0
bits : 7 - 7 (1 bit)

P8 : Peripheral Multiplexer Select bit 0
bits : 8 - 8 (1 bit)

P9 : Peripheral Multiplexer Select bit 0
bits : 9 - 9 (1 bit)

P10 : Peripheral Multiplexer Select bit 0
bits : 10 - 10 (1 bit)

P11 : Peripheral Multiplexer Select bit 0
bits : 11 - 11 (1 bit)

P12 : Peripheral Multiplexer Select bit 0
bits : 12 - 12 (1 bit)

P13 : Peripheral Multiplexer Select bit 0
bits : 13 - 13 (1 bit)

P14 : Peripheral Multiplexer Select bit 0
bits : 14 - 14 (1 bit)

P15 : Peripheral Multiplexer Select bit 0
bits : 15 - 15 (1 bit)

P16 : Peripheral Multiplexer Select bit 0
bits : 16 - 16 (1 bit)

P17 : Peripheral Multiplexer Select bit 0
bits : 17 - 17 (1 bit)

P18 : Peripheral Multiplexer Select bit 0
bits : 18 - 18 (1 bit)

P19 : Peripheral Multiplexer Select bit 0
bits : 19 - 19 (1 bit)

P20 : Peripheral Multiplexer Select bit 0
bits : 20 - 20 (1 bit)

P21 : Peripheral Multiplexer Select bit 0
bits : 21 - 21 (1 bit)

P22 : Peripheral Multiplexer Select bit 0
bits : 22 - 22 (1 bit)

P23 : Peripheral Multiplexer Select bit 0
bits : 23 - 23 (1 bit)

P24 : Peripheral Multiplexer Select bit 0
bits : 24 - 24 (1 bit)

P25 : Peripheral Multiplexer Select bit 0
bits : 25 - 25 (1 bit)

P26 : Peripheral Multiplexer Select bit 0
bits : 26 - 26 (1 bit)

P27 : Peripheral Multiplexer Select bit 0
bits : 27 - 27 (1 bit)

P28 : Peripheral Multiplexer Select bit 0
bits : 28 - 28 (1 bit)

P29 : Peripheral Multiplexer Select bit 0
bits : 29 - 29 (1 bit)

P30 : Peripheral Multiplexer Select bit 0
bits : 30 - 30 (1 bit)

P31 : Peripheral Multiplexer Select bit 0
bits : 31 - 31 (1 bit)


GPER1

GPIO Enable Register
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPER1 GPER1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : GPIO Enable
bits : 0 - 0 (1 bit)

P1 : GPIO Enable
bits : 1 - 1 (1 bit)

P2 : GPIO Enable
bits : 2 - 2 (1 bit)

P3 : GPIO Enable
bits : 3 - 3 (1 bit)

P4 : GPIO Enable
bits : 4 - 4 (1 bit)

P5 : GPIO Enable
bits : 5 - 5 (1 bit)

P6 : GPIO Enable
bits : 6 - 6 (1 bit)

P7 : GPIO Enable
bits : 7 - 7 (1 bit)

P8 : GPIO Enable
bits : 8 - 8 (1 bit)

P9 : GPIO Enable
bits : 9 - 9 (1 bit)

P10 : GPIO Enable
bits : 10 - 10 (1 bit)

P11 : GPIO Enable
bits : 11 - 11 (1 bit)

P12 : GPIO Enable
bits : 12 - 12 (1 bit)

P13 : GPIO Enable
bits : 13 - 13 (1 bit)

P14 : GPIO Enable
bits : 14 - 14 (1 bit)

P15 : GPIO Enable
bits : 15 - 15 (1 bit)

P16 : GPIO Enable
bits : 16 - 16 (1 bit)

P17 : GPIO Enable
bits : 17 - 17 (1 bit)

P18 : GPIO Enable
bits : 18 - 18 (1 bit)

P19 : GPIO Enable
bits : 19 - 19 (1 bit)

P20 : GPIO Enable
bits : 20 - 20 (1 bit)

P21 : GPIO Enable
bits : 21 - 21 (1 bit)

P22 : GPIO Enable
bits : 22 - 22 (1 bit)

P23 : GPIO Enable
bits : 23 - 23 (1 bit)

P24 : GPIO Enable
bits : 24 - 24 (1 bit)

P25 : GPIO Enable
bits : 25 - 25 (1 bit)

P26 : GPIO Enable
bits : 26 - 26 (1 bit)

P27 : GPIO Enable
bits : 27 - 27 (1 bit)

P28 : GPIO Enable
bits : 28 - 28 (1 bit)

P29 : GPIO Enable
bits : 29 - 29 (1 bit)

P30 : GPIO Enable
bits : 30 - 30 (1 bit)

P31 : GPIO Enable
bits : 31 - 31 (1 bit)


ODCR00

Output Driving Capability Register 0
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR00 ODCR00 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 0
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 0
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 0
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 0
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 0
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 0
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 0
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 0
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 0
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 0
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 0
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 0
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 0
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 0
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 0
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 0
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 0
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 0
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 0
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 0
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 0
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 0
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 0
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 0
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 0
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 0
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 0
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 0
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 0
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 0
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 0
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 0
bits : 31 - 31 (1 bit)


ODCR0S0

Output Driving Capability Register 0 - Set
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR0S0 ODCR0S0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 0
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 0
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 0
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 0
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 0
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 0
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 0
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 0
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 0
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 0
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 0
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 0
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 0
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 0
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 0
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 0
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 0
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 0
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 0
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 0
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 0
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 0
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 0
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 0
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 0
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 0
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 0
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 0
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 0
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 0
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 0
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 0
bits : 31 - 31 (1 bit)


GPERS1

GPIO Enable Register - Set
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GPERS1 GPERS1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : GPIO Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : GPIO Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : GPIO Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : GPIO Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : GPIO Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : GPIO Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : GPIO Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : GPIO Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : GPIO Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : GPIO Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : GPIO Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : GPIO Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : GPIO Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : GPIO Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : GPIO Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : GPIO Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : GPIO Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : GPIO Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : GPIO Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : GPIO Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : GPIO Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : GPIO Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : GPIO Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : GPIO Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : GPIO Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : GPIO Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : GPIO Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : GPIO Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : GPIO Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : GPIO Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : GPIO Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : GPIO Enable
bits : 31 - 31 (1 bit)
access : write-only


ODCR0C0

Output Driving Capability Register 0 - Clear
address_offset : 0x210 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR0C0 ODCR0C0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 0
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 0
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 0
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 0
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 0
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 0
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 0
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 0
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 0
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 0
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 0
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 0
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 0
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 0
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 0
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 0
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 0
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 0
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 0
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 0
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 0
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 0
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 0
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 0
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 0
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 0
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 0
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 0
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 0
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 0
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 0
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 0
bits : 31 - 31 (1 bit)


GPERC1

GPIO Enable Register - Clear
address_offset : 0x218 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GPERC1 GPERC1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : GPIO Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : GPIO Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : GPIO Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : GPIO Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : GPIO Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : GPIO Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : GPIO Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : GPIO Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : GPIO Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : GPIO Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : GPIO Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : GPIO Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : GPIO Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : GPIO Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : GPIO Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : GPIO Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : GPIO Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : GPIO Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : GPIO Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : GPIO Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : GPIO Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : GPIO Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : GPIO Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : GPIO Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : GPIO Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : GPIO Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : GPIO Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : GPIO Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : GPIO Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : GPIO Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : GPIO Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : GPIO Enable
bits : 31 - 31 (1 bit)
access : write-only


ODCR0T0

Output Driving Capability Register 0 - Toggle
address_offset : 0x218 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR0T0 ODCR0T0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 0
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 0
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 0
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 0
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 0
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 0
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 0
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 0
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 0
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 0
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 0
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 0
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 0
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 0
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 0
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 0
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 0
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 0
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 0
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 0
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 0
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 0
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 0
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 0
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 0
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 0
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 0
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 0
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 0
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 0
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 0
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 0
bits : 31 - 31 (1 bit)


ODCR10

Output Driving Capability Register 1
address_offset : 0x220 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR10 ODCR10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 1
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 1
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 1
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 1
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 1
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 1
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 1
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 1
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 1
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 1
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 1
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 1
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 1
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 1
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 1
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 1
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 1
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 1
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 1
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 1
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 1
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 1
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 1
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 1
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 1
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 1
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 1
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 1
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 1
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 1
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 1
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 1
bits : 31 - 31 (1 bit)


GPERT1

GPIO Enable Register - Toggle
address_offset : 0x224 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GPERT1 GPERT1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : GPIO Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : GPIO Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : GPIO Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : GPIO Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : GPIO Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : GPIO Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : GPIO Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : GPIO Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : GPIO Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : GPIO Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : GPIO Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : GPIO Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : GPIO Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : GPIO Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : GPIO Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : GPIO Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : GPIO Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : GPIO Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : GPIO Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : GPIO Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : GPIO Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : GPIO Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : GPIO Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : GPIO Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : GPIO Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : GPIO Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : GPIO Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : GPIO Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : GPIO Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : GPIO Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : GPIO Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : GPIO Enable
bits : 31 - 31 (1 bit)
access : write-only


ODCR1S0

Output Driving Capability Register 1 - Set
address_offset : 0x228 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR1S0 ODCR1S0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 1
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 1
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 1
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 1
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 1
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 1
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 1
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 1
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 1
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 1
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 1
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 1
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 1
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 1
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 1
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 1
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 1
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 1
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 1
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 1
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 1
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 1
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 1
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 1
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 1
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 1
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 1
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 1
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 1
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 1
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 1
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 1
bits : 31 - 31 (1 bit)


ODCR1C0

Output Driving Capability Register 1 - Clear
address_offset : 0x230 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR1C0 ODCR1C0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 1
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 1
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 1
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 1
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 1
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 1
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 1
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 1
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 1
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 1
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 1
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 1
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 1
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 1
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 1
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 1
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 1
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 1
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 1
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 1
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 1
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 1
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 1
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 1
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 1
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 1
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 1
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 1
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 1
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 1
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 1
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 1
bits : 31 - 31 (1 bit)


PMR01

Peripheral Mux Register 0
address_offset : 0x230 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMR01 PMR01 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 0
bits : 0 - 0 (1 bit)

P1 : Peripheral Multiplexer Select bit 0
bits : 1 - 1 (1 bit)

P2 : Peripheral Multiplexer Select bit 0
bits : 2 - 2 (1 bit)

P3 : Peripheral Multiplexer Select bit 0
bits : 3 - 3 (1 bit)

P4 : Peripheral Multiplexer Select bit 0
bits : 4 - 4 (1 bit)

P5 : Peripheral Multiplexer Select bit 0
bits : 5 - 5 (1 bit)

P6 : Peripheral Multiplexer Select bit 0
bits : 6 - 6 (1 bit)

P7 : Peripheral Multiplexer Select bit 0
bits : 7 - 7 (1 bit)

P8 : Peripheral Multiplexer Select bit 0
bits : 8 - 8 (1 bit)

P9 : Peripheral Multiplexer Select bit 0
bits : 9 - 9 (1 bit)

P10 : Peripheral Multiplexer Select bit 0
bits : 10 - 10 (1 bit)

P11 : Peripheral Multiplexer Select bit 0
bits : 11 - 11 (1 bit)

P12 : Peripheral Multiplexer Select bit 0
bits : 12 - 12 (1 bit)

P13 : Peripheral Multiplexer Select bit 0
bits : 13 - 13 (1 bit)

P14 : Peripheral Multiplexer Select bit 0
bits : 14 - 14 (1 bit)

P15 : Peripheral Multiplexer Select bit 0
bits : 15 - 15 (1 bit)

P16 : Peripheral Multiplexer Select bit 0
bits : 16 - 16 (1 bit)

P17 : Peripheral Multiplexer Select bit 0
bits : 17 - 17 (1 bit)

P18 : Peripheral Multiplexer Select bit 0
bits : 18 - 18 (1 bit)

P19 : Peripheral Multiplexer Select bit 0
bits : 19 - 19 (1 bit)

P20 : Peripheral Multiplexer Select bit 0
bits : 20 - 20 (1 bit)

P21 : Peripheral Multiplexer Select bit 0
bits : 21 - 21 (1 bit)

P22 : Peripheral Multiplexer Select bit 0
bits : 22 - 22 (1 bit)

P23 : Peripheral Multiplexer Select bit 0
bits : 23 - 23 (1 bit)

P24 : Peripheral Multiplexer Select bit 0
bits : 24 - 24 (1 bit)

P25 : Peripheral Multiplexer Select bit 0
bits : 25 - 25 (1 bit)

P26 : Peripheral Multiplexer Select bit 0
bits : 26 - 26 (1 bit)

P27 : Peripheral Multiplexer Select bit 0
bits : 27 - 27 (1 bit)

P28 : Peripheral Multiplexer Select bit 0
bits : 28 - 28 (1 bit)

P29 : Peripheral Multiplexer Select bit 0
bits : 29 - 29 (1 bit)

P30 : Peripheral Multiplexer Select bit 0
bits : 30 - 30 (1 bit)

P31 : Peripheral Multiplexer Select bit 0
bits : 31 - 31 (1 bit)


ODCR1T0

Output Driving Capability Register 1 - Toggle
address_offset : 0x238 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR1T0 ODCR1T0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 1
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 1
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 1
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 1
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 1
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 1
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 1
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 1
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 1
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 1
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 1
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 1
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 1
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 1
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 1
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 1
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 1
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 1
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 1
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 1
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 1
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 1
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 1
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 1
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 1
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 1
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 1
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 1
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 1
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 1
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 1
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 1
bits : 31 - 31 (1 bit)


PMR0S1

Peripheral Mux Register 0 - Set
address_offset : 0x23C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR0S1 PMR0S1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 0
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 0
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 0
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 0
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 0
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 0
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 0
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 0
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 0
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 0
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 0
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 0
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 0
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 0
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 0
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 0
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 0
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 0
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 0
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 0
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 0
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 0
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 0
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 0
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 0
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 0
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 0
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 0
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 0
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 0
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 0
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 0
bits : 31 - 31 (1 bit)
access : write-only


PMR0C1

Peripheral Mux Register 0 - Clear
address_offset : 0x248 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR0C1 PMR0C1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 0
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 0
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 0
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 0
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 0
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 0
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 0
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 0
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 0
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 0
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 0
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 0
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 0
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 0
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 0
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 0
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 0
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 0
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 0
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 0
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 0
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 0
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 0
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 0
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 0
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 0
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 0
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 0
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 0
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 0
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 0
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 0
bits : 31 - 31 (1 bit)
access : write-only


PMR0T1

Peripheral Mux Register 0 - Toggle
address_offset : 0x254 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR0T1 PMR0T1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 0
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 0
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 0
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 0
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 0
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 0
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 0
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 0
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 0
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 0
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 0
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 0
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 0
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 0
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 0
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 0
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 0
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 0
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 0
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 0
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 0
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 0
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 0
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 0
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 0
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 0
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 0
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 0
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 0
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 0
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 0
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 0
bits : 31 - 31 (1 bit)
access : write-only


OSRR00

Output Slew Rate Register 0
address_offset : 0x260 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSRR00 OSRR00 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Slew Rate Control Enable
bits : 0 - 0 (1 bit)

P1 : Output Slew Rate Control Enable
bits : 1 - 1 (1 bit)

P2 : Output Slew Rate Control Enable
bits : 2 - 2 (1 bit)

P3 : Output Slew Rate Control Enable
bits : 3 - 3 (1 bit)

P4 : Output Slew Rate Control Enable
bits : 4 - 4 (1 bit)

P5 : Output Slew Rate Control Enable
bits : 5 - 5 (1 bit)

P6 : Output Slew Rate Control Enable
bits : 6 - 6 (1 bit)

P7 : Output Slew Rate Control Enable
bits : 7 - 7 (1 bit)

P8 : Output Slew Rate Control Enable
bits : 8 - 8 (1 bit)

P9 : Output Slew Rate Control Enable
bits : 9 - 9 (1 bit)

P10 : Output Slew Rate Control Enable
bits : 10 - 10 (1 bit)

P11 : Output Slew Rate Control Enable
bits : 11 - 11 (1 bit)

P12 : Output Slew Rate Control Enable
bits : 12 - 12 (1 bit)

P13 : Output Slew Rate Control Enable
bits : 13 - 13 (1 bit)

P14 : Output Slew Rate Control Enable
bits : 14 - 14 (1 bit)

P15 : Output Slew Rate Control Enable
bits : 15 - 15 (1 bit)

P16 : Output Slew Rate Control Enable
bits : 16 - 16 (1 bit)

P17 : Output Slew Rate Control Enable
bits : 17 - 17 (1 bit)

P18 : Output Slew Rate Control Enable
bits : 18 - 18 (1 bit)

P19 : Output Slew Rate Control Enable
bits : 19 - 19 (1 bit)

P20 : Output Slew Rate Control Enable
bits : 20 - 20 (1 bit)

P21 : Output Slew Rate Control Enable
bits : 21 - 21 (1 bit)

P22 : Output Slew Rate Control Enable
bits : 22 - 22 (1 bit)

P23 : Output Slew Rate Control Enable
bits : 23 - 23 (1 bit)

P24 : Output Slew Rate Control Enable
bits : 24 - 24 (1 bit)

P25 : Output Slew Rate Control Enable
bits : 25 - 25 (1 bit)

P26 : Output Slew Rate Control Enable
bits : 26 - 26 (1 bit)

P27 : Output Slew Rate Control Enable
bits : 27 - 27 (1 bit)

P28 : Output Slew Rate Control Enable
bits : 28 - 28 (1 bit)

P29 : Output Slew Rate Control Enable
bits : 29 - 29 (1 bit)

P30 : Output Slew Rate Control Enable
bits : 30 - 30 (1 bit)

P31 : Output Slew Rate Control Enable
bits : 31 - 31 (1 bit)


PMR11

Peripheral Mux Register 1
address_offset : 0x260 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMR11 PMR11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 1
bits : 0 - 0 (1 bit)

P1 : Peripheral Multiplexer Select bit 1
bits : 1 - 1 (1 bit)

P2 : Peripheral Multiplexer Select bit 1
bits : 2 - 2 (1 bit)

P3 : Peripheral Multiplexer Select bit 1
bits : 3 - 3 (1 bit)

P4 : Peripheral Multiplexer Select bit 1
bits : 4 - 4 (1 bit)

P5 : Peripheral Multiplexer Select bit 1
bits : 5 - 5 (1 bit)

P6 : Peripheral Multiplexer Select bit 1
bits : 6 - 6 (1 bit)

P7 : Peripheral Multiplexer Select bit 1
bits : 7 - 7 (1 bit)

P8 : Peripheral Multiplexer Select bit 1
bits : 8 - 8 (1 bit)

P9 : Peripheral Multiplexer Select bit 1
bits : 9 - 9 (1 bit)

P10 : Peripheral Multiplexer Select bit 1
bits : 10 - 10 (1 bit)

P11 : Peripheral Multiplexer Select bit 1
bits : 11 - 11 (1 bit)

P12 : Peripheral Multiplexer Select bit 1
bits : 12 - 12 (1 bit)

P13 : Peripheral Multiplexer Select bit 1
bits : 13 - 13 (1 bit)

P14 : Peripheral Multiplexer Select bit 1
bits : 14 - 14 (1 bit)

P15 : Peripheral Multiplexer Select bit 1
bits : 15 - 15 (1 bit)

P16 : Peripheral Multiplexer Select bit 1
bits : 16 - 16 (1 bit)

P17 : Peripheral Multiplexer Select bit 1
bits : 17 - 17 (1 bit)

P18 : Peripheral Multiplexer Select bit 1
bits : 18 - 18 (1 bit)

P19 : Peripheral Multiplexer Select bit 1
bits : 19 - 19 (1 bit)

P20 : Peripheral Multiplexer Select bit 1
bits : 20 - 20 (1 bit)

P21 : Peripheral Multiplexer Select bit 1
bits : 21 - 21 (1 bit)

P22 : Peripheral Multiplexer Select bit 1
bits : 22 - 22 (1 bit)

P23 : Peripheral Multiplexer Select bit 1
bits : 23 - 23 (1 bit)

P24 : Peripheral Multiplexer Select bit 1
bits : 24 - 24 (1 bit)

P25 : Peripheral Multiplexer Select bit 1
bits : 25 - 25 (1 bit)

P26 : Peripheral Multiplexer Select bit 1
bits : 26 - 26 (1 bit)

P27 : Peripheral Multiplexer Select bit 1
bits : 27 - 27 (1 bit)

P28 : Peripheral Multiplexer Select bit 1
bits : 28 - 28 (1 bit)

P29 : Peripheral Multiplexer Select bit 1
bits : 29 - 29 (1 bit)

P30 : Peripheral Multiplexer Select bit 1
bits : 30 - 30 (1 bit)

P31 : Peripheral Multiplexer Select bit 1
bits : 31 - 31 (1 bit)


OSRR0S0

Output Slew Rate Register 0 - Set
address_offset : 0x268 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSRR0S0 OSRR0S0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Slew Rate Control Enable
bits : 0 - 0 (1 bit)

P1 : Output Slew Rate Control Enable
bits : 1 - 1 (1 bit)

P2 : Output Slew Rate Control Enable
bits : 2 - 2 (1 bit)

P3 : Output Slew Rate Control Enable
bits : 3 - 3 (1 bit)

P4 : Output Slew Rate Control Enable
bits : 4 - 4 (1 bit)

P5 : Output Slew Rate Control Enable
bits : 5 - 5 (1 bit)

P6 : Output Slew Rate Control Enable
bits : 6 - 6 (1 bit)

P7 : Output Slew Rate Control Enable
bits : 7 - 7 (1 bit)

P8 : Output Slew Rate Control Enable
bits : 8 - 8 (1 bit)

P9 : Output Slew Rate Control Enable
bits : 9 - 9 (1 bit)

P10 : Output Slew Rate Control Enable
bits : 10 - 10 (1 bit)

P11 : Output Slew Rate Control Enable
bits : 11 - 11 (1 bit)

P12 : Output Slew Rate Control Enable
bits : 12 - 12 (1 bit)

P13 : Output Slew Rate Control Enable
bits : 13 - 13 (1 bit)

P14 : Output Slew Rate Control Enable
bits : 14 - 14 (1 bit)

P15 : Output Slew Rate Control Enable
bits : 15 - 15 (1 bit)

P16 : Output Slew Rate Control Enable
bits : 16 - 16 (1 bit)

P17 : Output Slew Rate Control Enable
bits : 17 - 17 (1 bit)

P18 : Output Slew Rate Control Enable
bits : 18 - 18 (1 bit)

P19 : Output Slew Rate Control Enable
bits : 19 - 19 (1 bit)

P20 : Output Slew Rate Control Enable
bits : 20 - 20 (1 bit)

P21 : Output Slew Rate Control Enable
bits : 21 - 21 (1 bit)

P22 : Output Slew Rate Control Enable
bits : 22 - 22 (1 bit)

P23 : Output Slew Rate Control Enable
bits : 23 - 23 (1 bit)

P24 : Output Slew Rate Control Enable
bits : 24 - 24 (1 bit)

P25 : Output Slew Rate Control Enable
bits : 25 - 25 (1 bit)

P26 : Output Slew Rate Control Enable
bits : 26 - 26 (1 bit)

P27 : Output Slew Rate Control Enable
bits : 27 - 27 (1 bit)

P28 : Output Slew Rate Control Enable
bits : 28 - 28 (1 bit)

P29 : Output Slew Rate Control Enable
bits : 29 - 29 (1 bit)

P30 : Output Slew Rate Control Enable
bits : 30 - 30 (1 bit)

P31 : Output Slew Rate Control Enable
bits : 31 - 31 (1 bit)


PMR1S1

Peripheral Mux Register 1 - Set
address_offset : 0x26C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR1S1 PMR1S1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 1
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 1
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 1
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 1
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 1
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 1
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 1
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 1
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 1
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 1
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 1
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 1
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 1
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 1
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 1
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 1
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 1
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 1
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 1
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 1
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 1
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 1
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 1
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 1
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 1
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 1
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 1
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 1
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 1
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 1
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 1
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 1
bits : 31 - 31 (1 bit)
access : write-only


OSRR0C0

Output Slew Rate Register 0 - Clear
address_offset : 0x270 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSRR0C0 OSRR0C0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Slew Rate Control Enable
bits : 0 - 0 (1 bit)

P1 : Output Slew Rate Control Enable
bits : 1 - 1 (1 bit)

P2 : Output Slew Rate Control Enable
bits : 2 - 2 (1 bit)

P3 : Output Slew Rate Control Enable
bits : 3 - 3 (1 bit)

P4 : Output Slew Rate Control Enable
bits : 4 - 4 (1 bit)

P5 : Output Slew Rate Control Enable
bits : 5 - 5 (1 bit)

P6 : Output Slew Rate Control Enable
bits : 6 - 6 (1 bit)

P7 : Output Slew Rate Control Enable
bits : 7 - 7 (1 bit)

P8 : Output Slew Rate Control Enable
bits : 8 - 8 (1 bit)

P9 : Output Slew Rate Control Enable
bits : 9 - 9 (1 bit)

P10 : Output Slew Rate Control Enable
bits : 10 - 10 (1 bit)

P11 : Output Slew Rate Control Enable
bits : 11 - 11 (1 bit)

P12 : Output Slew Rate Control Enable
bits : 12 - 12 (1 bit)

P13 : Output Slew Rate Control Enable
bits : 13 - 13 (1 bit)

P14 : Output Slew Rate Control Enable
bits : 14 - 14 (1 bit)

P15 : Output Slew Rate Control Enable
bits : 15 - 15 (1 bit)

P16 : Output Slew Rate Control Enable
bits : 16 - 16 (1 bit)

P17 : Output Slew Rate Control Enable
bits : 17 - 17 (1 bit)

P18 : Output Slew Rate Control Enable
bits : 18 - 18 (1 bit)

P19 : Output Slew Rate Control Enable
bits : 19 - 19 (1 bit)

P20 : Output Slew Rate Control Enable
bits : 20 - 20 (1 bit)

P21 : Output Slew Rate Control Enable
bits : 21 - 21 (1 bit)

P22 : Output Slew Rate Control Enable
bits : 22 - 22 (1 bit)

P23 : Output Slew Rate Control Enable
bits : 23 - 23 (1 bit)

P24 : Output Slew Rate Control Enable
bits : 24 - 24 (1 bit)

P25 : Output Slew Rate Control Enable
bits : 25 - 25 (1 bit)

P26 : Output Slew Rate Control Enable
bits : 26 - 26 (1 bit)

P27 : Output Slew Rate Control Enable
bits : 27 - 27 (1 bit)

P28 : Output Slew Rate Control Enable
bits : 28 - 28 (1 bit)

P29 : Output Slew Rate Control Enable
bits : 29 - 29 (1 bit)

P30 : Output Slew Rate Control Enable
bits : 30 - 30 (1 bit)

P31 : Output Slew Rate Control Enable
bits : 31 - 31 (1 bit)


OSRR0T0

Output Slew Rate Register 0 - Toggle
address_offset : 0x278 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSRR0T0 OSRR0T0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Slew Rate Control Enable
bits : 0 - 0 (1 bit)

P1 : Output Slew Rate Control Enable
bits : 1 - 1 (1 bit)

P2 : Output Slew Rate Control Enable
bits : 2 - 2 (1 bit)

P3 : Output Slew Rate Control Enable
bits : 3 - 3 (1 bit)

P4 : Output Slew Rate Control Enable
bits : 4 - 4 (1 bit)

P5 : Output Slew Rate Control Enable
bits : 5 - 5 (1 bit)

P6 : Output Slew Rate Control Enable
bits : 6 - 6 (1 bit)

P7 : Output Slew Rate Control Enable
bits : 7 - 7 (1 bit)

P8 : Output Slew Rate Control Enable
bits : 8 - 8 (1 bit)

P9 : Output Slew Rate Control Enable
bits : 9 - 9 (1 bit)

P10 : Output Slew Rate Control Enable
bits : 10 - 10 (1 bit)

P11 : Output Slew Rate Control Enable
bits : 11 - 11 (1 bit)

P12 : Output Slew Rate Control Enable
bits : 12 - 12 (1 bit)

P13 : Output Slew Rate Control Enable
bits : 13 - 13 (1 bit)

P14 : Output Slew Rate Control Enable
bits : 14 - 14 (1 bit)

P15 : Output Slew Rate Control Enable
bits : 15 - 15 (1 bit)

P16 : Output Slew Rate Control Enable
bits : 16 - 16 (1 bit)

P17 : Output Slew Rate Control Enable
bits : 17 - 17 (1 bit)

P18 : Output Slew Rate Control Enable
bits : 18 - 18 (1 bit)

P19 : Output Slew Rate Control Enable
bits : 19 - 19 (1 bit)

P20 : Output Slew Rate Control Enable
bits : 20 - 20 (1 bit)

P21 : Output Slew Rate Control Enable
bits : 21 - 21 (1 bit)

P22 : Output Slew Rate Control Enable
bits : 22 - 22 (1 bit)

P23 : Output Slew Rate Control Enable
bits : 23 - 23 (1 bit)

P24 : Output Slew Rate Control Enable
bits : 24 - 24 (1 bit)

P25 : Output Slew Rate Control Enable
bits : 25 - 25 (1 bit)

P26 : Output Slew Rate Control Enable
bits : 26 - 26 (1 bit)

P27 : Output Slew Rate Control Enable
bits : 27 - 27 (1 bit)

P28 : Output Slew Rate Control Enable
bits : 28 - 28 (1 bit)

P29 : Output Slew Rate Control Enable
bits : 29 - 29 (1 bit)

P30 : Output Slew Rate Control Enable
bits : 30 - 30 (1 bit)

P31 : Output Slew Rate Control Enable
bits : 31 - 31 (1 bit)


PMR1C1

Peripheral Mux Register 1 - Clear
address_offset : 0x278 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR1C1 PMR1C1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 1
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 1
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 1
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 1
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 1
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 1
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 1
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 1
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 1
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 1
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 1
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 1
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 1
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 1
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 1
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 1
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 1
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 1
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 1
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 1
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 1
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 1
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 1
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 1
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 1
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 1
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 1
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 1
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 1
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 1
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 1
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 1
bits : 31 - 31 (1 bit)
access : write-only


PMR0S0

Peripheral Mux Register 0 - Set
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR0S0 PMR0S0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 0
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 0
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 0
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 0
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 0
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 0
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 0
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 0
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 0
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 0
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 0
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 0
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 0
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 0
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 0
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 0
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 0
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 0
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 0
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 0
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 0
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 0
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 0
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 0
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 0
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 0
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 0
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 0
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 0
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 0
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 0
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 0
bits : 31 - 31 (1 bit)
access : write-only


PMR1T1

Peripheral Mux Register 1 - Toggle
address_offset : 0x284 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR1T1 PMR1T1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 1
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 1
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 1
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 1
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 1
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 1
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 1
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 1
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 1
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 1
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 1
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 1
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 1
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 1
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 1
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 1
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 1
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 1
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 1
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 1
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 1
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 1
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 1
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 1
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 1
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 1
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 1
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 1
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 1
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 1
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 1
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 1
bits : 31 - 31 (1 bit)
access : write-only


PMR21

Peripheral Mux Register 2
address_offset : 0x290 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMR21 PMR21 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 2
bits : 0 - 0 (1 bit)

P1 : Peripheral Multiplexer Select bit 2
bits : 1 - 1 (1 bit)

P2 : Peripheral Multiplexer Select bit 2
bits : 2 - 2 (1 bit)

P3 : Peripheral Multiplexer Select bit 2
bits : 3 - 3 (1 bit)

P4 : Peripheral Multiplexer Select bit 2
bits : 4 - 4 (1 bit)

P5 : Peripheral Multiplexer Select bit 2
bits : 5 - 5 (1 bit)

P6 : Peripheral Multiplexer Select bit 2
bits : 6 - 6 (1 bit)

P7 : Peripheral Multiplexer Select bit 2
bits : 7 - 7 (1 bit)

P8 : Peripheral Multiplexer Select bit 2
bits : 8 - 8 (1 bit)

P9 : Peripheral Multiplexer Select bit 2
bits : 9 - 9 (1 bit)

P10 : Peripheral Multiplexer Select bit 2
bits : 10 - 10 (1 bit)

P11 : Peripheral Multiplexer Select bit 2
bits : 11 - 11 (1 bit)

P12 : Peripheral Multiplexer Select bit 2
bits : 12 - 12 (1 bit)

P13 : Peripheral Multiplexer Select bit 2
bits : 13 - 13 (1 bit)

P14 : Peripheral Multiplexer Select bit 2
bits : 14 - 14 (1 bit)

P15 : Peripheral Multiplexer Select bit 2
bits : 15 - 15 (1 bit)

P16 : Peripheral Multiplexer Select bit 2
bits : 16 - 16 (1 bit)

P17 : Peripheral Multiplexer Select bit 2
bits : 17 - 17 (1 bit)

P18 : Peripheral Multiplexer Select bit 2
bits : 18 - 18 (1 bit)

P19 : Peripheral Multiplexer Select bit 2
bits : 19 - 19 (1 bit)

P20 : Peripheral Multiplexer Select bit 2
bits : 20 - 20 (1 bit)

P21 : Peripheral Multiplexer Select bit 2
bits : 21 - 21 (1 bit)

P22 : Peripheral Multiplexer Select bit 2
bits : 22 - 22 (1 bit)

P23 : Peripheral Multiplexer Select bit 2
bits : 23 - 23 (1 bit)

P24 : Peripheral Multiplexer Select bit 2
bits : 24 - 24 (1 bit)

P25 : Peripheral Multiplexer Select bit 2
bits : 25 - 25 (1 bit)

P26 : Peripheral Multiplexer Select bit 2
bits : 26 - 26 (1 bit)

P27 : Peripheral Multiplexer Select bit 2
bits : 27 - 27 (1 bit)

P28 : Peripheral Multiplexer Select bit 2
bits : 28 - 28 (1 bit)

P29 : Peripheral Multiplexer Select bit 2
bits : 29 - 29 (1 bit)

P30 : Peripheral Multiplexer Select bit 2
bits : 30 - 30 (1 bit)

P31 : Peripheral Multiplexer Select bit 2
bits : 31 - 31 (1 bit)


PMR2S1

Peripheral Mux Register 2 - Set
address_offset : 0x29C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR2S1 PMR2S1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 2
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 2
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 2
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 2
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 2
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 2
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 2
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 2
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 2
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 2
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 2
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 2
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 2
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 2
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 2
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 2
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 2
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 2
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 2
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 2
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 2
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 2
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 2
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 2
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 2
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 2
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 2
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 2
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 2
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 2
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 2
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 2
bits : 31 - 31 (1 bit)
access : write-only


PMR2C1

Peripheral Mux Register 2 - Clear
address_offset : 0x2A8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR2C1 PMR2C1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 2
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 2
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 2
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 2
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 2
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 2
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 2
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 2
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 2
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 2
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 2
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 2
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 2
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 2
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 2
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 2
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 2
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 2
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 2
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 2
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 2
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 2
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 2
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 2
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 2
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 2
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 2
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 2
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 2
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 2
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 2
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 2
bits : 31 - 31 (1 bit)
access : write-only


PMR2T1

Peripheral Mux Register 2 - Toggle
address_offset : 0x2B4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR2T1 PMR2T1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 2
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 2
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 2
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 2
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 2
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 2
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 2
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 2
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 2
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 2
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 2
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 2
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 2
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 2
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 2
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 2
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 2
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 2
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 2
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 2
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 2
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 2
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 2
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 2
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 2
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 2
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 2
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 2
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 2
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 2
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 2
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 2
bits : 31 - 31 (1 bit)
access : write-only


ODER1

Output Driver Enable Register
address_offset : 0x2C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODER1 ODER1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driver Enable
bits : 0 - 0 (1 bit)

P1 : Output Driver Enable
bits : 1 - 1 (1 bit)

P2 : Output Driver Enable
bits : 2 - 2 (1 bit)

P3 : Output Driver Enable
bits : 3 - 3 (1 bit)

P4 : Output Driver Enable
bits : 4 - 4 (1 bit)

P5 : Output Driver Enable
bits : 5 - 5 (1 bit)

P6 : Output Driver Enable
bits : 6 - 6 (1 bit)

P7 : Output Driver Enable
bits : 7 - 7 (1 bit)

P8 : Output Driver Enable
bits : 8 - 8 (1 bit)

P9 : Output Driver Enable
bits : 9 - 9 (1 bit)

P10 : Output Driver Enable
bits : 10 - 10 (1 bit)

P11 : Output Driver Enable
bits : 11 - 11 (1 bit)

P12 : Output Driver Enable
bits : 12 - 12 (1 bit)

P13 : Output Driver Enable
bits : 13 - 13 (1 bit)

P14 : Output Driver Enable
bits : 14 - 14 (1 bit)

P15 : Output Driver Enable
bits : 15 - 15 (1 bit)

P16 : Output Driver Enable
bits : 16 - 16 (1 bit)

P17 : Output Driver Enable
bits : 17 - 17 (1 bit)

P18 : Output Driver Enable
bits : 18 - 18 (1 bit)

P19 : Output Driver Enable
bits : 19 - 19 (1 bit)

P20 : Output Driver Enable
bits : 20 - 20 (1 bit)

P21 : Output Driver Enable
bits : 21 - 21 (1 bit)

P22 : Output Driver Enable
bits : 22 - 22 (1 bit)

P23 : Output Driver Enable
bits : 23 - 23 (1 bit)

P24 : Output Driver Enable
bits : 24 - 24 (1 bit)

P25 : Output Driver Enable
bits : 25 - 25 (1 bit)

P26 : Output Driver Enable
bits : 26 - 26 (1 bit)

P27 : Output Driver Enable
bits : 27 - 27 (1 bit)

P28 : Output Driver Enable
bits : 28 - 28 (1 bit)

P29 : Output Driver Enable
bits : 29 - 29 (1 bit)

P30 : Output Driver Enable
bits : 30 - 30 (1 bit)

P31 : Output Driver Enable
bits : 31 - 31 (1 bit)


STER0

Schmitt Trigger Enable Register
address_offset : 0x2C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STER0 STER0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Schmitt Trigger Enable
bits : 0 - 0 (1 bit)

P1 : Schmitt Trigger Enable
bits : 1 - 1 (1 bit)

P2 : Schmitt Trigger Enable
bits : 2 - 2 (1 bit)

P3 : Schmitt Trigger Enable
bits : 3 - 3 (1 bit)

P4 : Schmitt Trigger Enable
bits : 4 - 4 (1 bit)

P5 : Schmitt Trigger Enable
bits : 5 - 5 (1 bit)

P6 : Schmitt Trigger Enable
bits : 6 - 6 (1 bit)

P7 : Schmitt Trigger Enable
bits : 7 - 7 (1 bit)

P8 : Schmitt Trigger Enable
bits : 8 - 8 (1 bit)

P9 : Schmitt Trigger Enable
bits : 9 - 9 (1 bit)

P10 : Schmitt Trigger Enable
bits : 10 - 10 (1 bit)

P11 : Schmitt Trigger Enable
bits : 11 - 11 (1 bit)

P12 : Schmitt Trigger Enable
bits : 12 - 12 (1 bit)

P13 : Schmitt Trigger Enable
bits : 13 - 13 (1 bit)

P14 : Schmitt Trigger Enable
bits : 14 - 14 (1 bit)

P15 : Schmitt Trigger Enable
bits : 15 - 15 (1 bit)

P16 : Schmitt Trigger Enable
bits : 16 - 16 (1 bit)

P17 : Schmitt Trigger Enable
bits : 17 - 17 (1 bit)

P18 : Schmitt Trigger Enable
bits : 18 - 18 (1 bit)

P19 : Schmitt Trigger Enable
bits : 19 - 19 (1 bit)

P20 : Schmitt Trigger Enable
bits : 20 - 20 (1 bit)

P21 : Schmitt Trigger Enable
bits : 21 - 21 (1 bit)

P22 : Schmitt Trigger Enable
bits : 22 - 22 (1 bit)

P23 : Schmitt Trigger Enable
bits : 23 - 23 (1 bit)

P24 : Schmitt Trigger Enable
bits : 24 - 24 (1 bit)

P25 : Schmitt Trigger Enable
bits : 25 - 25 (1 bit)

P26 : Schmitt Trigger Enable
bits : 26 - 26 (1 bit)

P27 : Schmitt Trigger Enable
bits : 27 - 27 (1 bit)

P28 : Schmitt Trigger Enable
bits : 28 - 28 (1 bit)

P29 : Schmitt Trigger Enable
bits : 29 - 29 (1 bit)

P30 : Schmitt Trigger Enable
bits : 30 - 30 (1 bit)

P31 : Schmitt Trigger Enable
bits : 31 - 31 (1 bit)


STERS0

Schmitt Trigger Enable Register - Set
address_offset : 0x2C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STERS0 STERS0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Schmitt Trigger Enable
bits : 0 - 0 (1 bit)

P1 : Schmitt Trigger Enable
bits : 1 - 1 (1 bit)

P2 : Schmitt Trigger Enable
bits : 2 - 2 (1 bit)

P3 : Schmitt Trigger Enable
bits : 3 - 3 (1 bit)

P4 : Schmitt Trigger Enable
bits : 4 - 4 (1 bit)

P5 : Schmitt Trigger Enable
bits : 5 - 5 (1 bit)

P6 : Schmitt Trigger Enable
bits : 6 - 6 (1 bit)

P7 : Schmitt Trigger Enable
bits : 7 - 7 (1 bit)

P8 : Schmitt Trigger Enable
bits : 8 - 8 (1 bit)

P9 : Schmitt Trigger Enable
bits : 9 - 9 (1 bit)

P10 : Schmitt Trigger Enable
bits : 10 - 10 (1 bit)

P11 : Schmitt Trigger Enable
bits : 11 - 11 (1 bit)

P12 : Schmitt Trigger Enable
bits : 12 - 12 (1 bit)

P13 : Schmitt Trigger Enable
bits : 13 - 13 (1 bit)

P14 : Schmitt Trigger Enable
bits : 14 - 14 (1 bit)

P15 : Schmitt Trigger Enable
bits : 15 - 15 (1 bit)

P16 : Schmitt Trigger Enable
bits : 16 - 16 (1 bit)

P17 : Schmitt Trigger Enable
bits : 17 - 17 (1 bit)

P18 : Schmitt Trigger Enable
bits : 18 - 18 (1 bit)

P19 : Schmitt Trigger Enable
bits : 19 - 19 (1 bit)

P20 : Schmitt Trigger Enable
bits : 20 - 20 (1 bit)

P21 : Schmitt Trigger Enable
bits : 21 - 21 (1 bit)

P22 : Schmitt Trigger Enable
bits : 22 - 22 (1 bit)

P23 : Schmitt Trigger Enable
bits : 23 - 23 (1 bit)

P24 : Schmitt Trigger Enable
bits : 24 - 24 (1 bit)

P25 : Schmitt Trigger Enable
bits : 25 - 25 (1 bit)

P26 : Schmitt Trigger Enable
bits : 26 - 26 (1 bit)

P27 : Schmitt Trigger Enable
bits : 27 - 27 (1 bit)

P28 : Schmitt Trigger Enable
bits : 28 - 28 (1 bit)

P29 : Schmitt Trigger Enable
bits : 29 - 29 (1 bit)

P30 : Schmitt Trigger Enable
bits : 30 - 30 (1 bit)

P31 : Schmitt Trigger Enable
bits : 31 - 31 (1 bit)


ODERS1

Output Driver Enable Register - Set
address_offset : 0x2CC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ODERS1 ODERS1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driver Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Driver Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Driver Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Driver Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Driver Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Driver Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Driver Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Driver Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Driver Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Driver Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Driver Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Driver Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Driver Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Driver Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Driver Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Driver Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Driver Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Driver Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Driver Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Driver Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Driver Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Driver Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Driver Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Driver Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Driver Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Driver Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Driver Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Driver Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Driver Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Driver Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Driver Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Driver Enable
bits : 31 - 31 (1 bit)
access : write-only


STERC0

Schmitt Trigger Enable Register - Clear
address_offset : 0x2D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STERC0 STERC0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Schmitt Trigger Enable
bits : 0 - 0 (1 bit)

P1 : Schmitt Trigger Enable
bits : 1 - 1 (1 bit)

P2 : Schmitt Trigger Enable
bits : 2 - 2 (1 bit)

P3 : Schmitt Trigger Enable
bits : 3 - 3 (1 bit)

P4 : Schmitt Trigger Enable
bits : 4 - 4 (1 bit)

P5 : Schmitt Trigger Enable
bits : 5 - 5 (1 bit)

P6 : Schmitt Trigger Enable
bits : 6 - 6 (1 bit)

P7 : Schmitt Trigger Enable
bits : 7 - 7 (1 bit)

P8 : Schmitt Trigger Enable
bits : 8 - 8 (1 bit)

P9 : Schmitt Trigger Enable
bits : 9 - 9 (1 bit)

P10 : Schmitt Trigger Enable
bits : 10 - 10 (1 bit)

P11 : Schmitt Trigger Enable
bits : 11 - 11 (1 bit)

P12 : Schmitt Trigger Enable
bits : 12 - 12 (1 bit)

P13 : Schmitt Trigger Enable
bits : 13 - 13 (1 bit)

P14 : Schmitt Trigger Enable
bits : 14 - 14 (1 bit)

P15 : Schmitt Trigger Enable
bits : 15 - 15 (1 bit)

P16 : Schmitt Trigger Enable
bits : 16 - 16 (1 bit)

P17 : Schmitt Trigger Enable
bits : 17 - 17 (1 bit)

P18 : Schmitt Trigger Enable
bits : 18 - 18 (1 bit)

P19 : Schmitt Trigger Enable
bits : 19 - 19 (1 bit)

P20 : Schmitt Trigger Enable
bits : 20 - 20 (1 bit)

P21 : Schmitt Trigger Enable
bits : 21 - 21 (1 bit)

P22 : Schmitt Trigger Enable
bits : 22 - 22 (1 bit)

P23 : Schmitt Trigger Enable
bits : 23 - 23 (1 bit)

P24 : Schmitt Trigger Enable
bits : 24 - 24 (1 bit)

P25 : Schmitt Trigger Enable
bits : 25 - 25 (1 bit)

P26 : Schmitt Trigger Enable
bits : 26 - 26 (1 bit)

P27 : Schmitt Trigger Enable
bits : 27 - 27 (1 bit)

P28 : Schmitt Trigger Enable
bits : 28 - 28 (1 bit)

P29 : Schmitt Trigger Enable
bits : 29 - 29 (1 bit)

P30 : Schmitt Trigger Enable
bits : 30 - 30 (1 bit)

P31 : Schmitt Trigger Enable
bits : 31 - 31 (1 bit)


ODERC1

Output Driver Enable Register - Clear
address_offset : 0x2D8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ODERC1 ODERC1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driver Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Driver Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Driver Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Driver Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Driver Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Driver Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Driver Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Driver Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Driver Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Driver Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Driver Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Driver Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Driver Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Driver Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Driver Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Driver Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Driver Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Driver Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Driver Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Driver Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Driver Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Driver Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Driver Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Driver Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Driver Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Driver Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Driver Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Driver Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Driver Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Driver Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Driver Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Driver Enable
bits : 31 - 31 (1 bit)
access : write-only


STERT0

Schmitt Trigger Enable Register - Toggle
address_offset : 0x2D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STERT0 STERT0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Schmitt Trigger Enable
bits : 0 - 0 (1 bit)

P1 : Schmitt Trigger Enable
bits : 1 - 1 (1 bit)

P2 : Schmitt Trigger Enable
bits : 2 - 2 (1 bit)

P3 : Schmitt Trigger Enable
bits : 3 - 3 (1 bit)

P4 : Schmitt Trigger Enable
bits : 4 - 4 (1 bit)

P5 : Schmitt Trigger Enable
bits : 5 - 5 (1 bit)

P6 : Schmitt Trigger Enable
bits : 6 - 6 (1 bit)

P7 : Schmitt Trigger Enable
bits : 7 - 7 (1 bit)

P8 : Schmitt Trigger Enable
bits : 8 - 8 (1 bit)

P9 : Schmitt Trigger Enable
bits : 9 - 9 (1 bit)

P10 : Schmitt Trigger Enable
bits : 10 - 10 (1 bit)

P11 : Schmitt Trigger Enable
bits : 11 - 11 (1 bit)

P12 : Schmitt Trigger Enable
bits : 12 - 12 (1 bit)

P13 : Schmitt Trigger Enable
bits : 13 - 13 (1 bit)

P14 : Schmitt Trigger Enable
bits : 14 - 14 (1 bit)

P15 : Schmitt Trigger Enable
bits : 15 - 15 (1 bit)

P16 : Schmitt Trigger Enable
bits : 16 - 16 (1 bit)

P17 : Schmitt Trigger Enable
bits : 17 - 17 (1 bit)

P18 : Schmitt Trigger Enable
bits : 18 - 18 (1 bit)

P19 : Schmitt Trigger Enable
bits : 19 - 19 (1 bit)

P20 : Schmitt Trigger Enable
bits : 20 - 20 (1 bit)

P21 : Schmitt Trigger Enable
bits : 21 - 21 (1 bit)

P22 : Schmitt Trigger Enable
bits : 22 - 22 (1 bit)

P23 : Schmitt Trigger Enable
bits : 23 - 23 (1 bit)

P24 : Schmitt Trigger Enable
bits : 24 - 24 (1 bit)

P25 : Schmitt Trigger Enable
bits : 25 - 25 (1 bit)

P26 : Schmitt Trigger Enable
bits : 26 - 26 (1 bit)

P27 : Schmitt Trigger Enable
bits : 27 - 27 (1 bit)

P28 : Schmitt Trigger Enable
bits : 28 - 28 (1 bit)

P29 : Schmitt Trigger Enable
bits : 29 - 29 (1 bit)

P30 : Schmitt Trigger Enable
bits : 30 - 30 (1 bit)

P31 : Schmitt Trigger Enable
bits : 31 - 31 (1 bit)


ODERT1

Output Driver Enable Register - Toggle
address_offset : 0x2E4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ODERT1 ODERT1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driver Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Driver Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Driver Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Driver Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Driver Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Driver Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Driver Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Driver Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Driver Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Driver Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Driver Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Driver Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Driver Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Driver Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Driver Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Driver Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Driver Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Driver Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Driver Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Driver Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Driver Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Driver Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Driver Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Driver Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Driver Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Driver Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Driver Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Driver Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Driver Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Driver Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Driver Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Driver Enable
bits : 31 - 31 (1 bit)
access : write-only


OVR1

Output Value Register
address_offset : 0x2F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OVR1 OVR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Value
bits : 0 - 0 (1 bit)

P1 : Output Value
bits : 1 - 1 (1 bit)

P2 : Output Value
bits : 2 - 2 (1 bit)

P3 : Output Value
bits : 3 - 3 (1 bit)

P4 : Output Value
bits : 4 - 4 (1 bit)

P5 : Output Value
bits : 5 - 5 (1 bit)

P6 : Output Value
bits : 6 - 6 (1 bit)

P7 : Output Value
bits : 7 - 7 (1 bit)

P8 : Output Value
bits : 8 - 8 (1 bit)

P9 : Output Value
bits : 9 - 9 (1 bit)

P10 : Output Value
bits : 10 - 10 (1 bit)

P11 : Output Value
bits : 11 - 11 (1 bit)

P12 : Output Value
bits : 12 - 12 (1 bit)

P13 : Output Value
bits : 13 - 13 (1 bit)

P14 : Output Value
bits : 14 - 14 (1 bit)

P15 : Output Value
bits : 15 - 15 (1 bit)

P16 : Output Value
bits : 16 - 16 (1 bit)

P17 : Output Value
bits : 17 - 17 (1 bit)

P18 : Output Value
bits : 18 - 18 (1 bit)

P19 : Output Value
bits : 19 - 19 (1 bit)

P20 : Output Value
bits : 20 - 20 (1 bit)

P21 : Output Value
bits : 21 - 21 (1 bit)

P22 : Output Value
bits : 22 - 22 (1 bit)

P23 : Output Value
bits : 23 - 23 (1 bit)

P24 : Output Value
bits : 24 - 24 (1 bit)

P25 : Output Value
bits : 25 - 25 (1 bit)

P26 : Output Value
bits : 26 - 26 (1 bit)

P27 : Output Value
bits : 27 - 27 (1 bit)

P28 : Output Value
bits : 28 - 28 (1 bit)

P29 : Output Value
bits : 29 - 29 (1 bit)

P30 : Output Value
bits : 30 - 30 (1 bit)

P31 : Output Value
bits : 31 - 31 (1 bit)


OVRS1

Output Value Register - Set
address_offset : 0x2FC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

OVRS1 OVRS1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Value
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Value
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Value
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Value
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Value
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Value
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Value
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Value
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Value
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Value
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Value
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Value
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Value
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Value
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Value
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Value
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Value
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Value
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Value
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Value
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Value
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Value
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Value
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Value
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Value
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Value
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Value
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Value
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Value
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Value
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Value
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Value
bits : 31 - 31 (1 bit)
access : write-only


PMR0C0

Peripheral Mux Register 0 - Clear
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR0C0 PMR0C0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 0
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 0
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 0
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 0
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 0
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 0
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 0
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 0
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 0
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 0
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 0
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 0
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 0
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 0
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 0
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 0
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 0
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 0
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 0
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 0
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 0
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 0
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 0
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 0
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 0
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 0
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 0
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 0
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 0
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 0
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 0
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 0
bits : 31 - 31 (1 bit)
access : write-only


EVER0

Event Enable Register
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVER0 EVER0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Event Enable
bits : 0 - 0 (1 bit)

P1 : Event Enable
bits : 1 - 1 (1 bit)

P2 : Event Enable
bits : 2 - 2 (1 bit)

P3 : Event Enable
bits : 3 - 3 (1 bit)

P4 : Event Enable
bits : 4 - 4 (1 bit)

P5 : Event Enable
bits : 5 - 5 (1 bit)

P6 : Event Enable
bits : 6 - 6 (1 bit)

P7 : Event Enable
bits : 7 - 7 (1 bit)

P8 : Event Enable
bits : 8 - 8 (1 bit)

P9 : Event Enable
bits : 9 - 9 (1 bit)

P10 : Event Enable
bits : 10 - 10 (1 bit)

P11 : Event Enable
bits : 11 - 11 (1 bit)

P12 : Event Enable
bits : 12 - 12 (1 bit)

P13 : Event Enable
bits : 13 - 13 (1 bit)

P14 : Event Enable
bits : 14 - 14 (1 bit)

P15 : Event Enable
bits : 15 - 15 (1 bit)

P16 : Event Enable
bits : 16 - 16 (1 bit)

P17 : Event Enable
bits : 17 - 17 (1 bit)

P18 : Event Enable
bits : 18 - 18 (1 bit)

P19 : Event Enable
bits : 19 - 19 (1 bit)

P20 : Event Enable
bits : 20 - 20 (1 bit)

P21 : Event Enable
bits : 21 - 21 (1 bit)

P22 : Event Enable
bits : 22 - 22 (1 bit)

P23 : Event Enable
bits : 23 - 23 (1 bit)

P24 : Event Enable
bits : 24 - 24 (1 bit)

P25 : Event Enable
bits : 25 - 25 (1 bit)

P26 : Event Enable
bits : 26 - 26 (1 bit)

P27 : Event Enable
bits : 27 - 27 (1 bit)

P28 : Event Enable
bits : 28 - 28 (1 bit)

P29 : Event Enable
bits : 29 - 29 (1 bit)

P30 : Event Enable
bits : 30 - 30 (1 bit)

P31 : Event Enable
bits : 31 - 31 (1 bit)


EVERS0

Event Enable Register - Set
address_offset : 0x308 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

EVERS0 EVERS0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Event Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Event Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Event Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Event Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Event Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Event Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Event Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Event Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Event Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Event Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Event Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Event Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Event Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Event Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Event Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Event Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Event Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Event Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Event Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Event Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Event Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Event Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Event Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Event Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Event Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Event Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Event Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Event Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Event Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Event Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Event Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Event Enable
bits : 31 - 31 (1 bit)
access : write-only


OVRC1

Output Value Register - Clear
address_offset : 0x308 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

OVRC1 OVRC1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Value
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Value
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Value
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Value
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Value
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Value
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Value
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Value
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Value
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Value
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Value
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Value
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Value
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Value
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Value
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Value
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Value
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Value
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Value
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Value
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Value
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Value
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Value
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Value
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Value
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Value
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Value
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Value
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Value
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Value
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Value
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Value
bits : 31 - 31 (1 bit)
access : write-only


EVERC0

Event Enable Register - Clear
address_offset : 0x310 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

EVERC0 EVERC0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Event Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Event Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Event Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Event Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Event Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Event Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Event Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Event Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Event Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Event Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Event Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Event Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Event Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Event Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Event Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Event Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Event Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Event Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Event Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Event Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Event Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Event Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Event Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Event Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Event Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Event Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Event Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Event Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Event Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Event Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Event Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Event Enable
bits : 31 - 31 (1 bit)
access : write-only


OVRT1

Output Value Register - Toggle
address_offset : 0x314 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

OVRT1 OVRT1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Value
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Value
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Value
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Value
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Value
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Value
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Value
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Value
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Value
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Value
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Value
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Value
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Value
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Value
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Value
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Value
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Value
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Value
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Value
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Value
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Value
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Value
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Value
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Value
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Value
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Value
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Value
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Value
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Value
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Value
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Value
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Value
bits : 31 - 31 (1 bit)
access : write-only


EVERT0

Event Enable Register - Toggle
address_offset : 0x318 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

EVERT0 EVERT0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Event Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Event Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Event Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Event Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Event Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Event Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Event Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Event Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Event Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Event Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Event Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Event Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Event Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Event Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Event Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Event Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Event Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Event Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Event Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Event Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Event Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Event Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Event Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Event Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Event Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Event Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Event Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Event Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Event Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Event Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Event Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Event Enable
bits : 31 - 31 (1 bit)
access : write-only


PVR1

Pin Value Register
address_offset : 0x320 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PVR1 PVR1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pin Value
bits : 0 - 0 (1 bit)
access : read-only

P1 : Pin Value
bits : 1 - 1 (1 bit)
access : read-only

P2 : Pin Value
bits : 2 - 2 (1 bit)
access : read-only

P3 : Pin Value
bits : 3 - 3 (1 bit)
access : read-only

P4 : Pin Value
bits : 4 - 4 (1 bit)
access : read-only

P5 : Pin Value
bits : 5 - 5 (1 bit)
access : read-only

P6 : Pin Value
bits : 6 - 6 (1 bit)
access : read-only

P7 : Pin Value
bits : 7 - 7 (1 bit)
access : read-only

P8 : Pin Value
bits : 8 - 8 (1 bit)
access : read-only

P9 : Pin Value
bits : 9 - 9 (1 bit)
access : read-only

P10 : Pin Value
bits : 10 - 10 (1 bit)
access : read-only

P11 : Pin Value
bits : 11 - 11 (1 bit)
access : read-only

P12 : Pin Value
bits : 12 - 12 (1 bit)
access : read-only

P13 : Pin Value
bits : 13 - 13 (1 bit)
access : read-only

P14 : Pin Value
bits : 14 - 14 (1 bit)
access : read-only

P15 : Pin Value
bits : 15 - 15 (1 bit)
access : read-only

P16 : Pin Value
bits : 16 - 16 (1 bit)
access : read-only

P17 : Pin Value
bits : 17 - 17 (1 bit)
access : read-only

P18 : Pin Value
bits : 18 - 18 (1 bit)
access : read-only

P19 : Pin Value
bits : 19 - 19 (1 bit)
access : read-only

P20 : Pin Value
bits : 20 - 20 (1 bit)
access : read-only

P21 : Pin Value
bits : 21 - 21 (1 bit)
access : read-only

P22 : Pin Value
bits : 22 - 22 (1 bit)
access : read-only

P23 : Pin Value
bits : 23 - 23 (1 bit)
access : read-only

P24 : Pin Value
bits : 24 - 24 (1 bit)
access : read-only

P25 : Pin Value
bits : 25 - 25 (1 bit)
access : read-only

P26 : Pin Value
bits : 26 - 26 (1 bit)
access : read-only

P27 : Pin Value
bits : 27 - 27 (1 bit)
access : read-only

P28 : Pin Value
bits : 28 - 28 (1 bit)
access : read-only

P29 : Pin Value
bits : 29 - 29 (1 bit)
access : read-only

P30 : Pin Value
bits : 30 - 30 (1 bit)
access : read-only

P31 : Pin Value
bits : 31 - 31 (1 bit)
access : read-only


LOCK0

Lock Register
address_offset : 0x340 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOCK0 LOCK0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Lock State
bits : 0 - 0 (1 bit)

P1 : Lock State
bits : 1 - 1 (1 bit)

P2 : Lock State
bits : 2 - 2 (1 bit)

P3 : Lock State
bits : 3 - 3 (1 bit)

P4 : Lock State
bits : 4 - 4 (1 bit)

P5 : Lock State
bits : 5 - 5 (1 bit)

P6 : Lock State
bits : 6 - 6 (1 bit)

P7 : Lock State
bits : 7 - 7 (1 bit)

P8 : Lock State
bits : 8 - 8 (1 bit)

P9 : Lock State
bits : 9 - 9 (1 bit)

P10 : Lock State
bits : 10 - 10 (1 bit)

P11 : Lock State
bits : 11 - 11 (1 bit)

P12 : Lock State
bits : 12 - 12 (1 bit)

P13 : Lock State
bits : 13 - 13 (1 bit)

P14 : Lock State
bits : 14 - 14 (1 bit)

P15 : Lock State
bits : 15 - 15 (1 bit)

P16 : Lock State
bits : 16 - 16 (1 bit)

P17 : Lock State
bits : 17 - 17 (1 bit)

P18 : Lock State
bits : 18 - 18 (1 bit)

P19 : Lock State
bits : 19 - 19 (1 bit)

P20 : Lock State
bits : 20 - 20 (1 bit)

P21 : Lock State
bits : 21 - 21 (1 bit)

P22 : Lock State
bits : 22 - 22 (1 bit)

P23 : Lock State
bits : 23 - 23 (1 bit)

P24 : Lock State
bits : 24 - 24 (1 bit)

P25 : Lock State
bits : 25 - 25 (1 bit)

P26 : Lock State
bits : 26 - 26 (1 bit)

P27 : Lock State
bits : 27 - 27 (1 bit)

P28 : Lock State
bits : 28 - 28 (1 bit)

P29 : Lock State
bits : 29 - 29 (1 bit)

P30 : Lock State
bits : 30 - 30 (1 bit)

P31 : Lock State
bits : 31 - 31 (1 bit)


LOCKS0

Lock Register - Set
address_offset : 0x348 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

LOCKS0 LOCKS0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Lock State
bits : 0 - 0 (1 bit)

P1 : Lock State
bits : 1 - 1 (1 bit)

P2 : Lock State
bits : 2 - 2 (1 bit)

P3 : Lock State
bits : 3 - 3 (1 bit)

P4 : Lock State
bits : 4 - 4 (1 bit)

P5 : Lock State
bits : 5 - 5 (1 bit)

P6 : Lock State
bits : 6 - 6 (1 bit)

P7 : Lock State
bits : 7 - 7 (1 bit)

P8 : Lock State
bits : 8 - 8 (1 bit)

P9 : Lock State
bits : 9 - 9 (1 bit)

P10 : Lock State
bits : 10 - 10 (1 bit)

P11 : Lock State
bits : 11 - 11 (1 bit)

P12 : Lock State
bits : 12 - 12 (1 bit)

P13 : Lock State
bits : 13 - 13 (1 bit)

P14 : Lock State
bits : 14 - 14 (1 bit)

P15 : Lock State
bits : 15 - 15 (1 bit)

P16 : Lock State
bits : 16 - 16 (1 bit)

P17 : Lock State
bits : 17 - 17 (1 bit)

P18 : Lock State
bits : 18 - 18 (1 bit)

P19 : Lock State
bits : 19 - 19 (1 bit)

P20 : Lock State
bits : 20 - 20 (1 bit)

P21 : Lock State
bits : 21 - 21 (1 bit)

P22 : Lock State
bits : 22 - 22 (1 bit)

P23 : Lock State
bits : 23 - 23 (1 bit)

P24 : Lock State
bits : 24 - 24 (1 bit)

P25 : Lock State
bits : 25 - 25 (1 bit)

P26 : Lock State
bits : 26 - 26 (1 bit)

P27 : Lock State
bits : 27 - 27 (1 bit)

P28 : Lock State
bits : 28 - 28 (1 bit)

P29 : Lock State
bits : 29 - 29 (1 bit)

P30 : Lock State
bits : 30 - 30 (1 bit)

P31 : Lock State
bits : 31 - 31 (1 bit)


LOCKC0

Lock Register - Clear
address_offset : 0x350 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

LOCKC0 LOCKC0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Lock State
bits : 0 - 0 (1 bit)

P1 : Lock State
bits : 1 - 1 (1 bit)

P2 : Lock State
bits : 2 - 2 (1 bit)

P3 : Lock State
bits : 3 - 3 (1 bit)

P4 : Lock State
bits : 4 - 4 (1 bit)

P5 : Lock State
bits : 5 - 5 (1 bit)

P6 : Lock State
bits : 6 - 6 (1 bit)

P7 : Lock State
bits : 7 - 7 (1 bit)

P8 : Lock State
bits : 8 - 8 (1 bit)

P9 : Lock State
bits : 9 - 9 (1 bit)

P10 : Lock State
bits : 10 - 10 (1 bit)

P11 : Lock State
bits : 11 - 11 (1 bit)

P12 : Lock State
bits : 12 - 12 (1 bit)

P13 : Lock State
bits : 13 - 13 (1 bit)

P14 : Lock State
bits : 14 - 14 (1 bit)

P15 : Lock State
bits : 15 - 15 (1 bit)

P16 : Lock State
bits : 16 - 16 (1 bit)

P17 : Lock State
bits : 17 - 17 (1 bit)

P18 : Lock State
bits : 18 - 18 (1 bit)

P19 : Lock State
bits : 19 - 19 (1 bit)

P20 : Lock State
bits : 20 - 20 (1 bit)

P21 : Lock State
bits : 21 - 21 (1 bit)

P22 : Lock State
bits : 22 - 22 (1 bit)

P23 : Lock State
bits : 23 - 23 (1 bit)

P24 : Lock State
bits : 24 - 24 (1 bit)

P25 : Lock State
bits : 25 - 25 (1 bit)

P26 : Lock State
bits : 26 - 26 (1 bit)

P27 : Lock State
bits : 27 - 27 (1 bit)

P28 : Lock State
bits : 28 - 28 (1 bit)

P29 : Lock State
bits : 29 - 29 (1 bit)

P30 : Lock State
bits : 30 - 30 (1 bit)

P31 : Lock State
bits : 31 - 31 (1 bit)


PUER1

Pull-up Enable Register
address_offset : 0x350 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUER1 PUER1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-up Enable
bits : 0 - 0 (1 bit)

P1 : Pull-up Enable
bits : 1 - 1 (1 bit)

P2 : Pull-up Enable
bits : 2 - 2 (1 bit)

P3 : Pull-up Enable
bits : 3 - 3 (1 bit)

P4 : Pull-up Enable
bits : 4 - 4 (1 bit)

P5 : Pull-up Enable
bits : 5 - 5 (1 bit)

P6 : Pull-up Enable
bits : 6 - 6 (1 bit)

P7 : Pull-up Enable
bits : 7 - 7 (1 bit)

P8 : Pull-up Enable
bits : 8 - 8 (1 bit)

P9 : Pull-up Enable
bits : 9 - 9 (1 bit)

P10 : Pull-up Enable
bits : 10 - 10 (1 bit)

P11 : Pull-up Enable
bits : 11 - 11 (1 bit)

P12 : Pull-up Enable
bits : 12 - 12 (1 bit)

P13 : Pull-up Enable
bits : 13 - 13 (1 bit)

P14 : Pull-up Enable
bits : 14 - 14 (1 bit)

P15 : Pull-up Enable
bits : 15 - 15 (1 bit)

P16 : Pull-up Enable
bits : 16 - 16 (1 bit)

P17 : Pull-up Enable
bits : 17 - 17 (1 bit)

P18 : Pull-up Enable
bits : 18 - 18 (1 bit)

P19 : Pull-up Enable
bits : 19 - 19 (1 bit)

P20 : Pull-up Enable
bits : 20 - 20 (1 bit)

P21 : Pull-up Enable
bits : 21 - 21 (1 bit)

P22 : Pull-up Enable
bits : 22 - 22 (1 bit)

P23 : Pull-up Enable
bits : 23 - 23 (1 bit)

P24 : Pull-up Enable
bits : 24 - 24 (1 bit)

P25 : Pull-up Enable
bits : 25 - 25 (1 bit)

P26 : Pull-up Enable
bits : 26 - 26 (1 bit)

P27 : Pull-up Enable
bits : 27 - 27 (1 bit)

P28 : Pull-up Enable
bits : 28 - 28 (1 bit)

P29 : Pull-up Enable
bits : 29 - 29 (1 bit)

P30 : Pull-up Enable
bits : 30 - 30 (1 bit)

P31 : Pull-up Enable
bits : 31 - 31 (1 bit)


LOCKT0

Lock Register - Toggle
address_offset : 0x358 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

LOCKT0 LOCKT0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Lock State
bits : 0 - 0 (1 bit)

P1 : Lock State
bits : 1 - 1 (1 bit)

P2 : Lock State
bits : 2 - 2 (1 bit)

P3 : Lock State
bits : 3 - 3 (1 bit)

P4 : Lock State
bits : 4 - 4 (1 bit)

P5 : Lock State
bits : 5 - 5 (1 bit)

P6 : Lock State
bits : 6 - 6 (1 bit)

P7 : Lock State
bits : 7 - 7 (1 bit)

P8 : Lock State
bits : 8 - 8 (1 bit)

P9 : Lock State
bits : 9 - 9 (1 bit)

P10 : Lock State
bits : 10 - 10 (1 bit)

P11 : Lock State
bits : 11 - 11 (1 bit)

P12 : Lock State
bits : 12 - 12 (1 bit)

P13 : Lock State
bits : 13 - 13 (1 bit)

P14 : Lock State
bits : 14 - 14 (1 bit)

P15 : Lock State
bits : 15 - 15 (1 bit)

P16 : Lock State
bits : 16 - 16 (1 bit)

P17 : Lock State
bits : 17 - 17 (1 bit)

P18 : Lock State
bits : 18 - 18 (1 bit)

P19 : Lock State
bits : 19 - 19 (1 bit)

P20 : Lock State
bits : 20 - 20 (1 bit)

P21 : Lock State
bits : 21 - 21 (1 bit)

P22 : Lock State
bits : 22 - 22 (1 bit)

P23 : Lock State
bits : 23 - 23 (1 bit)

P24 : Lock State
bits : 24 - 24 (1 bit)

P25 : Lock State
bits : 25 - 25 (1 bit)

P26 : Lock State
bits : 26 - 26 (1 bit)

P27 : Lock State
bits : 27 - 27 (1 bit)

P28 : Lock State
bits : 28 - 28 (1 bit)

P29 : Lock State
bits : 29 - 29 (1 bit)

P30 : Lock State
bits : 30 - 30 (1 bit)

P31 : Lock State
bits : 31 - 31 (1 bit)


PUERS1

Pull-up Enable Register - Set
address_offset : 0x35C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PUERS1 PUERS1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-up Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Pull-up Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Pull-up Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Pull-up Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Pull-up Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Pull-up Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Pull-up Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Pull-up Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Pull-up Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Pull-up Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Pull-up Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Pull-up Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Pull-up Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Pull-up Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Pull-up Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Pull-up Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Pull-up Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Pull-up Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Pull-up Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Pull-up Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Pull-up Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Pull-up Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Pull-up Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Pull-up Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Pull-up Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Pull-up Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Pull-up Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Pull-up Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Pull-up Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Pull-up Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Pull-up Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Pull-up Enable
bits : 31 - 31 (1 bit)
access : write-only


PUERC1

Pull-up Enable Register - Clear
address_offset : 0x368 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PUERC1 PUERC1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-up Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Pull-up Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Pull-up Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Pull-up Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Pull-up Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Pull-up Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Pull-up Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Pull-up Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Pull-up Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Pull-up Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Pull-up Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Pull-up Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Pull-up Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Pull-up Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Pull-up Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Pull-up Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Pull-up Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Pull-up Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Pull-up Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Pull-up Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Pull-up Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Pull-up Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Pull-up Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Pull-up Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Pull-up Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Pull-up Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Pull-up Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Pull-up Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Pull-up Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Pull-up Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Pull-up Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Pull-up Enable
bits : 31 - 31 (1 bit)
access : write-only


PUERT1

Pull-up Enable Register - Toggle
address_offset : 0x374 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PUERT1 PUERT1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-up Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Pull-up Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Pull-up Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Pull-up Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Pull-up Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Pull-up Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Pull-up Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Pull-up Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Pull-up Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Pull-up Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Pull-up Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Pull-up Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Pull-up Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Pull-up Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Pull-up Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Pull-up Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Pull-up Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Pull-up Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Pull-up Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Pull-up Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Pull-up Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Pull-up Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Pull-up Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Pull-up Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Pull-up Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Pull-up Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Pull-up Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Pull-up Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Pull-up Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Pull-up Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Pull-up Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Pull-up Enable
bits : 31 - 31 (1 bit)
access : write-only


PMR0T0

Peripheral Mux Register 0 - Toggle
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR0T0 PMR0T0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 0
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 0
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 0
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 0
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 0
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 0
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 0
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 0
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 0
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 0
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 0
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 0
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 0
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 0
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 0
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 0
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 0
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 0
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 0
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 0
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 0
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 0
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 0
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 0
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 0
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 0
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 0
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 0
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 0
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 0
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 0
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 0
bits : 31 - 31 (1 bit)
access : write-only


PDER1

Pull-down Enable Register
address_offset : 0x380 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDER1 PDER1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-down Enable
bits : 0 - 0 (1 bit)

P1 : Pull-down Enable
bits : 1 - 1 (1 bit)

P2 : Pull-down Enable
bits : 2 - 2 (1 bit)

P3 : Pull-down Enable
bits : 3 - 3 (1 bit)

P4 : Pull-down Enable
bits : 4 - 4 (1 bit)

P5 : Pull-down Enable
bits : 5 - 5 (1 bit)

P6 : Pull-down Enable
bits : 6 - 6 (1 bit)

P7 : Pull-down Enable
bits : 7 - 7 (1 bit)

P8 : Pull-down Enable
bits : 8 - 8 (1 bit)

P9 : Pull-down Enable
bits : 9 - 9 (1 bit)

P10 : Pull-down Enable
bits : 10 - 10 (1 bit)

P11 : Pull-down Enable
bits : 11 - 11 (1 bit)

P12 : Pull-down Enable
bits : 12 - 12 (1 bit)

P13 : Pull-down Enable
bits : 13 - 13 (1 bit)

P14 : Pull-down Enable
bits : 14 - 14 (1 bit)

P15 : Pull-down Enable
bits : 15 - 15 (1 bit)

P16 : Pull-down Enable
bits : 16 - 16 (1 bit)

P17 : Pull-down Enable
bits : 17 - 17 (1 bit)

P18 : Pull-down Enable
bits : 18 - 18 (1 bit)

P19 : Pull-down Enable
bits : 19 - 19 (1 bit)

P20 : Pull-down Enable
bits : 20 - 20 (1 bit)

P21 : Pull-down Enable
bits : 21 - 21 (1 bit)

P22 : Pull-down Enable
bits : 22 - 22 (1 bit)

P23 : Pull-down Enable
bits : 23 - 23 (1 bit)

P24 : Pull-down Enable
bits : 24 - 24 (1 bit)

P25 : Pull-down Enable
bits : 25 - 25 (1 bit)

P26 : Pull-down Enable
bits : 26 - 26 (1 bit)

P27 : Pull-down Enable
bits : 27 - 27 (1 bit)

P28 : Pull-down Enable
bits : 28 - 28 (1 bit)

P29 : Pull-down Enable
bits : 29 - 29 (1 bit)

P30 : Pull-down Enable
bits : 30 - 30 (1 bit)

P31 : Pull-down Enable
bits : 31 - 31 (1 bit)


PDERS1

Pull-down Enable Register - Set
address_offset : 0x38C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PDERS1 PDERS1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-down Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Pull-down Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Pull-down Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Pull-down Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Pull-down Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Pull-down Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Pull-down Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Pull-down Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Pull-down Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Pull-down Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Pull-down Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Pull-down Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Pull-down Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Pull-down Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Pull-down Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Pull-down Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Pull-down Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Pull-down Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Pull-down Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Pull-down Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Pull-down Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Pull-down Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Pull-down Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Pull-down Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Pull-down Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Pull-down Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Pull-down Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Pull-down Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Pull-down Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Pull-down Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Pull-down Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Pull-down Enable
bits : 31 - 31 (1 bit)
access : write-only


PDERC1

Pull-down Enable Register - Clear
address_offset : 0x398 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PDERC1 PDERC1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-down Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Pull-down Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Pull-down Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Pull-down Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Pull-down Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Pull-down Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Pull-down Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Pull-down Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Pull-down Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Pull-down Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Pull-down Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Pull-down Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Pull-down Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Pull-down Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Pull-down Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Pull-down Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Pull-down Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Pull-down Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Pull-down Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Pull-down Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Pull-down Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Pull-down Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Pull-down Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Pull-down Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Pull-down Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Pull-down Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Pull-down Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Pull-down Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Pull-down Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Pull-down Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Pull-down Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Pull-down Enable
bits : 31 - 31 (1 bit)
access : write-only


PDERT1

Pull-down Enable Register - Toggle
address_offset : 0x3A4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PDERT1 PDERT1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-down Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Pull-down Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Pull-down Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Pull-down Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Pull-down Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Pull-down Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Pull-down Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Pull-down Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Pull-down Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Pull-down Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Pull-down Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Pull-down Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Pull-down Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Pull-down Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Pull-down Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Pull-down Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Pull-down Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Pull-down Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Pull-down Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Pull-down Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Pull-down Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Pull-down Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Pull-down Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Pull-down Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Pull-down Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Pull-down Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Pull-down Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Pull-down Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Pull-down Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Pull-down Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Pull-down Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Pull-down Enable
bits : 31 - 31 (1 bit)
access : write-only


IER1

Interrupt Enable Register
address_offset : 0x3B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IER1 IER1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Enable
bits : 0 - 0 (1 bit)

P1 : Interrupt Enable
bits : 1 - 1 (1 bit)

P2 : Interrupt Enable
bits : 2 - 2 (1 bit)

P3 : Interrupt Enable
bits : 3 - 3 (1 bit)

P4 : Interrupt Enable
bits : 4 - 4 (1 bit)

P5 : Interrupt Enable
bits : 5 - 5 (1 bit)

P6 : Interrupt Enable
bits : 6 - 6 (1 bit)

P7 : Interrupt Enable
bits : 7 - 7 (1 bit)

P8 : Interrupt Enable
bits : 8 - 8 (1 bit)

P9 : Interrupt Enable
bits : 9 - 9 (1 bit)

P10 : Interrupt Enable
bits : 10 - 10 (1 bit)

P11 : Interrupt Enable
bits : 11 - 11 (1 bit)

P12 : Interrupt Enable
bits : 12 - 12 (1 bit)

P13 : Interrupt Enable
bits : 13 - 13 (1 bit)

P14 : Interrupt Enable
bits : 14 - 14 (1 bit)

P15 : Interrupt Enable
bits : 15 - 15 (1 bit)

P16 : Interrupt Enable
bits : 16 - 16 (1 bit)

P17 : Interrupt Enable
bits : 17 - 17 (1 bit)

P18 : Interrupt Enable
bits : 18 - 18 (1 bit)

P19 : Interrupt Enable
bits : 19 - 19 (1 bit)

P20 : Interrupt Enable
bits : 20 - 20 (1 bit)

P21 : Interrupt Enable
bits : 21 - 21 (1 bit)

P22 : Interrupt Enable
bits : 22 - 22 (1 bit)

P23 : Interrupt Enable
bits : 23 - 23 (1 bit)

P24 : Interrupt Enable
bits : 24 - 24 (1 bit)

P25 : Interrupt Enable
bits : 25 - 25 (1 bit)

P26 : Interrupt Enable
bits : 26 - 26 (1 bit)

P27 : Interrupt Enable
bits : 27 - 27 (1 bit)

P28 : Interrupt Enable
bits : 28 - 28 (1 bit)

P29 : Interrupt Enable
bits : 29 - 29 (1 bit)

P30 : Interrupt Enable
bits : 30 - 30 (1 bit)

P31 : Interrupt Enable
bits : 31 - 31 (1 bit)


IERS1

Interrupt Enable Register - Set
address_offset : 0x3BC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IERS1 IERS1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Enable
bits : 31 - 31 (1 bit)
access : write-only


UNLOCK0

Unlock Register
address_offset : 0x3C0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

UNLOCK0 UNLOCK0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR KEY

ADDR : Offset Register
bits : 0 - 9 (10 bit)
access : write-only

KEY : Unlocking Key
bits : 24 - 31 (8 bit)


ASR0

Access Status Register
address_offset : 0x3C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ASR0 ASR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AR

AR : Access Error
bits : 0 - 0 (1 bit)


IERC1

Interrupt Enable Register - Clear
address_offset : 0x3C8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IERC1 IERC1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Enable
bits : 31 - 31 (1 bit)
access : write-only


IERT1

Interrupt Enable Register - Toggle
address_offset : 0x3D4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IERT1 IERT1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Enable
bits : 31 - 31 (1 bit)
access : write-only


IMR01

Interrupt Mode Register 0
address_offset : 0x3E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMR01 IMR01 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 0
bits : 0 - 0 (1 bit)

P1 : Interrupt Mode Bit 0
bits : 1 - 1 (1 bit)

P2 : Interrupt Mode Bit 0
bits : 2 - 2 (1 bit)

P3 : Interrupt Mode Bit 0
bits : 3 - 3 (1 bit)

P4 : Interrupt Mode Bit 0
bits : 4 - 4 (1 bit)

P5 : Interrupt Mode Bit 0
bits : 5 - 5 (1 bit)

P6 : Interrupt Mode Bit 0
bits : 6 - 6 (1 bit)

P7 : Interrupt Mode Bit 0
bits : 7 - 7 (1 bit)

P8 : Interrupt Mode Bit 0
bits : 8 - 8 (1 bit)

P9 : Interrupt Mode Bit 0
bits : 9 - 9 (1 bit)

P10 : Interrupt Mode Bit 0
bits : 10 - 10 (1 bit)

P11 : Interrupt Mode Bit 0
bits : 11 - 11 (1 bit)

P12 : Interrupt Mode Bit 0
bits : 12 - 12 (1 bit)

P13 : Interrupt Mode Bit 0
bits : 13 - 13 (1 bit)

P14 : Interrupt Mode Bit 0
bits : 14 - 14 (1 bit)

P15 : Interrupt Mode Bit 0
bits : 15 - 15 (1 bit)

P16 : Interrupt Mode Bit 0
bits : 16 - 16 (1 bit)

P17 : Interrupt Mode Bit 0
bits : 17 - 17 (1 bit)

P18 : Interrupt Mode Bit 0
bits : 18 - 18 (1 bit)

P19 : Interrupt Mode Bit 0
bits : 19 - 19 (1 bit)

P20 : Interrupt Mode Bit 0
bits : 20 - 20 (1 bit)

P21 : Interrupt Mode Bit 0
bits : 21 - 21 (1 bit)

P22 : Interrupt Mode Bit 0
bits : 22 - 22 (1 bit)

P23 : Interrupt Mode Bit 0
bits : 23 - 23 (1 bit)

P24 : Interrupt Mode Bit 0
bits : 24 - 24 (1 bit)

P25 : Interrupt Mode Bit 0
bits : 25 - 25 (1 bit)

P26 : Interrupt Mode Bit 0
bits : 26 - 26 (1 bit)

P27 : Interrupt Mode Bit 0
bits : 27 - 27 (1 bit)

P28 : Interrupt Mode Bit 0
bits : 28 - 28 (1 bit)

P29 : Interrupt Mode Bit 0
bits : 29 - 29 (1 bit)

P30 : Interrupt Mode Bit 0
bits : 30 - 30 (1 bit)

P31 : Interrupt Mode Bit 0
bits : 31 - 31 (1 bit)


IMR0S1

Interrupt Mode Register 0 - Set
address_offset : 0x3EC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IMR0S1 IMR0S1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 0
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Mode Bit 0
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Mode Bit 0
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Mode Bit 0
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Mode Bit 0
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Mode Bit 0
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Mode Bit 0
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Mode Bit 0
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Mode Bit 0
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Mode Bit 0
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Mode Bit 0
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Mode Bit 0
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Mode Bit 0
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Mode Bit 0
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Mode Bit 0
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Mode Bit 0
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Mode Bit 0
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Mode Bit 0
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Mode Bit 0
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Mode Bit 0
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Mode Bit 0
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Mode Bit 0
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Mode Bit 0
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Mode Bit 0
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Mode Bit 0
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Mode Bit 0
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Mode Bit 0
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Mode Bit 0
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Mode Bit 0
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Mode Bit 0
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Mode Bit 0
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Mode Bit 0
bits : 31 - 31 (1 bit)
access : write-only


PARAMETER0

Parameter Register
address_offset : 0x3F0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PARAMETER0 PARAMETER0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PARAMETER

PARAMETER : Parameter
bits : 0 - 31 (32 bit)


IMR0C1

Interrupt Mode Register 0 - Clear
address_offset : 0x3F8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IMR0C1 IMR0C1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 0
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Mode Bit 0
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Mode Bit 0
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Mode Bit 0
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Mode Bit 0
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Mode Bit 0
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Mode Bit 0
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Mode Bit 0
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Mode Bit 0
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Mode Bit 0
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Mode Bit 0
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Mode Bit 0
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Mode Bit 0
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Mode Bit 0
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Mode Bit 0
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Mode Bit 0
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Mode Bit 0
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Mode Bit 0
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Mode Bit 0
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Mode Bit 0
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Mode Bit 0
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Mode Bit 0
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Mode Bit 0
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Mode Bit 0
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Mode Bit 0
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Mode Bit 0
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Mode Bit 0
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Mode Bit 0
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Mode Bit 0
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Mode Bit 0
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Mode Bit 0
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Mode Bit 0
bits : 31 - 31 (1 bit)
access : write-only


VERSION0

Version Register
address_offset : 0x3F8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

VERSION0 VERSION0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VERSION VARIANT

VERSION : Version Number
bits : 0 - 11 (12 bit)
access : read-only

VARIANT : Variant Number
bits : 16 - 19 (4 bit)
access : read-only


PMR10

Peripheral Mux Register 1
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMR10 PMR10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 1
bits : 0 - 0 (1 bit)

P1 : Peripheral Multiplexer Select bit 1
bits : 1 - 1 (1 bit)

P2 : Peripheral Multiplexer Select bit 1
bits : 2 - 2 (1 bit)

P3 : Peripheral Multiplexer Select bit 1
bits : 3 - 3 (1 bit)

P4 : Peripheral Multiplexer Select bit 1
bits : 4 - 4 (1 bit)

P5 : Peripheral Multiplexer Select bit 1
bits : 5 - 5 (1 bit)

P6 : Peripheral Multiplexer Select bit 1
bits : 6 - 6 (1 bit)

P7 : Peripheral Multiplexer Select bit 1
bits : 7 - 7 (1 bit)

P8 : Peripheral Multiplexer Select bit 1
bits : 8 - 8 (1 bit)

P9 : Peripheral Multiplexer Select bit 1
bits : 9 - 9 (1 bit)

P10 : Peripheral Multiplexer Select bit 1
bits : 10 - 10 (1 bit)

P11 : Peripheral Multiplexer Select bit 1
bits : 11 - 11 (1 bit)

P12 : Peripheral Multiplexer Select bit 1
bits : 12 - 12 (1 bit)

P13 : Peripheral Multiplexer Select bit 1
bits : 13 - 13 (1 bit)

P14 : Peripheral Multiplexer Select bit 1
bits : 14 - 14 (1 bit)

P15 : Peripheral Multiplexer Select bit 1
bits : 15 - 15 (1 bit)

P16 : Peripheral Multiplexer Select bit 1
bits : 16 - 16 (1 bit)

P17 : Peripheral Multiplexer Select bit 1
bits : 17 - 17 (1 bit)

P18 : Peripheral Multiplexer Select bit 1
bits : 18 - 18 (1 bit)

P19 : Peripheral Multiplexer Select bit 1
bits : 19 - 19 (1 bit)

P20 : Peripheral Multiplexer Select bit 1
bits : 20 - 20 (1 bit)

P21 : Peripheral Multiplexer Select bit 1
bits : 21 - 21 (1 bit)

P22 : Peripheral Multiplexer Select bit 1
bits : 22 - 22 (1 bit)

P23 : Peripheral Multiplexer Select bit 1
bits : 23 - 23 (1 bit)

P24 : Peripheral Multiplexer Select bit 1
bits : 24 - 24 (1 bit)

P25 : Peripheral Multiplexer Select bit 1
bits : 25 - 25 (1 bit)

P26 : Peripheral Multiplexer Select bit 1
bits : 26 - 26 (1 bit)

P27 : Peripheral Multiplexer Select bit 1
bits : 27 - 27 (1 bit)

P28 : Peripheral Multiplexer Select bit 1
bits : 28 - 28 (1 bit)

P29 : Peripheral Multiplexer Select bit 1
bits : 29 - 29 (1 bit)

P30 : Peripheral Multiplexer Select bit 1
bits : 30 - 30 (1 bit)

P31 : Peripheral Multiplexer Select bit 1
bits : 31 - 31 (1 bit)


IMR0T1

Interrupt Mode Register 0 - Toggle
address_offset : 0x404 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IMR0T1 IMR0T1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 0
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Mode Bit 0
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Mode Bit 0
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Mode Bit 0
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Mode Bit 0
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Mode Bit 0
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Mode Bit 0
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Mode Bit 0
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Mode Bit 0
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Mode Bit 0
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Mode Bit 0
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Mode Bit 0
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Mode Bit 0
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Mode Bit 0
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Mode Bit 0
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Mode Bit 0
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Mode Bit 0
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Mode Bit 0
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Mode Bit 0
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Mode Bit 0
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Mode Bit 0
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Mode Bit 0
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Mode Bit 0
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Mode Bit 0
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Mode Bit 0
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Mode Bit 0
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Mode Bit 0
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Mode Bit 0
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Mode Bit 0
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Mode Bit 0
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Mode Bit 0
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Mode Bit 0
bits : 31 - 31 (1 bit)
access : write-only


IMR11

Interrupt Mode Register 1
address_offset : 0x410 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMR11 IMR11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 1
bits : 0 - 0 (1 bit)

P1 : Interrupt Mode Bit 1
bits : 1 - 1 (1 bit)

P2 : Interrupt Mode Bit 1
bits : 2 - 2 (1 bit)

P3 : Interrupt Mode Bit 1
bits : 3 - 3 (1 bit)

P4 : Interrupt Mode Bit 1
bits : 4 - 4 (1 bit)

P5 : Interrupt Mode Bit 1
bits : 5 - 5 (1 bit)

P6 : Interrupt Mode Bit 1
bits : 6 - 6 (1 bit)

P7 : Interrupt Mode Bit 1
bits : 7 - 7 (1 bit)

P8 : Interrupt Mode Bit 1
bits : 8 - 8 (1 bit)

P9 : Interrupt Mode Bit 1
bits : 9 - 9 (1 bit)

P10 : Interrupt Mode Bit 1
bits : 10 - 10 (1 bit)

P11 : Interrupt Mode Bit 1
bits : 11 - 11 (1 bit)

P12 : Interrupt Mode Bit 1
bits : 12 - 12 (1 bit)

P13 : Interrupt Mode Bit 1
bits : 13 - 13 (1 bit)

P14 : Interrupt Mode Bit 1
bits : 14 - 14 (1 bit)

P15 : Interrupt Mode Bit 1
bits : 15 - 15 (1 bit)

P16 : Interrupt Mode Bit 1
bits : 16 - 16 (1 bit)

P17 : Interrupt Mode Bit 1
bits : 17 - 17 (1 bit)

P18 : Interrupt Mode Bit 1
bits : 18 - 18 (1 bit)

P19 : Interrupt Mode Bit 1
bits : 19 - 19 (1 bit)

P20 : Interrupt Mode Bit 1
bits : 20 - 20 (1 bit)

P21 : Interrupt Mode Bit 1
bits : 21 - 21 (1 bit)

P22 : Interrupt Mode Bit 1
bits : 22 - 22 (1 bit)

P23 : Interrupt Mode Bit 1
bits : 23 - 23 (1 bit)

P24 : Interrupt Mode Bit 1
bits : 24 - 24 (1 bit)

P25 : Interrupt Mode Bit 1
bits : 25 - 25 (1 bit)

P26 : Interrupt Mode Bit 1
bits : 26 - 26 (1 bit)

P27 : Interrupt Mode Bit 1
bits : 27 - 27 (1 bit)

P28 : Interrupt Mode Bit 1
bits : 28 - 28 (1 bit)

P29 : Interrupt Mode Bit 1
bits : 29 - 29 (1 bit)

P30 : Interrupt Mode Bit 1
bits : 30 - 30 (1 bit)

P31 : Interrupt Mode Bit 1
bits : 31 - 31 (1 bit)


IMR1S1

Interrupt Mode Register 1 - Set
address_offset : 0x41C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IMR1S1 IMR1S1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 1
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Mode Bit 1
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Mode Bit 1
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Mode Bit 1
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Mode Bit 1
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Mode Bit 1
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Mode Bit 1
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Mode Bit 1
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Mode Bit 1
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Mode Bit 1
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Mode Bit 1
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Mode Bit 1
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Mode Bit 1
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Mode Bit 1
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Mode Bit 1
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Mode Bit 1
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Mode Bit 1
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Mode Bit 1
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Mode Bit 1
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Mode Bit 1
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Mode Bit 1
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Mode Bit 1
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Mode Bit 1
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Mode Bit 1
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Mode Bit 1
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Mode Bit 1
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Mode Bit 1
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Mode Bit 1
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Mode Bit 1
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Mode Bit 1
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Mode Bit 1
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Mode Bit 1
bits : 31 - 31 (1 bit)
access : write-only


IMR1C1

Interrupt Mode Register 1 - Clear
address_offset : 0x428 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IMR1C1 IMR1C1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 1
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Mode Bit 1
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Mode Bit 1
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Mode Bit 1
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Mode Bit 1
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Mode Bit 1
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Mode Bit 1
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Mode Bit 1
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Mode Bit 1
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Mode Bit 1
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Mode Bit 1
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Mode Bit 1
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Mode Bit 1
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Mode Bit 1
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Mode Bit 1
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Mode Bit 1
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Mode Bit 1
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Mode Bit 1
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Mode Bit 1
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Mode Bit 1
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Mode Bit 1
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Mode Bit 1
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Mode Bit 1
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Mode Bit 1
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Mode Bit 1
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Mode Bit 1
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Mode Bit 1
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Mode Bit 1
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Mode Bit 1
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Mode Bit 1
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Mode Bit 1
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Mode Bit 1
bits : 31 - 31 (1 bit)
access : write-only


IMR1T1

Interrupt Mode Register 1 - Toggle
address_offset : 0x434 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IMR1T1 IMR1T1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 1
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Mode Bit 1
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Mode Bit 1
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Mode Bit 1
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Mode Bit 1
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Mode Bit 1
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Mode Bit 1
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Mode Bit 1
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Mode Bit 1
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Mode Bit 1
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Mode Bit 1
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Mode Bit 1
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Mode Bit 1
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Mode Bit 1
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Mode Bit 1
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Mode Bit 1
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Mode Bit 1
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Mode Bit 1
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Mode Bit 1
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Mode Bit 1
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Mode Bit 1
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Mode Bit 1
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Mode Bit 1
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Mode Bit 1
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Mode Bit 1
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Mode Bit 1
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Mode Bit 1
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Mode Bit 1
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Mode Bit 1
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Mode Bit 1
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Mode Bit 1
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Mode Bit 1
bits : 31 - 31 (1 bit)
access : write-only


GFER1

Glitch Filter Enable Register
address_offset : 0x440 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GFER1 GFER1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Glitch Filter Enable
bits : 0 - 0 (1 bit)

P1 : Glitch Filter Enable
bits : 1 - 1 (1 bit)

P2 : Glitch Filter Enable
bits : 2 - 2 (1 bit)

P3 : Glitch Filter Enable
bits : 3 - 3 (1 bit)

P4 : Glitch Filter Enable
bits : 4 - 4 (1 bit)

P5 : Glitch Filter Enable
bits : 5 - 5 (1 bit)

P6 : Glitch Filter Enable
bits : 6 - 6 (1 bit)

P7 : Glitch Filter Enable
bits : 7 - 7 (1 bit)

P8 : Glitch Filter Enable
bits : 8 - 8 (1 bit)

P9 : Glitch Filter Enable
bits : 9 - 9 (1 bit)

P10 : Glitch Filter Enable
bits : 10 - 10 (1 bit)

P11 : Glitch Filter Enable
bits : 11 - 11 (1 bit)

P12 : Glitch Filter Enable
bits : 12 - 12 (1 bit)

P13 : Glitch Filter Enable
bits : 13 - 13 (1 bit)

P14 : Glitch Filter Enable
bits : 14 - 14 (1 bit)

P15 : Glitch Filter Enable
bits : 15 - 15 (1 bit)

P16 : Glitch Filter Enable
bits : 16 - 16 (1 bit)

P17 : Glitch Filter Enable
bits : 17 - 17 (1 bit)

P18 : Glitch Filter Enable
bits : 18 - 18 (1 bit)

P19 : Glitch Filter Enable
bits : 19 - 19 (1 bit)

P20 : Glitch Filter Enable
bits : 20 - 20 (1 bit)

P21 : Glitch Filter Enable
bits : 21 - 21 (1 bit)

P22 : Glitch Filter Enable
bits : 22 - 22 (1 bit)

P23 : Glitch Filter Enable
bits : 23 - 23 (1 bit)

P24 : Glitch Filter Enable
bits : 24 - 24 (1 bit)

P25 : Glitch Filter Enable
bits : 25 - 25 (1 bit)

P26 : Glitch Filter Enable
bits : 26 - 26 (1 bit)

P27 : Glitch Filter Enable
bits : 27 - 27 (1 bit)

P28 : Glitch Filter Enable
bits : 28 - 28 (1 bit)

P29 : Glitch Filter Enable
bits : 29 - 29 (1 bit)

P30 : Glitch Filter Enable
bits : 30 - 30 (1 bit)

P31 : Glitch Filter Enable
bits : 31 - 31 (1 bit)


GFERS1

Glitch Filter Enable Register - Set
address_offset : 0x44C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GFERS1 GFERS1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Glitch Filter Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Glitch Filter Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Glitch Filter Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Glitch Filter Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Glitch Filter Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Glitch Filter Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Glitch Filter Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Glitch Filter Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Glitch Filter Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Glitch Filter Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Glitch Filter Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Glitch Filter Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Glitch Filter Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Glitch Filter Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Glitch Filter Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Glitch Filter Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Glitch Filter Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Glitch Filter Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Glitch Filter Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Glitch Filter Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Glitch Filter Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Glitch Filter Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Glitch Filter Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Glitch Filter Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Glitch Filter Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Glitch Filter Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Glitch Filter Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Glitch Filter Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Glitch Filter Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Glitch Filter Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Glitch Filter Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Glitch Filter Enable
bits : 31 - 31 (1 bit)
access : write-only


GFERC1

Glitch Filter Enable Register - Clear
address_offset : 0x458 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GFERC1 GFERC1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Glitch Filter Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Glitch Filter Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Glitch Filter Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Glitch Filter Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Glitch Filter Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Glitch Filter Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Glitch Filter Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Glitch Filter Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Glitch Filter Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Glitch Filter Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Glitch Filter Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Glitch Filter Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Glitch Filter Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Glitch Filter Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Glitch Filter Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Glitch Filter Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Glitch Filter Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Glitch Filter Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Glitch Filter Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Glitch Filter Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Glitch Filter Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Glitch Filter Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Glitch Filter Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Glitch Filter Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Glitch Filter Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Glitch Filter Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Glitch Filter Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Glitch Filter Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Glitch Filter Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Glitch Filter Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Glitch Filter Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Glitch Filter Enable
bits : 31 - 31 (1 bit)
access : write-only


GFERT1

Glitch Filter Enable Register - Toggle
address_offset : 0x464 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GFERT1 GFERT1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Glitch Filter Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Glitch Filter Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Glitch Filter Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Glitch Filter Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Glitch Filter Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Glitch Filter Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Glitch Filter Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Glitch Filter Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Glitch Filter Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Glitch Filter Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Glitch Filter Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Glitch Filter Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Glitch Filter Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Glitch Filter Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Glitch Filter Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Glitch Filter Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Glitch Filter Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Glitch Filter Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Glitch Filter Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Glitch Filter Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Glitch Filter Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Glitch Filter Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Glitch Filter Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Glitch Filter Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Glitch Filter Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Glitch Filter Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Glitch Filter Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Glitch Filter Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Glitch Filter Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Glitch Filter Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Glitch Filter Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Glitch Filter Enable
bits : 31 - 31 (1 bit)
access : write-only


IFR1

Interrupt Flag Register
address_offset : 0x470 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IFR1 IFR1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Flag
bits : 0 - 0 (1 bit)
access : read-only

P1 : Interrupt Flag
bits : 1 - 1 (1 bit)
access : read-only

P2 : Interrupt Flag
bits : 2 - 2 (1 bit)
access : read-only

P3 : Interrupt Flag
bits : 3 - 3 (1 bit)
access : read-only

P4 : Interrupt Flag
bits : 4 - 4 (1 bit)
access : read-only

P5 : Interrupt Flag
bits : 5 - 5 (1 bit)
access : read-only

P6 : Interrupt Flag
bits : 6 - 6 (1 bit)
access : read-only

P7 : Interrupt Flag
bits : 7 - 7 (1 bit)
access : read-only

P8 : Interrupt Flag
bits : 8 - 8 (1 bit)
access : read-only

P9 : Interrupt Flag
bits : 9 - 9 (1 bit)
access : read-only

P10 : Interrupt Flag
bits : 10 - 10 (1 bit)
access : read-only

P11 : Interrupt Flag
bits : 11 - 11 (1 bit)
access : read-only

P12 : Interrupt Flag
bits : 12 - 12 (1 bit)
access : read-only

P13 : Interrupt Flag
bits : 13 - 13 (1 bit)
access : read-only

P14 : Interrupt Flag
bits : 14 - 14 (1 bit)
access : read-only

P15 : Interrupt Flag
bits : 15 - 15 (1 bit)
access : read-only

P16 : Interrupt Flag
bits : 16 - 16 (1 bit)
access : read-only

P17 : Interrupt Flag
bits : 17 - 17 (1 bit)
access : read-only

P18 : Interrupt Flag
bits : 18 - 18 (1 bit)
access : read-only

P19 : Interrupt Flag
bits : 19 - 19 (1 bit)
access : read-only

P20 : Interrupt Flag
bits : 20 - 20 (1 bit)
access : read-only

P21 : Interrupt Flag
bits : 21 - 21 (1 bit)
access : read-only

P22 : Interrupt Flag
bits : 22 - 22 (1 bit)
access : read-only

P23 : Interrupt Flag
bits : 23 - 23 (1 bit)
access : read-only

P24 : Interrupt Flag
bits : 24 - 24 (1 bit)
access : read-only

P25 : Interrupt Flag
bits : 25 - 25 (1 bit)
access : read-only

P26 : Interrupt Flag
bits : 26 - 26 (1 bit)
access : read-only

P27 : Interrupt Flag
bits : 27 - 27 (1 bit)
access : read-only

P28 : Interrupt Flag
bits : 28 - 28 (1 bit)
access : read-only

P29 : Interrupt Flag
bits : 29 - 29 (1 bit)
access : read-only

P30 : Interrupt Flag
bits : 30 - 30 (1 bit)
access : read-only

P31 : Interrupt Flag
bits : 31 - 31 (1 bit)
access : read-only


PMR1S0

Peripheral Mux Register 1 - Set
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR1S0 PMR1S0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 1
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 1
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 1
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 1
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 1
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 1
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 1
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 1
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 1
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 1
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 1
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 1
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 1
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 1
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 1
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 1
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 1
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 1
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 1
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 1
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 1
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 1
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 1
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 1
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 1
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 1
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 1
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 1
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 1
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 1
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 1
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 1
bits : 31 - 31 (1 bit)
access : write-only


IFRC1

Interrupt Flag Register - Clear
address_offset : 0x488 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IFRC1 IFRC1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Flag
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Flag
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Flag
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Flag
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Flag
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Flag
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Flag
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Flag
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Flag
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Flag
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Flag
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Flag
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Flag
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Flag
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Flag
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Flag
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Flag
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Flag
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Flag
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Flag
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Flag
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Flag
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Flag
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Flag
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Flag
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Flag
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Flag
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Flag
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Flag
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Flag
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Flag
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Flag
bits : 31 - 31 (1 bit)
access : write-only


ODMER1

Open Drain Mode Register
address_offset : 0x4A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODMER1 ODMER1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Open Drain Mode Enable
bits : 0 - 0 (1 bit)

P1 : Open Drain Mode Enable
bits : 1 - 1 (1 bit)

P2 : Open Drain Mode Enable
bits : 2 - 2 (1 bit)

P3 : Open Drain Mode Enable
bits : 3 - 3 (1 bit)

P4 : Open Drain Mode Enable
bits : 4 - 4 (1 bit)

P5 : Open Drain Mode Enable
bits : 5 - 5 (1 bit)

P6 : Open Drain Mode Enable
bits : 6 - 6 (1 bit)

P7 : Open Drain Mode Enable
bits : 7 - 7 (1 bit)

P8 : Open Drain Mode Enable
bits : 8 - 8 (1 bit)

P9 : Open Drain Mode Enable
bits : 9 - 9 (1 bit)

P10 : Open Drain Mode Enable
bits : 10 - 10 (1 bit)

P11 : Open Drain Mode Enable
bits : 11 - 11 (1 bit)

P12 : Open Drain Mode Enable
bits : 12 - 12 (1 bit)

P13 : Open Drain Mode Enable
bits : 13 - 13 (1 bit)

P14 : Open Drain Mode Enable
bits : 14 - 14 (1 bit)

P15 : Open Drain Mode Enable
bits : 15 - 15 (1 bit)

P16 : Open Drain Mode Enable
bits : 16 - 16 (1 bit)

P17 : Open Drain Mode Enable
bits : 17 - 17 (1 bit)

P18 : Open Drain Mode Enable
bits : 18 - 18 (1 bit)

P19 : Open Drain Mode Enable
bits : 19 - 19 (1 bit)

P20 : Open Drain Mode Enable
bits : 20 - 20 (1 bit)

P21 : Open Drain Mode Enable
bits : 21 - 21 (1 bit)

P22 : Open Drain Mode Enable
bits : 22 - 22 (1 bit)

P23 : Open Drain Mode Enable
bits : 23 - 23 (1 bit)

P24 : Open Drain Mode Enable
bits : 24 - 24 (1 bit)

P25 : Open Drain Mode Enable
bits : 25 - 25 (1 bit)

P26 : Open Drain Mode Enable
bits : 26 - 26 (1 bit)

P27 : Open Drain Mode Enable
bits : 27 - 27 (1 bit)

P28 : Open Drain Mode Enable
bits : 28 - 28 (1 bit)

P29 : Open Drain Mode Enable
bits : 29 - 29 (1 bit)

P30 : Open Drain Mode Enable
bits : 30 - 30 (1 bit)

P31 : Open Drain Mode Enable
bits : 31 - 31 (1 bit)


ODMERS1

Open Drain Mode Register - Set
address_offset : 0x4AC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ODMERS1 ODMERS1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Open Drain Mode Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Open Drain Mode Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Open Drain Mode Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Open Drain Mode Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Open Drain Mode Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Open Drain Mode Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Open Drain Mode Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Open Drain Mode Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Open Drain Mode Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Open Drain Mode Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Open Drain Mode Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Open Drain Mode Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Open Drain Mode Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Open Drain Mode Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Open Drain Mode Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Open Drain Mode Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Open Drain Mode Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Open Drain Mode Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Open Drain Mode Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Open Drain Mode Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Open Drain Mode Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Open Drain Mode Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Open Drain Mode Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Open Drain Mode Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Open Drain Mode Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Open Drain Mode Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Open Drain Mode Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Open Drain Mode Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Open Drain Mode Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Open Drain Mode Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Open Drain Mode Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Open Drain Mode Enable
bits : 31 - 31 (1 bit)
access : write-only


ODMERC1

Open Drain Mode Register - Clear
address_offset : 0x4B8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ODMERC1 ODMERC1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Open Drain Mode Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Open Drain Mode Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Open Drain Mode Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Open Drain Mode Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Open Drain Mode Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Open Drain Mode Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Open Drain Mode Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Open Drain Mode Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Open Drain Mode Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Open Drain Mode Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Open Drain Mode Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Open Drain Mode Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Open Drain Mode Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Open Drain Mode Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Open Drain Mode Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Open Drain Mode Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Open Drain Mode Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Open Drain Mode Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Open Drain Mode Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Open Drain Mode Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Open Drain Mode Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Open Drain Mode Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Open Drain Mode Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Open Drain Mode Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Open Drain Mode Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Open Drain Mode Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Open Drain Mode Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Open Drain Mode Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Open Drain Mode Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Open Drain Mode Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Open Drain Mode Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Open Drain Mode Enable
bits : 31 - 31 (1 bit)
access : write-only


ODMERT1

Open Drain Mode Register - Toggle
address_offset : 0x4C4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ODMERT1 ODMERT1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Open Drain Mode Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Open Drain Mode Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Open Drain Mode Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Open Drain Mode Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Open Drain Mode Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Open Drain Mode Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Open Drain Mode Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Open Drain Mode Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Open Drain Mode Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Open Drain Mode Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Open Drain Mode Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Open Drain Mode Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Open Drain Mode Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Open Drain Mode Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Open Drain Mode Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Open Drain Mode Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Open Drain Mode Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Open Drain Mode Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Open Drain Mode Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Open Drain Mode Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Open Drain Mode Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Open Drain Mode Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Open Drain Mode Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Open Drain Mode Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Open Drain Mode Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Open Drain Mode Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Open Drain Mode Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Open Drain Mode Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Open Drain Mode Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Open Drain Mode Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Open Drain Mode Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Open Drain Mode Enable
bits : 31 - 31 (1 bit)
access : write-only


PMR1C0

Peripheral Mux Register 1 - Clear
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR1C0 PMR1C0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 1
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 1
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 1
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 1
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 1
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 1
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 1
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 1
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 1
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 1
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 1
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 1
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 1
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 1
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 1
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 1
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 1
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 1
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 1
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 1
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 1
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 1
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 1
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 1
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 1
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 1
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 1
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 1
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 1
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 1
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 1
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 1
bits : 31 - 31 (1 bit)
access : write-only


ODCR01

Output Driving Capability Register 0
address_offset : 0x500 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR01 ODCR01 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 0
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 0
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 0
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 0
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 0
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 0
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 0
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 0
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 0
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 0
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 0
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 0
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 0
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 0
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 0
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 0
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 0
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 0
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 0
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 0
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 0
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 0
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 0
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 0
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 0
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 0
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 0
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 0
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 0
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 0
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 0
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 0
bits : 31 - 31 (1 bit)


ODCR0S1

Output Driving Capability Register 0 - Set
address_offset : 0x50C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR0S1 ODCR0S1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 0
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 0
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 0
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 0
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 0
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 0
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 0
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 0
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 0
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 0
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 0
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 0
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 0
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 0
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 0
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 0
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 0
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 0
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 0
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 0
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 0
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 0
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 0
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 0
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 0
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 0
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 0
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 0
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 0
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 0
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 0
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 0
bits : 31 - 31 (1 bit)


ODCR0C1

Output Driving Capability Register 0 - Clear
address_offset : 0x518 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR0C1 ODCR0C1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 0
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 0
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 0
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 0
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 0
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 0
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 0
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 0
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 0
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 0
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 0
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 0
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 0
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 0
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 0
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 0
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 0
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 0
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 0
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 0
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 0
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 0
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 0
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 0
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 0
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 0
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 0
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 0
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 0
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 0
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 0
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 0
bits : 31 - 31 (1 bit)


ODCR0T1

Output Driving Capability Register 0 - Toggle
address_offset : 0x524 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR0T1 ODCR0T1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 0
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 0
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 0
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 0
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 0
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 0
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 0
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 0
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 0
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 0
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 0
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 0
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 0
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 0
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 0
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 0
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 0
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 0
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 0
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 0
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 0
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 0
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 0
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 0
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 0
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 0
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 0
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 0
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 0
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 0
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 0
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 0
bits : 31 - 31 (1 bit)


ODCR11

Output Driving Capability Register 1
address_offset : 0x530 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR11 ODCR11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 1
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 1
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 1
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 1
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 1
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 1
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 1
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 1
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 1
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 1
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 1
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 1
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 1
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 1
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 1
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 1
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 1
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 1
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 1
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 1
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 1
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 1
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 1
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 1
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 1
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 1
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 1
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 1
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 1
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 1
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 1
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 1
bits : 31 - 31 (1 bit)


ODCR1S1

Output Driving Capability Register 1 - Set
address_offset : 0x53C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR1S1 ODCR1S1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 1
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 1
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 1
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 1
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 1
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 1
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 1
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 1
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 1
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 1
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 1
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 1
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 1
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 1
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 1
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 1
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 1
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 1
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 1
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 1
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 1
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 1
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 1
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 1
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 1
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 1
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 1
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 1
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 1
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 1
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 1
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 1
bits : 31 - 31 (1 bit)


ODCR1C1

Output Driving Capability Register 1 - Clear
address_offset : 0x548 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR1C1 ODCR1C1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 1
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 1
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 1
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 1
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 1
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 1
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 1
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 1
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 1
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 1
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 1
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 1
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 1
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 1
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 1
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 1
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 1
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 1
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 1
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 1
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 1
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 1
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 1
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 1
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 1
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 1
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 1
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 1
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 1
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 1
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 1
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 1
bits : 31 - 31 (1 bit)


ODCR1T1

Output Driving Capability Register 1 - Toggle
address_offset : 0x554 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR1T1 ODCR1T1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 1
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 1
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 1
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 1
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 1
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 1
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 1
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 1
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 1
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 1
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 1
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 1
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 1
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 1
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 1
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 1
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 1
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 1
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 1
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 1
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 1
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 1
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 1
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 1
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 1
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 1
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 1
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 1
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 1
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 1
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 1
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 1
bits : 31 - 31 (1 bit)


PMR1T0

Peripheral Mux Register 1 - Toggle
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR1T0 PMR1T0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 1
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 1
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 1
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 1
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 1
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 1
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 1
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 1
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 1
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 1
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 1
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 1
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 1
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 1
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 1
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 1
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 1
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 1
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 1
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 1
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 1
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 1
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 1
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 1
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 1
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 1
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 1
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 1
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 1
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 1
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 1
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 1
bits : 31 - 31 (1 bit)
access : write-only


OSRR01

Output Slew Rate Register 0
address_offset : 0x590 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSRR01 OSRR01 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Slew Rate Control Enable
bits : 0 - 0 (1 bit)

P1 : Output Slew Rate Control Enable
bits : 1 - 1 (1 bit)

P2 : Output Slew Rate Control Enable
bits : 2 - 2 (1 bit)

P3 : Output Slew Rate Control Enable
bits : 3 - 3 (1 bit)

P4 : Output Slew Rate Control Enable
bits : 4 - 4 (1 bit)

P5 : Output Slew Rate Control Enable
bits : 5 - 5 (1 bit)

P6 : Output Slew Rate Control Enable
bits : 6 - 6 (1 bit)

P7 : Output Slew Rate Control Enable
bits : 7 - 7 (1 bit)

P8 : Output Slew Rate Control Enable
bits : 8 - 8 (1 bit)

P9 : Output Slew Rate Control Enable
bits : 9 - 9 (1 bit)

P10 : Output Slew Rate Control Enable
bits : 10 - 10 (1 bit)

P11 : Output Slew Rate Control Enable
bits : 11 - 11 (1 bit)

P12 : Output Slew Rate Control Enable
bits : 12 - 12 (1 bit)

P13 : Output Slew Rate Control Enable
bits : 13 - 13 (1 bit)

P14 : Output Slew Rate Control Enable
bits : 14 - 14 (1 bit)

P15 : Output Slew Rate Control Enable
bits : 15 - 15 (1 bit)

P16 : Output Slew Rate Control Enable
bits : 16 - 16 (1 bit)

P17 : Output Slew Rate Control Enable
bits : 17 - 17 (1 bit)

P18 : Output Slew Rate Control Enable
bits : 18 - 18 (1 bit)

P19 : Output Slew Rate Control Enable
bits : 19 - 19 (1 bit)

P20 : Output Slew Rate Control Enable
bits : 20 - 20 (1 bit)

P21 : Output Slew Rate Control Enable
bits : 21 - 21 (1 bit)

P22 : Output Slew Rate Control Enable
bits : 22 - 22 (1 bit)

P23 : Output Slew Rate Control Enable
bits : 23 - 23 (1 bit)

P24 : Output Slew Rate Control Enable
bits : 24 - 24 (1 bit)

P25 : Output Slew Rate Control Enable
bits : 25 - 25 (1 bit)

P26 : Output Slew Rate Control Enable
bits : 26 - 26 (1 bit)

P27 : Output Slew Rate Control Enable
bits : 27 - 27 (1 bit)

P28 : Output Slew Rate Control Enable
bits : 28 - 28 (1 bit)

P29 : Output Slew Rate Control Enable
bits : 29 - 29 (1 bit)

P30 : Output Slew Rate Control Enable
bits : 30 - 30 (1 bit)

P31 : Output Slew Rate Control Enable
bits : 31 - 31 (1 bit)


OSRR0S1

Output Slew Rate Register 0 - Set
address_offset : 0x59C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSRR0S1 OSRR0S1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Slew Rate Control Enable
bits : 0 - 0 (1 bit)

P1 : Output Slew Rate Control Enable
bits : 1 - 1 (1 bit)

P2 : Output Slew Rate Control Enable
bits : 2 - 2 (1 bit)

P3 : Output Slew Rate Control Enable
bits : 3 - 3 (1 bit)

P4 : Output Slew Rate Control Enable
bits : 4 - 4 (1 bit)

P5 : Output Slew Rate Control Enable
bits : 5 - 5 (1 bit)

P6 : Output Slew Rate Control Enable
bits : 6 - 6 (1 bit)

P7 : Output Slew Rate Control Enable
bits : 7 - 7 (1 bit)

P8 : Output Slew Rate Control Enable
bits : 8 - 8 (1 bit)

P9 : Output Slew Rate Control Enable
bits : 9 - 9 (1 bit)

P10 : Output Slew Rate Control Enable
bits : 10 - 10 (1 bit)

P11 : Output Slew Rate Control Enable
bits : 11 - 11 (1 bit)

P12 : Output Slew Rate Control Enable
bits : 12 - 12 (1 bit)

P13 : Output Slew Rate Control Enable
bits : 13 - 13 (1 bit)

P14 : Output Slew Rate Control Enable
bits : 14 - 14 (1 bit)

P15 : Output Slew Rate Control Enable
bits : 15 - 15 (1 bit)

P16 : Output Slew Rate Control Enable
bits : 16 - 16 (1 bit)

P17 : Output Slew Rate Control Enable
bits : 17 - 17 (1 bit)

P18 : Output Slew Rate Control Enable
bits : 18 - 18 (1 bit)

P19 : Output Slew Rate Control Enable
bits : 19 - 19 (1 bit)

P20 : Output Slew Rate Control Enable
bits : 20 - 20 (1 bit)

P21 : Output Slew Rate Control Enable
bits : 21 - 21 (1 bit)

P22 : Output Slew Rate Control Enable
bits : 22 - 22 (1 bit)

P23 : Output Slew Rate Control Enable
bits : 23 - 23 (1 bit)

P24 : Output Slew Rate Control Enable
bits : 24 - 24 (1 bit)

P25 : Output Slew Rate Control Enable
bits : 25 - 25 (1 bit)

P26 : Output Slew Rate Control Enable
bits : 26 - 26 (1 bit)

P27 : Output Slew Rate Control Enable
bits : 27 - 27 (1 bit)

P28 : Output Slew Rate Control Enable
bits : 28 - 28 (1 bit)

P29 : Output Slew Rate Control Enable
bits : 29 - 29 (1 bit)

P30 : Output Slew Rate Control Enable
bits : 30 - 30 (1 bit)

P31 : Output Slew Rate Control Enable
bits : 31 - 31 (1 bit)


OSRR0C1

Output Slew Rate Register 0 - Clear
address_offset : 0x5A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSRR0C1 OSRR0C1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Slew Rate Control Enable
bits : 0 - 0 (1 bit)

P1 : Output Slew Rate Control Enable
bits : 1 - 1 (1 bit)

P2 : Output Slew Rate Control Enable
bits : 2 - 2 (1 bit)

P3 : Output Slew Rate Control Enable
bits : 3 - 3 (1 bit)

P4 : Output Slew Rate Control Enable
bits : 4 - 4 (1 bit)

P5 : Output Slew Rate Control Enable
bits : 5 - 5 (1 bit)

P6 : Output Slew Rate Control Enable
bits : 6 - 6 (1 bit)

P7 : Output Slew Rate Control Enable
bits : 7 - 7 (1 bit)

P8 : Output Slew Rate Control Enable
bits : 8 - 8 (1 bit)

P9 : Output Slew Rate Control Enable
bits : 9 - 9 (1 bit)

P10 : Output Slew Rate Control Enable
bits : 10 - 10 (1 bit)

P11 : Output Slew Rate Control Enable
bits : 11 - 11 (1 bit)

P12 : Output Slew Rate Control Enable
bits : 12 - 12 (1 bit)

P13 : Output Slew Rate Control Enable
bits : 13 - 13 (1 bit)

P14 : Output Slew Rate Control Enable
bits : 14 - 14 (1 bit)

P15 : Output Slew Rate Control Enable
bits : 15 - 15 (1 bit)

P16 : Output Slew Rate Control Enable
bits : 16 - 16 (1 bit)

P17 : Output Slew Rate Control Enable
bits : 17 - 17 (1 bit)

P18 : Output Slew Rate Control Enable
bits : 18 - 18 (1 bit)

P19 : Output Slew Rate Control Enable
bits : 19 - 19 (1 bit)

P20 : Output Slew Rate Control Enable
bits : 20 - 20 (1 bit)

P21 : Output Slew Rate Control Enable
bits : 21 - 21 (1 bit)

P22 : Output Slew Rate Control Enable
bits : 22 - 22 (1 bit)

P23 : Output Slew Rate Control Enable
bits : 23 - 23 (1 bit)

P24 : Output Slew Rate Control Enable
bits : 24 - 24 (1 bit)

P25 : Output Slew Rate Control Enable
bits : 25 - 25 (1 bit)

P26 : Output Slew Rate Control Enable
bits : 26 - 26 (1 bit)

P27 : Output Slew Rate Control Enable
bits : 27 - 27 (1 bit)

P28 : Output Slew Rate Control Enable
bits : 28 - 28 (1 bit)

P29 : Output Slew Rate Control Enable
bits : 29 - 29 (1 bit)

P30 : Output Slew Rate Control Enable
bits : 30 - 30 (1 bit)

P31 : Output Slew Rate Control Enable
bits : 31 - 31 (1 bit)


OSRR0T1

Output Slew Rate Register 0 - Toggle
address_offset : 0x5B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSRR0T1 OSRR0T1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Slew Rate Control Enable
bits : 0 - 0 (1 bit)

P1 : Output Slew Rate Control Enable
bits : 1 - 1 (1 bit)

P2 : Output Slew Rate Control Enable
bits : 2 - 2 (1 bit)

P3 : Output Slew Rate Control Enable
bits : 3 - 3 (1 bit)

P4 : Output Slew Rate Control Enable
bits : 4 - 4 (1 bit)

P5 : Output Slew Rate Control Enable
bits : 5 - 5 (1 bit)

P6 : Output Slew Rate Control Enable
bits : 6 - 6 (1 bit)

P7 : Output Slew Rate Control Enable
bits : 7 - 7 (1 bit)

P8 : Output Slew Rate Control Enable
bits : 8 - 8 (1 bit)

P9 : Output Slew Rate Control Enable
bits : 9 - 9 (1 bit)

P10 : Output Slew Rate Control Enable
bits : 10 - 10 (1 bit)

P11 : Output Slew Rate Control Enable
bits : 11 - 11 (1 bit)

P12 : Output Slew Rate Control Enable
bits : 12 - 12 (1 bit)

P13 : Output Slew Rate Control Enable
bits : 13 - 13 (1 bit)

P14 : Output Slew Rate Control Enable
bits : 14 - 14 (1 bit)

P15 : Output Slew Rate Control Enable
bits : 15 - 15 (1 bit)

P16 : Output Slew Rate Control Enable
bits : 16 - 16 (1 bit)

P17 : Output Slew Rate Control Enable
bits : 17 - 17 (1 bit)

P18 : Output Slew Rate Control Enable
bits : 18 - 18 (1 bit)

P19 : Output Slew Rate Control Enable
bits : 19 - 19 (1 bit)

P20 : Output Slew Rate Control Enable
bits : 20 - 20 (1 bit)

P21 : Output Slew Rate Control Enable
bits : 21 - 21 (1 bit)

P22 : Output Slew Rate Control Enable
bits : 22 - 22 (1 bit)

P23 : Output Slew Rate Control Enable
bits : 23 - 23 (1 bit)

P24 : Output Slew Rate Control Enable
bits : 24 - 24 (1 bit)

P25 : Output Slew Rate Control Enable
bits : 25 - 25 (1 bit)

P26 : Output Slew Rate Control Enable
bits : 26 - 26 (1 bit)

P27 : Output Slew Rate Control Enable
bits : 27 - 27 (1 bit)

P28 : Output Slew Rate Control Enable
bits : 28 - 28 (1 bit)

P29 : Output Slew Rate Control Enable
bits : 29 - 29 (1 bit)

P30 : Output Slew Rate Control Enable
bits : 30 - 30 (1 bit)

P31 : Output Slew Rate Control Enable
bits : 31 - 31 (1 bit)


PMR20

Peripheral Mux Register 2
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMR20 PMR20 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 2
bits : 0 - 0 (1 bit)

P1 : Peripheral Multiplexer Select bit 2
bits : 1 - 1 (1 bit)

P2 : Peripheral Multiplexer Select bit 2
bits : 2 - 2 (1 bit)

P3 : Peripheral Multiplexer Select bit 2
bits : 3 - 3 (1 bit)

P4 : Peripheral Multiplexer Select bit 2
bits : 4 - 4 (1 bit)

P5 : Peripheral Multiplexer Select bit 2
bits : 5 - 5 (1 bit)

P6 : Peripheral Multiplexer Select bit 2
bits : 6 - 6 (1 bit)

P7 : Peripheral Multiplexer Select bit 2
bits : 7 - 7 (1 bit)

P8 : Peripheral Multiplexer Select bit 2
bits : 8 - 8 (1 bit)

P9 : Peripheral Multiplexer Select bit 2
bits : 9 - 9 (1 bit)

P10 : Peripheral Multiplexer Select bit 2
bits : 10 - 10 (1 bit)

P11 : Peripheral Multiplexer Select bit 2
bits : 11 - 11 (1 bit)

P12 : Peripheral Multiplexer Select bit 2
bits : 12 - 12 (1 bit)

P13 : Peripheral Multiplexer Select bit 2
bits : 13 - 13 (1 bit)

P14 : Peripheral Multiplexer Select bit 2
bits : 14 - 14 (1 bit)

P15 : Peripheral Multiplexer Select bit 2
bits : 15 - 15 (1 bit)

P16 : Peripheral Multiplexer Select bit 2
bits : 16 - 16 (1 bit)

P17 : Peripheral Multiplexer Select bit 2
bits : 17 - 17 (1 bit)

P18 : Peripheral Multiplexer Select bit 2
bits : 18 - 18 (1 bit)

P19 : Peripheral Multiplexer Select bit 2
bits : 19 - 19 (1 bit)

P20 : Peripheral Multiplexer Select bit 2
bits : 20 - 20 (1 bit)

P21 : Peripheral Multiplexer Select bit 2
bits : 21 - 21 (1 bit)

P22 : Peripheral Multiplexer Select bit 2
bits : 22 - 22 (1 bit)

P23 : Peripheral Multiplexer Select bit 2
bits : 23 - 23 (1 bit)

P24 : Peripheral Multiplexer Select bit 2
bits : 24 - 24 (1 bit)

P25 : Peripheral Multiplexer Select bit 2
bits : 25 - 25 (1 bit)

P26 : Peripheral Multiplexer Select bit 2
bits : 26 - 26 (1 bit)

P27 : Peripheral Multiplexer Select bit 2
bits : 27 - 27 (1 bit)

P28 : Peripheral Multiplexer Select bit 2
bits : 28 - 28 (1 bit)

P29 : Peripheral Multiplexer Select bit 2
bits : 29 - 29 (1 bit)

P30 : Peripheral Multiplexer Select bit 2
bits : 30 - 30 (1 bit)

P31 : Peripheral Multiplexer Select bit 2
bits : 31 - 31 (1 bit)


GPER2

GPIO Enable Register
address_offset : 0x600 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPER2 GPER2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : GPIO Enable
bits : 0 - 0 (1 bit)

P1 : GPIO Enable
bits : 1 - 1 (1 bit)

P2 : GPIO Enable
bits : 2 - 2 (1 bit)

P3 : GPIO Enable
bits : 3 - 3 (1 bit)

P4 : GPIO Enable
bits : 4 - 4 (1 bit)

P5 : GPIO Enable
bits : 5 - 5 (1 bit)

P6 : GPIO Enable
bits : 6 - 6 (1 bit)

P7 : GPIO Enable
bits : 7 - 7 (1 bit)

P8 : GPIO Enable
bits : 8 - 8 (1 bit)

P9 : GPIO Enable
bits : 9 - 9 (1 bit)

P10 : GPIO Enable
bits : 10 - 10 (1 bit)

P11 : GPIO Enable
bits : 11 - 11 (1 bit)

P12 : GPIO Enable
bits : 12 - 12 (1 bit)

P13 : GPIO Enable
bits : 13 - 13 (1 bit)

P14 : GPIO Enable
bits : 14 - 14 (1 bit)

P15 : GPIO Enable
bits : 15 - 15 (1 bit)

P16 : GPIO Enable
bits : 16 - 16 (1 bit)

P17 : GPIO Enable
bits : 17 - 17 (1 bit)

P18 : GPIO Enable
bits : 18 - 18 (1 bit)

P19 : GPIO Enable
bits : 19 - 19 (1 bit)

P20 : GPIO Enable
bits : 20 - 20 (1 bit)

P21 : GPIO Enable
bits : 21 - 21 (1 bit)

P22 : GPIO Enable
bits : 22 - 22 (1 bit)

P23 : GPIO Enable
bits : 23 - 23 (1 bit)

P24 : GPIO Enable
bits : 24 - 24 (1 bit)

P25 : GPIO Enable
bits : 25 - 25 (1 bit)

P26 : GPIO Enable
bits : 26 - 26 (1 bit)

P27 : GPIO Enable
bits : 27 - 27 (1 bit)

P28 : GPIO Enable
bits : 28 - 28 (1 bit)

P29 : GPIO Enable
bits : 29 - 29 (1 bit)

P30 : GPIO Enable
bits : 30 - 30 (1 bit)

P31 : GPIO Enable
bits : 31 - 31 (1 bit)


GPERS2

GPIO Enable Register - Set
address_offset : 0x610 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GPERS2 GPERS2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : GPIO Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : GPIO Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : GPIO Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : GPIO Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : GPIO Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : GPIO Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : GPIO Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : GPIO Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : GPIO Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : GPIO Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : GPIO Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : GPIO Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : GPIO Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : GPIO Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : GPIO Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : GPIO Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : GPIO Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : GPIO Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : GPIO Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : GPIO Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : GPIO Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : GPIO Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : GPIO Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : GPIO Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : GPIO Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : GPIO Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : GPIO Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : GPIO Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : GPIO Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : GPIO Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : GPIO Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : GPIO Enable
bits : 31 - 31 (1 bit)
access : write-only


GPERC2

GPIO Enable Register - Clear
address_offset : 0x620 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GPERC2 GPERC2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : GPIO Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : GPIO Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : GPIO Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : GPIO Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : GPIO Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : GPIO Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : GPIO Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : GPIO Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : GPIO Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : GPIO Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : GPIO Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : GPIO Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : GPIO Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : GPIO Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : GPIO Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : GPIO Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : GPIO Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : GPIO Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : GPIO Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : GPIO Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : GPIO Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : GPIO Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : GPIO Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : GPIO Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : GPIO Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : GPIO Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : GPIO Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : GPIO Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : GPIO Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : GPIO Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : GPIO Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : GPIO Enable
bits : 31 - 31 (1 bit)
access : write-only


STER1

Schmitt Trigger Enable Register
address_offset : 0x620 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STER1 STER1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Schmitt Trigger Enable
bits : 0 - 0 (1 bit)

P1 : Schmitt Trigger Enable
bits : 1 - 1 (1 bit)

P2 : Schmitt Trigger Enable
bits : 2 - 2 (1 bit)

P3 : Schmitt Trigger Enable
bits : 3 - 3 (1 bit)

P4 : Schmitt Trigger Enable
bits : 4 - 4 (1 bit)

P5 : Schmitt Trigger Enable
bits : 5 - 5 (1 bit)

P6 : Schmitt Trigger Enable
bits : 6 - 6 (1 bit)

P7 : Schmitt Trigger Enable
bits : 7 - 7 (1 bit)

P8 : Schmitt Trigger Enable
bits : 8 - 8 (1 bit)

P9 : Schmitt Trigger Enable
bits : 9 - 9 (1 bit)

P10 : Schmitt Trigger Enable
bits : 10 - 10 (1 bit)

P11 : Schmitt Trigger Enable
bits : 11 - 11 (1 bit)

P12 : Schmitt Trigger Enable
bits : 12 - 12 (1 bit)

P13 : Schmitt Trigger Enable
bits : 13 - 13 (1 bit)

P14 : Schmitt Trigger Enable
bits : 14 - 14 (1 bit)

P15 : Schmitt Trigger Enable
bits : 15 - 15 (1 bit)

P16 : Schmitt Trigger Enable
bits : 16 - 16 (1 bit)

P17 : Schmitt Trigger Enable
bits : 17 - 17 (1 bit)

P18 : Schmitt Trigger Enable
bits : 18 - 18 (1 bit)

P19 : Schmitt Trigger Enable
bits : 19 - 19 (1 bit)

P20 : Schmitt Trigger Enable
bits : 20 - 20 (1 bit)

P21 : Schmitt Trigger Enable
bits : 21 - 21 (1 bit)

P22 : Schmitt Trigger Enable
bits : 22 - 22 (1 bit)

P23 : Schmitt Trigger Enable
bits : 23 - 23 (1 bit)

P24 : Schmitt Trigger Enable
bits : 24 - 24 (1 bit)

P25 : Schmitt Trigger Enable
bits : 25 - 25 (1 bit)

P26 : Schmitt Trigger Enable
bits : 26 - 26 (1 bit)

P27 : Schmitt Trigger Enable
bits : 27 - 27 (1 bit)

P28 : Schmitt Trigger Enable
bits : 28 - 28 (1 bit)

P29 : Schmitt Trigger Enable
bits : 29 - 29 (1 bit)

P30 : Schmitt Trigger Enable
bits : 30 - 30 (1 bit)

P31 : Schmitt Trigger Enable
bits : 31 - 31 (1 bit)


STERS1

Schmitt Trigger Enable Register - Set
address_offset : 0x62C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STERS1 STERS1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Schmitt Trigger Enable
bits : 0 - 0 (1 bit)

P1 : Schmitt Trigger Enable
bits : 1 - 1 (1 bit)

P2 : Schmitt Trigger Enable
bits : 2 - 2 (1 bit)

P3 : Schmitt Trigger Enable
bits : 3 - 3 (1 bit)

P4 : Schmitt Trigger Enable
bits : 4 - 4 (1 bit)

P5 : Schmitt Trigger Enable
bits : 5 - 5 (1 bit)

P6 : Schmitt Trigger Enable
bits : 6 - 6 (1 bit)

P7 : Schmitt Trigger Enable
bits : 7 - 7 (1 bit)

P8 : Schmitt Trigger Enable
bits : 8 - 8 (1 bit)

P9 : Schmitt Trigger Enable
bits : 9 - 9 (1 bit)

P10 : Schmitt Trigger Enable
bits : 10 - 10 (1 bit)

P11 : Schmitt Trigger Enable
bits : 11 - 11 (1 bit)

P12 : Schmitt Trigger Enable
bits : 12 - 12 (1 bit)

P13 : Schmitt Trigger Enable
bits : 13 - 13 (1 bit)

P14 : Schmitt Trigger Enable
bits : 14 - 14 (1 bit)

P15 : Schmitt Trigger Enable
bits : 15 - 15 (1 bit)

P16 : Schmitt Trigger Enable
bits : 16 - 16 (1 bit)

P17 : Schmitt Trigger Enable
bits : 17 - 17 (1 bit)

P18 : Schmitt Trigger Enable
bits : 18 - 18 (1 bit)

P19 : Schmitt Trigger Enable
bits : 19 - 19 (1 bit)

P20 : Schmitt Trigger Enable
bits : 20 - 20 (1 bit)

P21 : Schmitt Trigger Enable
bits : 21 - 21 (1 bit)

P22 : Schmitt Trigger Enable
bits : 22 - 22 (1 bit)

P23 : Schmitt Trigger Enable
bits : 23 - 23 (1 bit)

P24 : Schmitt Trigger Enable
bits : 24 - 24 (1 bit)

P25 : Schmitt Trigger Enable
bits : 25 - 25 (1 bit)

P26 : Schmitt Trigger Enable
bits : 26 - 26 (1 bit)

P27 : Schmitt Trigger Enable
bits : 27 - 27 (1 bit)

P28 : Schmitt Trigger Enable
bits : 28 - 28 (1 bit)

P29 : Schmitt Trigger Enable
bits : 29 - 29 (1 bit)

P30 : Schmitt Trigger Enable
bits : 30 - 30 (1 bit)

P31 : Schmitt Trigger Enable
bits : 31 - 31 (1 bit)


GPERT2

GPIO Enable Register - Toggle
address_offset : 0x630 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GPERT2 GPERT2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : GPIO Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : GPIO Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : GPIO Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : GPIO Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : GPIO Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : GPIO Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : GPIO Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : GPIO Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : GPIO Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : GPIO Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : GPIO Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : GPIO Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : GPIO Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : GPIO Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : GPIO Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : GPIO Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : GPIO Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : GPIO Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : GPIO Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : GPIO Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : GPIO Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : GPIO Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : GPIO Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : GPIO Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : GPIO Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : GPIO Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : GPIO Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : GPIO Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : GPIO Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : GPIO Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : GPIO Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : GPIO Enable
bits : 31 - 31 (1 bit)
access : write-only


STERC1

Schmitt Trigger Enable Register - Clear
address_offset : 0x638 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STERC1 STERC1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Schmitt Trigger Enable
bits : 0 - 0 (1 bit)

P1 : Schmitt Trigger Enable
bits : 1 - 1 (1 bit)

P2 : Schmitt Trigger Enable
bits : 2 - 2 (1 bit)

P3 : Schmitt Trigger Enable
bits : 3 - 3 (1 bit)

P4 : Schmitt Trigger Enable
bits : 4 - 4 (1 bit)

P5 : Schmitt Trigger Enable
bits : 5 - 5 (1 bit)

P6 : Schmitt Trigger Enable
bits : 6 - 6 (1 bit)

P7 : Schmitt Trigger Enable
bits : 7 - 7 (1 bit)

P8 : Schmitt Trigger Enable
bits : 8 - 8 (1 bit)

P9 : Schmitt Trigger Enable
bits : 9 - 9 (1 bit)

P10 : Schmitt Trigger Enable
bits : 10 - 10 (1 bit)

P11 : Schmitt Trigger Enable
bits : 11 - 11 (1 bit)

P12 : Schmitt Trigger Enable
bits : 12 - 12 (1 bit)

P13 : Schmitt Trigger Enable
bits : 13 - 13 (1 bit)

P14 : Schmitt Trigger Enable
bits : 14 - 14 (1 bit)

P15 : Schmitt Trigger Enable
bits : 15 - 15 (1 bit)

P16 : Schmitt Trigger Enable
bits : 16 - 16 (1 bit)

P17 : Schmitt Trigger Enable
bits : 17 - 17 (1 bit)

P18 : Schmitt Trigger Enable
bits : 18 - 18 (1 bit)

P19 : Schmitt Trigger Enable
bits : 19 - 19 (1 bit)

P20 : Schmitt Trigger Enable
bits : 20 - 20 (1 bit)

P21 : Schmitt Trigger Enable
bits : 21 - 21 (1 bit)

P22 : Schmitt Trigger Enable
bits : 22 - 22 (1 bit)

P23 : Schmitt Trigger Enable
bits : 23 - 23 (1 bit)

P24 : Schmitt Trigger Enable
bits : 24 - 24 (1 bit)

P25 : Schmitt Trigger Enable
bits : 25 - 25 (1 bit)

P26 : Schmitt Trigger Enable
bits : 26 - 26 (1 bit)

P27 : Schmitt Trigger Enable
bits : 27 - 27 (1 bit)

P28 : Schmitt Trigger Enable
bits : 28 - 28 (1 bit)

P29 : Schmitt Trigger Enable
bits : 29 - 29 (1 bit)

P30 : Schmitt Trigger Enable
bits : 30 - 30 (1 bit)

P31 : Schmitt Trigger Enable
bits : 31 - 31 (1 bit)


PMR02

Peripheral Mux Register 0
address_offset : 0x640 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMR02 PMR02 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 0
bits : 0 - 0 (1 bit)

P1 : Peripheral Multiplexer Select bit 0
bits : 1 - 1 (1 bit)

P2 : Peripheral Multiplexer Select bit 0
bits : 2 - 2 (1 bit)

P3 : Peripheral Multiplexer Select bit 0
bits : 3 - 3 (1 bit)

P4 : Peripheral Multiplexer Select bit 0
bits : 4 - 4 (1 bit)

P5 : Peripheral Multiplexer Select bit 0
bits : 5 - 5 (1 bit)

P6 : Peripheral Multiplexer Select bit 0
bits : 6 - 6 (1 bit)

P7 : Peripheral Multiplexer Select bit 0
bits : 7 - 7 (1 bit)

P8 : Peripheral Multiplexer Select bit 0
bits : 8 - 8 (1 bit)

P9 : Peripheral Multiplexer Select bit 0
bits : 9 - 9 (1 bit)

P10 : Peripheral Multiplexer Select bit 0
bits : 10 - 10 (1 bit)

P11 : Peripheral Multiplexer Select bit 0
bits : 11 - 11 (1 bit)

P12 : Peripheral Multiplexer Select bit 0
bits : 12 - 12 (1 bit)

P13 : Peripheral Multiplexer Select bit 0
bits : 13 - 13 (1 bit)

P14 : Peripheral Multiplexer Select bit 0
bits : 14 - 14 (1 bit)

P15 : Peripheral Multiplexer Select bit 0
bits : 15 - 15 (1 bit)

P16 : Peripheral Multiplexer Select bit 0
bits : 16 - 16 (1 bit)

P17 : Peripheral Multiplexer Select bit 0
bits : 17 - 17 (1 bit)

P18 : Peripheral Multiplexer Select bit 0
bits : 18 - 18 (1 bit)

P19 : Peripheral Multiplexer Select bit 0
bits : 19 - 19 (1 bit)

P20 : Peripheral Multiplexer Select bit 0
bits : 20 - 20 (1 bit)

P21 : Peripheral Multiplexer Select bit 0
bits : 21 - 21 (1 bit)

P22 : Peripheral Multiplexer Select bit 0
bits : 22 - 22 (1 bit)

P23 : Peripheral Multiplexer Select bit 0
bits : 23 - 23 (1 bit)

P24 : Peripheral Multiplexer Select bit 0
bits : 24 - 24 (1 bit)

P25 : Peripheral Multiplexer Select bit 0
bits : 25 - 25 (1 bit)

P26 : Peripheral Multiplexer Select bit 0
bits : 26 - 26 (1 bit)

P27 : Peripheral Multiplexer Select bit 0
bits : 27 - 27 (1 bit)

P28 : Peripheral Multiplexer Select bit 0
bits : 28 - 28 (1 bit)

P29 : Peripheral Multiplexer Select bit 0
bits : 29 - 29 (1 bit)

P30 : Peripheral Multiplexer Select bit 0
bits : 30 - 30 (1 bit)

P31 : Peripheral Multiplexer Select bit 0
bits : 31 - 31 (1 bit)


STERT1

Schmitt Trigger Enable Register - Toggle
address_offset : 0x644 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STERT1 STERT1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Schmitt Trigger Enable
bits : 0 - 0 (1 bit)

P1 : Schmitt Trigger Enable
bits : 1 - 1 (1 bit)

P2 : Schmitt Trigger Enable
bits : 2 - 2 (1 bit)

P3 : Schmitt Trigger Enable
bits : 3 - 3 (1 bit)

P4 : Schmitt Trigger Enable
bits : 4 - 4 (1 bit)

P5 : Schmitt Trigger Enable
bits : 5 - 5 (1 bit)

P6 : Schmitt Trigger Enable
bits : 6 - 6 (1 bit)

P7 : Schmitt Trigger Enable
bits : 7 - 7 (1 bit)

P8 : Schmitt Trigger Enable
bits : 8 - 8 (1 bit)

P9 : Schmitt Trigger Enable
bits : 9 - 9 (1 bit)

P10 : Schmitt Trigger Enable
bits : 10 - 10 (1 bit)

P11 : Schmitt Trigger Enable
bits : 11 - 11 (1 bit)

P12 : Schmitt Trigger Enable
bits : 12 - 12 (1 bit)

P13 : Schmitt Trigger Enable
bits : 13 - 13 (1 bit)

P14 : Schmitt Trigger Enable
bits : 14 - 14 (1 bit)

P15 : Schmitt Trigger Enable
bits : 15 - 15 (1 bit)

P16 : Schmitt Trigger Enable
bits : 16 - 16 (1 bit)

P17 : Schmitt Trigger Enable
bits : 17 - 17 (1 bit)

P18 : Schmitt Trigger Enable
bits : 18 - 18 (1 bit)

P19 : Schmitt Trigger Enable
bits : 19 - 19 (1 bit)

P20 : Schmitt Trigger Enable
bits : 20 - 20 (1 bit)

P21 : Schmitt Trigger Enable
bits : 21 - 21 (1 bit)

P22 : Schmitt Trigger Enable
bits : 22 - 22 (1 bit)

P23 : Schmitt Trigger Enable
bits : 23 - 23 (1 bit)

P24 : Schmitt Trigger Enable
bits : 24 - 24 (1 bit)

P25 : Schmitt Trigger Enable
bits : 25 - 25 (1 bit)

P26 : Schmitt Trigger Enable
bits : 26 - 26 (1 bit)

P27 : Schmitt Trigger Enable
bits : 27 - 27 (1 bit)

P28 : Schmitt Trigger Enable
bits : 28 - 28 (1 bit)

P29 : Schmitt Trigger Enable
bits : 29 - 29 (1 bit)

P30 : Schmitt Trigger Enable
bits : 30 - 30 (1 bit)

P31 : Schmitt Trigger Enable
bits : 31 - 31 (1 bit)


PMR0S2

Peripheral Mux Register 0 - Set
address_offset : 0x650 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR0S2 PMR0S2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 0
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 0
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 0
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 0
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 0
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 0
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 0
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 0
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 0
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 0
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 0
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 0
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 0
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 0
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 0
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 0
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 0
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 0
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 0
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 0
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 0
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 0
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 0
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 0
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 0
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 0
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 0
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 0
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 0
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 0
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 0
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 0
bits : 31 - 31 (1 bit)
access : write-only


PMR0C2

Peripheral Mux Register 0 - Clear
address_offset : 0x660 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR0C2 PMR0C2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 0
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 0
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 0
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 0
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 0
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 0
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 0
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 0
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 0
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 0
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 0
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 0
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 0
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 0
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 0
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 0
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 0
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 0
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 0
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 0
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 0
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 0
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 0
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 0
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 0
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 0
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 0
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 0
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 0
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 0
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 0
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 0
bits : 31 - 31 (1 bit)
access : write-only


PMR0T2

Peripheral Mux Register 0 - Toggle
address_offset : 0x670 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR0T2 PMR0T2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 0
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 0
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 0
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 0
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 0
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 0
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 0
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 0
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 0
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 0
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 0
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 0
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 0
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 0
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 0
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 0
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 0
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 0
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 0
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 0
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 0
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 0
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 0
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 0
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 0
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 0
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 0
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 0
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 0
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 0
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 0
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 0
bits : 31 - 31 (1 bit)
access : write-only


PMR2S0

Peripheral Mux Register 2 - Set
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR2S0 PMR2S0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 2
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 2
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 2
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 2
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 2
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 2
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 2
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 2
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 2
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 2
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 2
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 2
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 2
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 2
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 2
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 2
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 2
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 2
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 2
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 2
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 2
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 2
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 2
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 2
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 2
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 2
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 2
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 2
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 2
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 2
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 2
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 2
bits : 31 - 31 (1 bit)
access : write-only


EVER1

Event Enable Register
address_offset : 0x680 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVER1 EVER1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Event Enable
bits : 0 - 0 (1 bit)

P1 : Event Enable
bits : 1 - 1 (1 bit)

P2 : Event Enable
bits : 2 - 2 (1 bit)

P3 : Event Enable
bits : 3 - 3 (1 bit)

P4 : Event Enable
bits : 4 - 4 (1 bit)

P5 : Event Enable
bits : 5 - 5 (1 bit)

P6 : Event Enable
bits : 6 - 6 (1 bit)

P7 : Event Enable
bits : 7 - 7 (1 bit)

P8 : Event Enable
bits : 8 - 8 (1 bit)

P9 : Event Enable
bits : 9 - 9 (1 bit)

P10 : Event Enable
bits : 10 - 10 (1 bit)

P11 : Event Enable
bits : 11 - 11 (1 bit)

P12 : Event Enable
bits : 12 - 12 (1 bit)

P13 : Event Enable
bits : 13 - 13 (1 bit)

P14 : Event Enable
bits : 14 - 14 (1 bit)

P15 : Event Enable
bits : 15 - 15 (1 bit)

P16 : Event Enable
bits : 16 - 16 (1 bit)

P17 : Event Enable
bits : 17 - 17 (1 bit)

P18 : Event Enable
bits : 18 - 18 (1 bit)

P19 : Event Enable
bits : 19 - 19 (1 bit)

P20 : Event Enable
bits : 20 - 20 (1 bit)

P21 : Event Enable
bits : 21 - 21 (1 bit)

P22 : Event Enable
bits : 22 - 22 (1 bit)

P23 : Event Enable
bits : 23 - 23 (1 bit)

P24 : Event Enable
bits : 24 - 24 (1 bit)

P25 : Event Enable
bits : 25 - 25 (1 bit)

P26 : Event Enable
bits : 26 - 26 (1 bit)

P27 : Event Enable
bits : 27 - 27 (1 bit)

P28 : Event Enable
bits : 28 - 28 (1 bit)

P29 : Event Enable
bits : 29 - 29 (1 bit)

P30 : Event Enable
bits : 30 - 30 (1 bit)

P31 : Event Enable
bits : 31 - 31 (1 bit)


PMR12

Peripheral Mux Register 1
address_offset : 0x680 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMR12 PMR12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 1
bits : 0 - 0 (1 bit)

P1 : Peripheral Multiplexer Select bit 1
bits : 1 - 1 (1 bit)

P2 : Peripheral Multiplexer Select bit 1
bits : 2 - 2 (1 bit)

P3 : Peripheral Multiplexer Select bit 1
bits : 3 - 3 (1 bit)

P4 : Peripheral Multiplexer Select bit 1
bits : 4 - 4 (1 bit)

P5 : Peripheral Multiplexer Select bit 1
bits : 5 - 5 (1 bit)

P6 : Peripheral Multiplexer Select bit 1
bits : 6 - 6 (1 bit)

P7 : Peripheral Multiplexer Select bit 1
bits : 7 - 7 (1 bit)

P8 : Peripheral Multiplexer Select bit 1
bits : 8 - 8 (1 bit)

P9 : Peripheral Multiplexer Select bit 1
bits : 9 - 9 (1 bit)

P10 : Peripheral Multiplexer Select bit 1
bits : 10 - 10 (1 bit)

P11 : Peripheral Multiplexer Select bit 1
bits : 11 - 11 (1 bit)

P12 : Peripheral Multiplexer Select bit 1
bits : 12 - 12 (1 bit)

P13 : Peripheral Multiplexer Select bit 1
bits : 13 - 13 (1 bit)

P14 : Peripheral Multiplexer Select bit 1
bits : 14 - 14 (1 bit)

P15 : Peripheral Multiplexer Select bit 1
bits : 15 - 15 (1 bit)

P16 : Peripheral Multiplexer Select bit 1
bits : 16 - 16 (1 bit)

P17 : Peripheral Multiplexer Select bit 1
bits : 17 - 17 (1 bit)

P18 : Peripheral Multiplexer Select bit 1
bits : 18 - 18 (1 bit)

P19 : Peripheral Multiplexer Select bit 1
bits : 19 - 19 (1 bit)

P20 : Peripheral Multiplexer Select bit 1
bits : 20 - 20 (1 bit)

P21 : Peripheral Multiplexer Select bit 1
bits : 21 - 21 (1 bit)

P22 : Peripheral Multiplexer Select bit 1
bits : 22 - 22 (1 bit)

P23 : Peripheral Multiplexer Select bit 1
bits : 23 - 23 (1 bit)

P24 : Peripheral Multiplexer Select bit 1
bits : 24 - 24 (1 bit)

P25 : Peripheral Multiplexer Select bit 1
bits : 25 - 25 (1 bit)

P26 : Peripheral Multiplexer Select bit 1
bits : 26 - 26 (1 bit)

P27 : Peripheral Multiplexer Select bit 1
bits : 27 - 27 (1 bit)

P28 : Peripheral Multiplexer Select bit 1
bits : 28 - 28 (1 bit)

P29 : Peripheral Multiplexer Select bit 1
bits : 29 - 29 (1 bit)

P30 : Peripheral Multiplexer Select bit 1
bits : 30 - 30 (1 bit)

P31 : Peripheral Multiplexer Select bit 1
bits : 31 - 31 (1 bit)


EVERS1

Event Enable Register - Set
address_offset : 0x68C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

EVERS1 EVERS1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Event Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Event Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Event Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Event Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Event Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Event Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Event Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Event Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Event Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Event Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Event Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Event Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Event Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Event Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Event Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Event Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Event Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Event Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Event Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Event Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Event Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Event Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Event Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Event Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Event Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Event Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Event Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Event Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Event Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Event Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Event Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Event Enable
bits : 31 - 31 (1 bit)
access : write-only


PMR1S2

Peripheral Mux Register 1 - Set
address_offset : 0x690 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR1S2 PMR1S2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 1
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 1
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 1
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 1
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 1
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 1
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 1
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 1
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 1
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 1
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 1
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 1
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 1
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 1
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 1
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 1
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 1
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 1
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 1
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 1
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 1
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 1
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 1
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 1
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 1
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 1
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 1
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 1
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 1
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 1
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 1
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 1
bits : 31 - 31 (1 bit)
access : write-only


EVERC1

Event Enable Register - Clear
address_offset : 0x698 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

EVERC1 EVERC1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Event Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Event Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Event Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Event Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Event Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Event Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Event Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Event Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Event Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Event Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Event Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Event Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Event Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Event Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Event Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Event Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Event Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Event Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Event Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Event Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Event Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Event Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Event Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Event Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Event Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Event Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Event Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Event Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Event Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Event Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Event Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Event Enable
bits : 31 - 31 (1 bit)
access : write-only


PMR1C2

Peripheral Mux Register 1 - Clear
address_offset : 0x6A0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR1C2 PMR1C2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 1
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 1
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 1
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 1
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 1
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 1
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 1
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 1
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 1
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 1
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 1
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 1
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 1
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 1
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 1
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 1
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 1
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 1
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 1
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 1
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 1
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 1
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 1
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 1
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 1
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 1
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 1
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 1
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 1
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 1
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 1
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 1
bits : 31 - 31 (1 bit)
access : write-only


EVERT1

Event Enable Register - Toggle
address_offset : 0x6A4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

EVERT1 EVERT1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Event Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Event Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Event Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Event Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Event Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Event Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Event Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Event Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Event Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Event Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Event Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Event Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Event Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Event Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Event Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Event Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Event Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Event Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Event Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Event Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Event Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Event Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Event Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Event Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Event Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Event Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Event Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Event Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Event Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Event Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Event Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Event Enable
bits : 31 - 31 (1 bit)
access : write-only


PMR1T2

Peripheral Mux Register 1 - Toggle
address_offset : 0x6B0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR1T2 PMR1T2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 1
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 1
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 1
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 1
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 1
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 1
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 1
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 1
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 1
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 1
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 1
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 1
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 1
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 1
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 1
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 1
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 1
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 1
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 1
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 1
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 1
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 1
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 1
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 1
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 1
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 1
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 1
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 1
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 1
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 1
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 1
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 1
bits : 31 - 31 (1 bit)
access : write-only


PMR22

Peripheral Mux Register 2
address_offset : 0x6C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMR22 PMR22 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 2
bits : 0 - 0 (1 bit)

P1 : Peripheral Multiplexer Select bit 2
bits : 1 - 1 (1 bit)

P2 : Peripheral Multiplexer Select bit 2
bits : 2 - 2 (1 bit)

P3 : Peripheral Multiplexer Select bit 2
bits : 3 - 3 (1 bit)

P4 : Peripheral Multiplexer Select bit 2
bits : 4 - 4 (1 bit)

P5 : Peripheral Multiplexer Select bit 2
bits : 5 - 5 (1 bit)

P6 : Peripheral Multiplexer Select bit 2
bits : 6 - 6 (1 bit)

P7 : Peripheral Multiplexer Select bit 2
bits : 7 - 7 (1 bit)

P8 : Peripheral Multiplexer Select bit 2
bits : 8 - 8 (1 bit)

P9 : Peripheral Multiplexer Select bit 2
bits : 9 - 9 (1 bit)

P10 : Peripheral Multiplexer Select bit 2
bits : 10 - 10 (1 bit)

P11 : Peripheral Multiplexer Select bit 2
bits : 11 - 11 (1 bit)

P12 : Peripheral Multiplexer Select bit 2
bits : 12 - 12 (1 bit)

P13 : Peripheral Multiplexer Select bit 2
bits : 13 - 13 (1 bit)

P14 : Peripheral Multiplexer Select bit 2
bits : 14 - 14 (1 bit)

P15 : Peripheral Multiplexer Select bit 2
bits : 15 - 15 (1 bit)

P16 : Peripheral Multiplexer Select bit 2
bits : 16 - 16 (1 bit)

P17 : Peripheral Multiplexer Select bit 2
bits : 17 - 17 (1 bit)

P18 : Peripheral Multiplexer Select bit 2
bits : 18 - 18 (1 bit)

P19 : Peripheral Multiplexer Select bit 2
bits : 19 - 19 (1 bit)

P20 : Peripheral Multiplexer Select bit 2
bits : 20 - 20 (1 bit)

P21 : Peripheral Multiplexer Select bit 2
bits : 21 - 21 (1 bit)

P22 : Peripheral Multiplexer Select bit 2
bits : 22 - 22 (1 bit)

P23 : Peripheral Multiplexer Select bit 2
bits : 23 - 23 (1 bit)

P24 : Peripheral Multiplexer Select bit 2
bits : 24 - 24 (1 bit)

P25 : Peripheral Multiplexer Select bit 2
bits : 25 - 25 (1 bit)

P26 : Peripheral Multiplexer Select bit 2
bits : 26 - 26 (1 bit)

P27 : Peripheral Multiplexer Select bit 2
bits : 27 - 27 (1 bit)

P28 : Peripheral Multiplexer Select bit 2
bits : 28 - 28 (1 bit)

P29 : Peripheral Multiplexer Select bit 2
bits : 29 - 29 (1 bit)

P30 : Peripheral Multiplexer Select bit 2
bits : 30 - 30 (1 bit)

P31 : Peripheral Multiplexer Select bit 2
bits : 31 - 31 (1 bit)


PMR2S2

Peripheral Mux Register 2 - Set
address_offset : 0x6D0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR2S2 PMR2S2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 2
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 2
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 2
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 2
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 2
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 2
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 2
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 2
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 2
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 2
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 2
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 2
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 2
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 2
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 2
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 2
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 2
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 2
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 2
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 2
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 2
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 2
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 2
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 2
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 2
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 2
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 2
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 2
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 2
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 2
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 2
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 2
bits : 31 - 31 (1 bit)
access : write-only


LOCK1

Lock Register
address_offset : 0x6E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOCK1 LOCK1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Lock State
bits : 0 - 0 (1 bit)

P1 : Lock State
bits : 1 - 1 (1 bit)

P2 : Lock State
bits : 2 - 2 (1 bit)

P3 : Lock State
bits : 3 - 3 (1 bit)

P4 : Lock State
bits : 4 - 4 (1 bit)

P5 : Lock State
bits : 5 - 5 (1 bit)

P6 : Lock State
bits : 6 - 6 (1 bit)

P7 : Lock State
bits : 7 - 7 (1 bit)

P8 : Lock State
bits : 8 - 8 (1 bit)

P9 : Lock State
bits : 9 - 9 (1 bit)

P10 : Lock State
bits : 10 - 10 (1 bit)

P11 : Lock State
bits : 11 - 11 (1 bit)

P12 : Lock State
bits : 12 - 12 (1 bit)

P13 : Lock State
bits : 13 - 13 (1 bit)

P14 : Lock State
bits : 14 - 14 (1 bit)

P15 : Lock State
bits : 15 - 15 (1 bit)

P16 : Lock State
bits : 16 - 16 (1 bit)

P17 : Lock State
bits : 17 - 17 (1 bit)

P18 : Lock State
bits : 18 - 18 (1 bit)

P19 : Lock State
bits : 19 - 19 (1 bit)

P20 : Lock State
bits : 20 - 20 (1 bit)

P21 : Lock State
bits : 21 - 21 (1 bit)

P22 : Lock State
bits : 22 - 22 (1 bit)

P23 : Lock State
bits : 23 - 23 (1 bit)

P24 : Lock State
bits : 24 - 24 (1 bit)

P25 : Lock State
bits : 25 - 25 (1 bit)

P26 : Lock State
bits : 26 - 26 (1 bit)

P27 : Lock State
bits : 27 - 27 (1 bit)

P28 : Lock State
bits : 28 - 28 (1 bit)

P29 : Lock State
bits : 29 - 29 (1 bit)

P30 : Lock State
bits : 30 - 30 (1 bit)

P31 : Lock State
bits : 31 - 31 (1 bit)


PMR2C2

Peripheral Mux Register 2 - Clear
address_offset : 0x6E0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR2C2 PMR2C2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 2
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 2
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 2
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 2
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 2
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 2
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 2
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 2
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 2
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 2
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 2
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 2
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 2
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 2
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 2
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 2
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 2
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 2
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 2
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 2
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 2
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 2
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 2
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 2
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 2
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 2
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 2
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 2
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 2
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 2
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 2
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 2
bits : 31 - 31 (1 bit)
access : write-only


LOCKS1

Lock Register - Set
address_offset : 0x6EC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

LOCKS1 LOCKS1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Lock State
bits : 0 - 0 (1 bit)

P1 : Lock State
bits : 1 - 1 (1 bit)

P2 : Lock State
bits : 2 - 2 (1 bit)

P3 : Lock State
bits : 3 - 3 (1 bit)

P4 : Lock State
bits : 4 - 4 (1 bit)

P5 : Lock State
bits : 5 - 5 (1 bit)

P6 : Lock State
bits : 6 - 6 (1 bit)

P7 : Lock State
bits : 7 - 7 (1 bit)

P8 : Lock State
bits : 8 - 8 (1 bit)

P9 : Lock State
bits : 9 - 9 (1 bit)

P10 : Lock State
bits : 10 - 10 (1 bit)

P11 : Lock State
bits : 11 - 11 (1 bit)

P12 : Lock State
bits : 12 - 12 (1 bit)

P13 : Lock State
bits : 13 - 13 (1 bit)

P14 : Lock State
bits : 14 - 14 (1 bit)

P15 : Lock State
bits : 15 - 15 (1 bit)

P16 : Lock State
bits : 16 - 16 (1 bit)

P17 : Lock State
bits : 17 - 17 (1 bit)

P18 : Lock State
bits : 18 - 18 (1 bit)

P19 : Lock State
bits : 19 - 19 (1 bit)

P20 : Lock State
bits : 20 - 20 (1 bit)

P21 : Lock State
bits : 21 - 21 (1 bit)

P22 : Lock State
bits : 22 - 22 (1 bit)

P23 : Lock State
bits : 23 - 23 (1 bit)

P24 : Lock State
bits : 24 - 24 (1 bit)

P25 : Lock State
bits : 25 - 25 (1 bit)

P26 : Lock State
bits : 26 - 26 (1 bit)

P27 : Lock State
bits : 27 - 27 (1 bit)

P28 : Lock State
bits : 28 - 28 (1 bit)

P29 : Lock State
bits : 29 - 29 (1 bit)

P30 : Lock State
bits : 30 - 30 (1 bit)

P31 : Lock State
bits : 31 - 31 (1 bit)


PMR2T2

Peripheral Mux Register 2 - Toggle
address_offset : 0x6F0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR2T2 PMR2T2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 2
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 2
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 2
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 2
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 2
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 2
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 2
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 2
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 2
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 2
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 2
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 2
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 2
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 2
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 2
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 2
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 2
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 2
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 2
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 2
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 2
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 2
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 2
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 2
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 2
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 2
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 2
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 2
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 2
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 2
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 2
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 2
bits : 31 - 31 (1 bit)
access : write-only


LOCKC1

Lock Register - Clear
address_offset : 0x6F8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

LOCKC1 LOCKC1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Lock State
bits : 0 - 0 (1 bit)

P1 : Lock State
bits : 1 - 1 (1 bit)

P2 : Lock State
bits : 2 - 2 (1 bit)

P3 : Lock State
bits : 3 - 3 (1 bit)

P4 : Lock State
bits : 4 - 4 (1 bit)

P5 : Lock State
bits : 5 - 5 (1 bit)

P6 : Lock State
bits : 6 - 6 (1 bit)

P7 : Lock State
bits : 7 - 7 (1 bit)

P8 : Lock State
bits : 8 - 8 (1 bit)

P9 : Lock State
bits : 9 - 9 (1 bit)

P10 : Lock State
bits : 10 - 10 (1 bit)

P11 : Lock State
bits : 11 - 11 (1 bit)

P12 : Lock State
bits : 12 - 12 (1 bit)

P13 : Lock State
bits : 13 - 13 (1 bit)

P14 : Lock State
bits : 14 - 14 (1 bit)

P15 : Lock State
bits : 15 - 15 (1 bit)

P16 : Lock State
bits : 16 - 16 (1 bit)

P17 : Lock State
bits : 17 - 17 (1 bit)

P18 : Lock State
bits : 18 - 18 (1 bit)

P19 : Lock State
bits : 19 - 19 (1 bit)

P20 : Lock State
bits : 20 - 20 (1 bit)

P21 : Lock State
bits : 21 - 21 (1 bit)

P22 : Lock State
bits : 22 - 22 (1 bit)

P23 : Lock State
bits : 23 - 23 (1 bit)

P24 : Lock State
bits : 24 - 24 (1 bit)

P25 : Lock State
bits : 25 - 25 (1 bit)

P26 : Lock State
bits : 26 - 26 (1 bit)

P27 : Lock State
bits : 27 - 27 (1 bit)

P28 : Lock State
bits : 28 - 28 (1 bit)

P29 : Lock State
bits : 29 - 29 (1 bit)

P30 : Lock State
bits : 30 - 30 (1 bit)

P31 : Lock State
bits : 31 - 31 (1 bit)


PMR2C0

Peripheral Mux Register 2 - Clear
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR2C0 PMR2C0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 2
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 2
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 2
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 2
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 2
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 2
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 2
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 2
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 2
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 2
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 2
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 2
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 2
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 2
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 2
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 2
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 2
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 2
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 2
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 2
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 2
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 2
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 2
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 2
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 2
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 2
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 2
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 2
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 2
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 2
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 2
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 2
bits : 31 - 31 (1 bit)
access : write-only


ODER2

Output Driver Enable Register
address_offset : 0x700 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODER2 ODER2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driver Enable
bits : 0 - 0 (1 bit)

P1 : Output Driver Enable
bits : 1 - 1 (1 bit)

P2 : Output Driver Enable
bits : 2 - 2 (1 bit)

P3 : Output Driver Enable
bits : 3 - 3 (1 bit)

P4 : Output Driver Enable
bits : 4 - 4 (1 bit)

P5 : Output Driver Enable
bits : 5 - 5 (1 bit)

P6 : Output Driver Enable
bits : 6 - 6 (1 bit)

P7 : Output Driver Enable
bits : 7 - 7 (1 bit)

P8 : Output Driver Enable
bits : 8 - 8 (1 bit)

P9 : Output Driver Enable
bits : 9 - 9 (1 bit)

P10 : Output Driver Enable
bits : 10 - 10 (1 bit)

P11 : Output Driver Enable
bits : 11 - 11 (1 bit)

P12 : Output Driver Enable
bits : 12 - 12 (1 bit)

P13 : Output Driver Enable
bits : 13 - 13 (1 bit)

P14 : Output Driver Enable
bits : 14 - 14 (1 bit)

P15 : Output Driver Enable
bits : 15 - 15 (1 bit)

P16 : Output Driver Enable
bits : 16 - 16 (1 bit)

P17 : Output Driver Enable
bits : 17 - 17 (1 bit)

P18 : Output Driver Enable
bits : 18 - 18 (1 bit)

P19 : Output Driver Enable
bits : 19 - 19 (1 bit)

P20 : Output Driver Enable
bits : 20 - 20 (1 bit)

P21 : Output Driver Enable
bits : 21 - 21 (1 bit)

P22 : Output Driver Enable
bits : 22 - 22 (1 bit)

P23 : Output Driver Enable
bits : 23 - 23 (1 bit)

P24 : Output Driver Enable
bits : 24 - 24 (1 bit)

P25 : Output Driver Enable
bits : 25 - 25 (1 bit)

P26 : Output Driver Enable
bits : 26 - 26 (1 bit)

P27 : Output Driver Enable
bits : 27 - 27 (1 bit)

P28 : Output Driver Enable
bits : 28 - 28 (1 bit)

P29 : Output Driver Enable
bits : 29 - 29 (1 bit)

P30 : Output Driver Enable
bits : 30 - 30 (1 bit)

P31 : Output Driver Enable
bits : 31 - 31 (1 bit)


LOCKT1

Lock Register - Toggle
address_offset : 0x704 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

LOCKT1 LOCKT1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Lock State
bits : 0 - 0 (1 bit)

P1 : Lock State
bits : 1 - 1 (1 bit)

P2 : Lock State
bits : 2 - 2 (1 bit)

P3 : Lock State
bits : 3 - 3 (1 bit)

P4 : Lock State
bits : 4 - 4 (1 bit)

P5 : Lock State
bits : 5 - 5 (1 bit)

P6 : Lock State
bits : 6 - 6 (1 bit)

P7 : Lock State
bits : 7 - 7 (1 bit)

P8 : Lock State
bits : 8 - 8 (1 bit)

P9 : Lock State
bits : 9 - 9 (1 bit)

P10 : Lock State
bits : 10 - 10 (1 bit)

P11 : Lock State
bits : 11 - 11 (1 bit)

P12 : Lock State
bits : 12 - 12 (1 bit)

P13 : Lock State
bits : 13 - 13 (1 bit)

P14 : Lock State
bits : 14 - 14 (1 bit)

P15 : Lock State
bits : 15 - 15 (1 bit)

P16 : Lock State
bits : 16 - 16 (1 bit)

P17 : Lock State
bits : 17 - 17 (1 bit)

P18 : Lock State
bits : 18 - 18 (1 bit)

P19 : Lock State
bits : 19 - 19 (1 bit)

P20 : Lock State
bits : 20 - 20 (1 bit)

P21 : Lock State
bits : 21 - 21 (1 bit)

P22 : Lock State
bits : 22 - 22 (1 bit)

P23 : Lock State
bits : 23 - 23 (1 bit)

P24 : Lock State
bits : 24 - 24 (1 bit)

P25 : Lock State
bits : 25 - 25 (1 bit)

P26 : Lock State
bits : 26 - 26 (1 bit)

P27 : Lock State
bits : 27 - 27 (1 bit)

P28 : Lock State
bits : 28 - 28 (1 bit)

P29 : Lock State
bits : 29 - 29 (1 bit)

P30 : Lock State
bits : 30 - 30 (1 bit)

P31 : Lock State
bits : 31 - 31 (1 bit)


ODERS2

Output Driver Enable Register - Set
address_offset : 0x710 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ODERS2 ODERS2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driver Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Driver Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Driver Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Driver Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Driver Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Driver Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Driver Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Driver Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Driver Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Driver Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Driver Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Driver Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Driver Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Driver Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Driver Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Driver Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Driver Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Driver Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Driver Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Driver Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Driver Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Driver Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Driver Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Driver Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Driver Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Driver Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Driver Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Driver Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Driver Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Driver Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Driver Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Driver Enable
bits : 31 - 31 (1 bit)
access : write-only


ODERC2

Output Driver Enable Register - Clear
address_offset : 0x720 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ODERC2 ODERC2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driver Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Driver Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Driver Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Driver Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Driver Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Driver Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Driver Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Driver Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Driver Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Driver Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Driver Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Driver Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Driver Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Driver Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Driver Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Driver Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Driver Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Driver Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Driver Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Driver Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Driver Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Driver Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Driver Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Driver Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Driver Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Driver Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Driver Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Driver Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Driver Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Driver Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Driver Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Driver Enable
bits : 31 - 31 (1 bit)
access : write-only


ODERT2

Output Driver Enable Register - Toggle
address_offset : 0x730 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ODERT2 ODERT2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driver Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Driver Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Driver Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Driver Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Driver Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Driver Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Driver Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Driver Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Driver Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Driver Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Driver Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Driver Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Driver Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Driver Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Driver Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Driver Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Driver Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Driver Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Driver Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Driver Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Driver Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Driver Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Driver Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Driver Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Driver Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Driver Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Driver Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Driver Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Driver Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Driver Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Driver Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Driver Enable
bits : 31 - 31 (1 bit)
access : write-only


OVR2

Output Value Register
address_offset : 0x740 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OVR2 OVR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Value
bits : 0 - 0 (1 bit)

P1 : Output Value
bits : 1 - 1 (1 bit)

P2 : Output Value
bits : 2 - 2 (1 bit)

P3 : Output Value
bits : 3 - 3 (1 bit)

P4 : Output Value
bits : 4 - 4 (1 bit)

P5 : Output Value
bits : 5 - 5 (1 bit)

P6 : Output Value
bits : 6 - 6 (1 bit)

P7 : Output Value
bits : 7 - 7 (1 bit)

P8 : Output Value
bits : 8 - 8 (1 bit)

P9 : Output Value
bits : 9 - 9 (1 bit)

P10 : Output Value
bits : 10 - 10 (1 bit)

P11 : Output Value
bits : 11 - 11 (1 bit)

P12 : Output Value
bits : 12 - 12 (1 bit)

P13 : Output Value
bits : 13 - 13 (1 bit)

P14 : Output Value
bits : 14 - 14 (1 bit)

P15 : Output Value
bits : 15 - 15 (1 bit)

P16 : Output Value
bits : 16 - 16 (1 bit)

P17 : Output Value
bits : 17 - 17 (1 bit)

P18 : Output Value
bits : 18 - 18 (1 bit)

P19 : Output Value
bits : 19 - 19 (1 bit)

P20 : Output Value
bits : 20 - 20 (1 bit)

P21 : Output Value
bits : 21 - 21 (1 bit)

P22 : Output Value
bits : 22 - 22 (1 bit)

P23 : Output Value
bits : 23 - 23 (1 bit)

P24 : Output Value
bits : 24 - 24 (1 bit)

P25 : Output Value
bits : 25 - 25 (1 bit)

P26 : Output Value
bits : 26 - 26 (1 bit)

P27 : Output Value
bits : 27 - 27 (1 bit)

P28 : Output Value
bits : 28 - 28 (1 bit)

P29 : Output Value
bits : 29 - 29 (1 bit)

P30 : Output Value
bits : 30 - 30 (1 bit)

P31 : Output Value
bits : 31 - 31 (1 bit)


OVRS2

Output Value Register - Set
address_offset : 0x750 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

OVRS2 OVRS2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Value
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Value
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Value
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Value
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Value
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Value
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Value
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Value
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Value
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Value
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Value
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Value
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Value
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Value
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Value
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Value
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Value
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Value
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Value
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Value
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Value
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Value
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Value
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Value
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Value
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Value
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Value
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Value
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Value
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Value
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Value
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Value
bits : 31 - 31 (1 bit)
access : write-only


OVRC2

Output Value Register - Clear
address_offset : 0x760 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

OVRC2 OVRC2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Value
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Value
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Value
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Value
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Value
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Value
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Value
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Value
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Value
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Value
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Value
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Value
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Value
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Value
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Value
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Value
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Value
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Value
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Value
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Value
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Value
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Value
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Value
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Value
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Value
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Value
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Value
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Value
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Value
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Value
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Value
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Value
bits : 31 - 31 (1 bit)
access : write-only


OVRT2

Output Value Register - Toggle
address_offset : 0x770 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

OVRT2 OVRT2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Value
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Value
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Value
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Value
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Value
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Value
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Value
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Value
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Value
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Value
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Value
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Value
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Value
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Value
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Value
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Value
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Value
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Value
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Value
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Value
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Value
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Value
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Value
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Value
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Value
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Value
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Value
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Value
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Value
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Value
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Value
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Value
bits : 31 - 31 (1 bit)
access : write-only


PMR2T0

Peripheral Mux Register 2 - Toggle
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PMR2T0 PMR2T0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral Multiplexer Select bit 2
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral Multiplexer Select bit 2
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral Multiplexer Select bit 2
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral Multiplexer Select bit 2
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral Multiplexer Select bit 2
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral Multiplexer Select bit 2
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral Multiplexer Select bit 2
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral Multiplexer Select bit 2
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral Multiplexer Select bit 2
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral Multiplexer Select bit 2
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral Multiplexer Select bit 2
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral Multiplexer Select bit 2
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral Multiplexer Select bit 2
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral Multiplexer Select bit 2
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral Multiplexer Select bit 2
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral Multiplexer Select bit 2
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral Multiplexer Select bit 2
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral Multiplexer Select bit 2
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral Multiplexer Select bit 2
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral Multiplexer Select bit 2
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral Multiplexer Select bit 2
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral Multiplexer Select bit 2
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral Multiplexer Select bit 2
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral Multiplexer Select bit 2
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral Multiplexer Select bit 2
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral Multiplexer Select bit 2
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral Multiplexer Select bit 2
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral Multiplexer Select bit 2
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral Multiplexer Select bit 2
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral Multiplexer Select bit 2
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral Multiplexer Select bit 2
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral Multiplexer Select bit 2
bits : 31 - 31 (1 bit)
access : write-only


PVR2

Pin Value Register
address_offset : 0x780 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PVR2 PVR2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pin Value
bits : 0 - 0 (1 bit)
access : read-only

P1 : Pin Value
bits : 1 - 1 (1 bit)
access : read-only

P2 : Pin Value
bits : 2 - 2 (1 bit)
access : read-only

P3 : Pin Value
bits : 3 - 3 (1 bit)
access : read-only

P4 : Pin Value
bits : 4 - 4 (1 bit)
access : read-only

P5 : Pin Value
bits : 5 - 5 (1 bit)
access : read-only

P6 : Pin Value
bits : 6 - 6 (1 bit)
access : read-only

P7 : Pin Value
bits : 7 - 7 (1 bit)
access : read-only

P8 : Pin Value
bits : 8 - 8 (1 bit)
access : read-only

P9 : Pin Value
bits : 9 - 9 (1 bit)
access : read-only

P10 : Pin Value
bits : 10 - 10 (1 bit)
access : read-only

P11 : Pin Value
bits : 11 - 11 (1 bit)
access : read-only

P12 : Pin Value
bits : 12 - 12 (1 bit)
access : read-only

P13 : Pin Value
bits : 13 - 13 (1 bit)
access : read-only

P14 : Pin Value
bits : 14 - 14 (1 bit)
access : read-only

P15 : Pin Value
bits : 15 - 15 (1 bit)
access : read-only

P16 : Pin Value
bits : 16 - 16 (1 bit)
access : read-only

P17 : Pin Value
bits : 17 - 17 (1 bit)
access : read-only

P18 : Pin Value
bits : 18 - 18 (1 bit)
access : read-only

P19 : Pin Value
bits : 19 - 19 (1 bit)
access : read-only

P20 : Pin Value
bits : 20 - 20 (1 bit)
access : read-only

P21 : Pin Value
bits : 21 - 21 (1 bit)
access : read-only

P22 : Pin Value
bits : 22 - 22 (1 bit)
access : read-only

P23 : Pin Value
bits : 23 - 23 (1 bit)
access : read-only

P24 : Pin Value
bits : 24 - 24 (1 bit)
access : read-only

P25 : Pin Value
bits : 25 - 25 (1 bit)
access : read-only

P26 : Pin Value
bits : 26 - 26 (1 bit)
access : read-only

P27 : Pin Value
bits : 27 - 27 (1 bit)
access : read-only

P28 : Pin Value
bits : 28 - 28 (1 bit)
access : read-only

P29 : Pin Value
bits : 29 - 29 (1 bit)
access : read-only

P30 : Pin Value
bits : 30 - 30 (1 bit)
access : read-only

P31 : Pin Value
bits : 31 - 31 (1 bit)
access : read-only


UNLOCK1

Unlock Register
address_offset : 0x7A0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

UNLOCK1 UNLOCK1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR KEY

ADDR : Offset Register
bits : 0 - 9 (10 bit)
access : write-only

KEY : Unlocking Key
bits : 24 - 31 (8 bit)


ASR1

Access Status Register
address_offset : 0x7AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ASR1 ASR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AR

AR : Access Error
bits : 0 - 0 (1 bit)


PUER2

Pull-up Enable Register
address_offset : 0x7C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUER2 PUER2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-up Enable
bits : 0 - 0 (1 bit)

P1 : Pull-up Enable
bits : 1 - 1 (1 bit)

P2 : Pull-up Enable
bits : 2 - 2 (1 bit)

P3 : Pull-up Enable
bits : 3 - 3 (1 bit)

P4 : Pull-up Enable
bits : 4 - 4 (1 bit)

P5 : Pull-up Enable
bits : 5 - 5 (1 bit)

P6 : Pull-up Enable
bits : 6 - 6 (1 bit)

P7 : Pull-up Enable
bits : 7 - 7 (1 bit)

P8 : Pull-up Enable
bits : 8 - 8 (1 bit)

P9 : Pull-up Enable
bits : 9 - 9 (1 bit)

P10 : Pull-up Enable
bits : 10 - 10 (1 bit)

P11 : Pull-up Enable
bits : 11 - 11 (1 bit)

P12 : Pull-up Enable
bits : 12 - 12 (1 bit)

P13 : Pull-up Enable
bits : 13 - 13 (1 bit)

P14 : Pull-up Enable
bits : 14 - 14 (1 bit)

P15 : Pull-up Enable
bits : 15 - 15 (1 bit)

P16 : Pull-up Enable
bits : 16 - 16 (1 bit)

P17 : Pull-up Enable
bits : 17 - 17 (1 bit)

P18 : Pull-up Enable
bits : 18 - 18 (1 bit)

P19 : Pull-up Enable
bits : 19 - 19 (1 bit)

P20 : Pull-up Enable
bits : 20 - 20 (1 bit)

P21 : Pull-up Enable
bits : 21 - 21 (1 bit)

P22 : Pull-up Enable
bits : 22 - 22 (1 bit)

P23 : Pull-up Enable
bits : 23 - 23 (1 bit)

P24 : Pull-up Enable
bits : 24 - 24 (1 bit)

P25 : Pull-up Enable
bits : 25 - 25 (1 bit)

P26 : Pull-up Enable
bits : 26 - 26 (1 bit)

P27 : Pull-up Enable
bits : 27 - 27 (1 bit)

P28 : Pull-up Enable
bits : 28 - 28 (1 bit)

P29 : Pull-up Enable
bits : 29 - 29 (1 bit)

P30 : Pull-up Enable
bits : 30 - 30 (1 bit)

P31 : Pull-up Enable
bits : 31 - 31 (1 bit)


PUERS2

Pull-up Enable Register - Set
address_offset : 0x7D0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PUERS2 PUERS2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-up Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Pull-up Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Pull-up Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Pull-up Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Pull-up Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Pull-up Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Pull-up Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Pull-up Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Pull-up Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Pull-up Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Pull-up Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Pull-up Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Pull-up Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Pull-up Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Pull-up Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Pull-up Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Pull-up Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Pull-up Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Pull-up Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Pull-up Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Pull-up Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Pull-up Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Pull-up Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Pull-up Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Pull-up Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Pull-up Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Pull-up Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Pull-up Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Pull-up Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Pull-up Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Pull-up Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Pull-up Enable
bits : 31 - 31 (1 bit)
access : write-only


PUERC2

Pull-up Enable Register - Clear
address_offset : 0x7E0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PUERC2 PUERC2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-up Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Pull-up Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Pull-up Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Pull-up Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Pull-up Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Pull-up Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Pull-up Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Pull-up Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Pull-up Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Pull-up Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Pull-up Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Pull-up Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Pull-up Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Pull-up Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Pull-up Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Pull-up Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Pull-up Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Pull-up Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Pull-up Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Pull-up Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Pull-up Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Pull-up Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Pull-up Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Pull-up Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Pull-up Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Pull-up Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Pull-up Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Pull-up Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Pull-up Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Pull-up Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Pull-up Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Pull-up Enable
bits : 31 - 31 (1 bit)
access : write-only


PARAMETER1

Parameter Register
address_offset : 0x7E8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PARAMETER1 PARAMETER1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PARAMETER

PARAMETER : Parameter
bits : 0 - 31 (32 bit)


PUERT2

Pull-up Enable Register - Toggle
address_offset : 0x7F0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PUERT2 PUERT2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-up Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Pull-up Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Pull-up Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Pull-up Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Pull-up Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Pull-up Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Pull-up Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Pull-up Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Pull-up Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Pull-up Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Pull-up Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Pull-up Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Pull-up Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Pull-up Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Pull-up Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Pull-up Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Pull-up Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Pull-up Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Pull-up Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Pull-up Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Pull-up Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Pull-up Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Pull-up Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Pull-up Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Pull-up Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Pull-up Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Pull-up Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Pull-up Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Pull-up Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Pull-up Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Pull-up Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Pull-up Enable
bits : 31 - 31 (1 bit)
access : write-only


VERSION1

Version Register
address_offset : 0x7F4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

VERSION1 VERSION1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VERSION VARIANT

VERSION : Version Number
bits : 0 - 11 (12 bit)
access : read-only

VARIANT : Variant Number
bits : 16 - 19 (4 bit)
access : read-only


GPERS0

GPIO Enable Register - Set
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GPERS0 GPERS0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : GPIO Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : GPIO Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : GPIO Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : GPIO Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : GPIO Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : GPIO Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : GPIO Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : GPIO Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : GPIO Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : GPIO Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : GPIO Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : GPIO Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : GPIO Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : GPIO Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : GPIO Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : GPIO Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : GPIO Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : GPIO Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : GPIO Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : GPIO Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : GPIO Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : GPIO Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : GPIO Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : GPIO Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : GPIO Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : GPIO Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : GPIO Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : GPIO Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : GPIO Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : GPIO Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : GPIO Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : GPIO Enable
bits : 31 - 31 (1 bit)
access : write-only


ODER0

Output Driver Enable Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODER0 ODER0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driver Enable
bits : 0 - 0 (1 bit)

P1 : Output Driver Enable
bits : 1 - 1 (1 bit)

P2 : Output Driver Enable
bits : 2 - 2 (1 bit)

P3 : Output Driver Enable
bits : 3 - 3 (1 bit)

P4 : Output Driver Enable
bits : 4 - 4 (1 bit)

P5 : Output Driver Enable
bits : 5 - 5 (1 bit)

P6 : Output Driver Enable
bits : 6 - 6 (1 bit)

P7 : Output Driver Enable
bits : 7 - 7 (1 bit)

P8 : Output Driver Enable
bits : 8 - 8 (1 bit)

P9 : Output Driver Enable
bits : 9 - 9 (1 bit)

P10 : Output Driver Enable
bits : 10 - 10 (1 bit)

P11 : Output Driver Enable
bits : 11 - 11 (1 bit)

P12 : Output Driver Enable
bits : 12 - 12 (1 bit)

P13 : Output Driver Enable
bits : 13 - 13 (1 bit)

P14 : Output Driver Enable
bits : 14 - 14 (1 bit)

P15 : Output Driver Enable
bits : 15 - 15 (1 bit)

P16 : Output Driver Enable
bits : 16 - 16 (1 bit)

P17 : Output Driver Enable
bits : 17 - 17 (1 bit)

P18 : Output Driver Enable
bits : 18 - 18 (1 bit)

P19 : Output Driver Enable
bits : 19 - 19 (1 bit)

P20 : Output Driver Enable
bits : 20 - 20 (1 bit)

P21 : Output Driver Enable
bits : 21 - 21 (1 bit)

P22 : Output Driver Enable
bits : 22 - 22 (1 bit)

P23 : Output Driver Enable
bits : 23 - 23 (1 bit)

P24 : Output Driver Enable
bits : 24 - 24 (1 bit)

P25 : Output Driver Enable
bits : 25 - 25 (1 bit)

P26 : Output Driver Enable
bits : 26 - 26 (1 bit)

P27 : Output Driver Enable
bits : 27 - 27 (1 bit)

P28 : Output Driver Enable
bits : 28 - 28 (1 bit)

P29 : Output Driver Enable
bits : 29 - 29 (1 bit)

P30 : Output Driver Enable
bits : 30 - 30 (1 bit)

P31 : Output Driver Enable
bits : 31 - 31 (1 bit)


PDER2

Pull-down Enable Register
address_offset : 0x800 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDER2 PDER2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-down Enable
bits : 0 - 0 (1 bit)

P1 : Pull-down Enable
bits : 1 - 1 (1 bit)

P2 : Pull-down Enable
bits : 2 - 2 (1 bit)

P3 : Pull-down Enable
bits : 3 - 3 (1 bit)

P4 : Pull-down Enable
bits : 4 - 4 (1 bit)

P5 : Pull-down Enable
bits : 5 - 5 (1 bit)

P6 : Pull-down Enable
bits : 6 - 6 (1 bit)

P7 : Pull-down Enable
bits : 7 - 7 (1 bit)

P8 : Pull-down Enable
bits : 8 - 8 (1 bit)

P9 : Pull-down Enable
bits : 9 - 9 (1 bit)

P10 : Pull-down Enable
bits : 10 - 10 (1 bit)

P11 : Pull-down Enable
bits : 11 - 11 (1 bit)

P12 : Pull-down Enable
bits : 12 - 12 (1 bit)

P13 : Pull-down Enable
bits : 13 - 13 (1 bit)

P14 : Pull-down Enable
bits : 14 - 14 (1 bit)

P15 : Pull-down Enable
bits : 15 - 15 (1 bit)

P16 : Pull-down Enable
bits : 16 - 16 (1 bit)

P17 : Pull-down Enable
bits : 17 - 17 (1 bit)

P18 : Pull-down Enable
bits : 18 - 18 (1 bit)

P19 : Pull-down Enable
bits : 19 - 19 (1 bit)

P20 : Pull-down Enable
bits : 20 - 20 (1 bit)

P21 : Pull-down Enable
bits : 21 - 21 (1 bit)

P22 : Pull-down Enable
bits : 22 - 22 (1 bit)

P23 : Pull-down Enable
bits : 23 - 23 (1 bit)

P24 : Pull-down Enable
bits : 24 - 24 (1 bit)

P25 : Pull-down Enable
bits : 25 - 25 (1 bit)

P26 : Pull-down Enable
bits : 26 - 26 (1 bit)

P27 : Pull-down Enable
bits : 27 - 27 (1 bit)

P28 : Pull-down Enable
bits : 28 - 28 (1 bit)

P29 : Pull-down Enable
bits : 29 - 29 (1 bit)

P30 : Pull-down Enable
bits : 30 - 30 (1 bit)

P31 : Pull-down Enable
bits : 31 - 31 (1 bit)


PDERS2

Pull-down Enable Register - Set
address_offset : 0x810 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PDERS2 PDERS2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-down Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Pull-down Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Pull-down Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Pull-down Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Pull-down Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Pull-down Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Pull-down Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Pull-down Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Pull-down Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Pull-down Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Pull-down Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Pull-down Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Pull-down Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Pull-down Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Pull-down Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Pull-down Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Pull-down Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Pull-down Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Pull-down Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Pull-down Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Pull-down Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Pull-down Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Pull-down Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Pull-down Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Pull-down Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Pull-down Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Pull-down Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Pull-down Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Pull-down Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Pull-down Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Pull-down Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Pull-down Enable
bits : 31 - 31 (1 bit)
access : write-only


PDERC2

Pull-down Enable Register - Clear
address_offset : 0x820 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PDERC2 PDERC2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-down Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Pull-down Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Pull-down Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Pull-down Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Pull-down Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Pull-down Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Pull-down Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Pull-down Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Pull-down Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Pull-down Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Pull-down Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Pull-down Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Pull-down Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Pull-down Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Pull-down Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Pull-down Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Pull-down Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Pull-down Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Pull-down Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Pull-down Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Pull-down Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Pull-down Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Pull-down Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Pull-down Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Pull-down Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Pull-down Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Pull-down Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Pull-down Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Pull-down Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Pull-down Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Pull-down Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Pull-down Enable
bits : 31 - 31 (1 bit)
access : write-only


PDERT2

Pull-down Enable Register - Toggle
address_offset : 0x830 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PDERT2 PDERT2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-down Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Pull-down Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Pull-down Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Pull-down Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Pull-down Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Pull-down Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Pull-down Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Pull-down Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Pull-down Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Pull-down Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Pull-down Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Pull-down Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Pull-down Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Pull-down Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Pull-down Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Pull-down Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Pull-down Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Pull-down Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Pull-down Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Pull-down Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Pull-down Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Pull-down Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Pull-down Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Pull-down Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Pull-down Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Pull-down Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Pull-down Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Pull-down Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Pull-down Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Pull-down Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Pull-down Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Pull-down Enable
bits : 31 - 31 (1 bit)
access : write-only


IER2

Interrupt Enable Register
address_offset : 0x840 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IER2 IER2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Enable
bits : 0 - 0 (1 bit)

P1 : Interrupt Enable
bits : 1 - 1 (1 bit)

P2 : Interrupt Enable
bits : 2 - 2 (1 bit)

P3 : Interrupt Enable
bits : 3 - 3 (1 bit)

P4 : Interrupt Enable
bits : 4 - 4 (1 bit)

P5 : Interrupt Enable
bits : 5 - 5 (1 bit)

P6 : Interrupt Enable
bits : 6 - 6 (1 bit)

P7 : Interrupt Enable
bits : 7 - 7 (1 bit)

P8 : Interrupt Enable
bits : 8 - 8 (1 bit)

P9 : Interrupt Enable
bits : 9 - 9 (1 bit)

P10 : Interrupt Enable
bits : 10 - 10 (1 bit)

P11 : Interrupt Enable
bits : 11 - 11 (1 bit)

P12 : Interrupt Enable
bits : 12 - 12 (1 bit)

P13 : Interrupt Enable
bits : 13 - 13 (1 bit)

P14 : Interrupt Enable
bits : 14 - 14 (1 bit)

P15 : Interrupt Enable
bits : 15 - 15 (1 bit)

P16 : Interrupt Enable
bits : 16 - 16 (1 bit)

P17 : Interrupt Enable
bits : 17 - 17 (1 bit)

P18 : Interrupt Enable
bits : 18 - 18 (1 bit)

P19 : Interrupt Enable
bits : 19 - 19 (1 bit)

P20 : Interrupt Enable
bits : 20 - 20 (1 bit)

P21 : Interrupt Enable
bits : 21 - 21 (1 bit)

P22 : Interrupt Enable
bits : 22 - 22 (1 bit)

P23 : Interrupt Enable
bits : 23 - 23 (1 bit)

P24 : Interrupt Enable
bits : 24 - 24 (1 bit)

P25 : Interrupt Enable
bits : 25 - 25 (1 bit)

P26 : Interrupt Enable
bits : 26 - 26 (1 bit)

P27 : Interrupt Enable
bits : 27 - 27 (1 bit)

P28 : Interrupt Enable
bits : 28 - 28 (1 bit)

P29 : Interrupt Enable
bits : 29 - 29 (1 bit)

P30 : Interrupt Enable
bits : 30 - 30 (1 bit)

P31 : Interrupt Enable
bits : 31 - 31 (1 bit)


IERS2

Interrupt Enable Register - Set
address_offset : 0x850 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IERS2 IERS2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Enable
bits : 31 - 31 (1 bit)
access : write-only


IERC2

Interrupt Enable Register - Clear
address_offset : 0x860 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IERC2 IERC2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Enable
bits : 31 - 31 (1 bit)
access : write-only


IERT2

Interrupt Enable Register - Toggle
address_offset : 0x870 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IERT2 IERT2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Enable
bits : 31 - 31 (1 bit)
access : write-only


ODERS0

Output Driver Enable Register - Set
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ODERS0 ODERS0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driver Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Driver Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Driver Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Driver Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Driver Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Driver Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Driver Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Driver Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Driver Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Driver Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Driver Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Driver Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Driver Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Driver Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Driver Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Driver Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Driver Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Driver Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Driver Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Driver Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Driver Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Driver Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Driver Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Driver Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Driver Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Driver Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Driver Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Driver Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Driver Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Driver Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Driver Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Driver Enable
bits : 31 - 31 (1 bit)
access : write-only


IMR02

Interrupt Mode Register 0
address_offset : 0x880 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMR02 IMR02 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 0
bits : 0 - 0 (1 bit)

P1 : Interrupt Mode Bit 0
bits : 1 - 1 (1 bit)

P2 : Interrupt Mode Bit 0
bits : 2 - 2 (1 bit)

P3 : Interrupt Mode Bit 0
bits : 3 - 3 (1 bit)

P4 : Interrupt Mode Bit 0
bits : 4 - 4 (1 bit)

P5 : Interrupt Mode Bit 0
bits : 5 - 5 (1 bit)

P6 : Interrupt Mode Bit 0
bits : 6 - 6 (1 bit)

P7 : Interrupt Mode Bit 0
bits : 7 - 7 (1 bit)

P8 : Interrupt Mode Bit 0
bits : 8 - 8 (1 bit)

P9 : Interrupt Mode Bit 0
bits : 9 - 9 (1 bit)

P10 : Interrupt Mode Bit 0
bits : 10 - 10 (1 bit)

P11 : Interrupt Mode Bit 0
bits : 11 - 11 (1 bit)

P12 : Interrupt Mode Bit 0
bits : 12 - 12 (1 bit)

P13 : Interrupt Mode Bit 0
bits : 13 - 13 (1 bit)

P14 : Interrupt Mode Bit 0
bits : 14 - 14 (1 bit)

P15 : Interrupt Mode Bit 0
bits : 15 - 15 (1 bit)

P16 : Interrupt Mode Bit 0
bits : 16 - 16 (1 bit)

P17 : Interrupt Mode Bit 0
bits : 17 - 17 (1 bit)

P18 : Interrupt Mode Bit 0
bits : 18 - 18 (1 bit)

P19 : Interrupt Mode Bit 0
bits : 19 - 19 (1 bit)

P20 : Interrupt Mode Bit 0
bits : 20 - 20 (1 bit)

P21 : Interrupt Mode Bit 0
bits : 21 - 21 (1 bit)

P22 : Interrupt Mode Bit 0
bits : 22 - 22 (1 bit)

P23 : Interrupt Mode Bit 0
bits : 23 - 23 (1 bit)

P24 : Interrupt Mode Bit 0
bits : 24 - 24 (1 bit)

P25 : Interrupt Mode Bit 0
bits : 25 - 25 (1 bit)

P26 : Interrupt Mode Bit 0
bits : 26 - 26 (1 bit)

P27 : Interrupt Mode Bit 0
bits : 27 - 27 (1 bit)

P28 : Interrupt Mode Bit 0
bits : 28 - 28 (1 bit)

P29 : Interrupt Mode Bit 0
bits : 29 - 29 (1 bit)

P30 : Interrupt Mode Bit 0
bits : 30 - 30 (1 bit)

P31 : Interrupt Mode Bit 0
bits : 31 - 31 (1 bit)


IMR0S2

Interrupt Mode Register 0 - Set
address_offset : 0x890 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IMR0S2 IMR0S2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 0
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Mode Bit 0
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Mode Bit 0
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Mode Bit 0
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Mode Bit 0
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Mode Bit 0
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Mode Bit 0
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Mode Bit 0
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Mode Bit 0
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Mode Bit 0
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Mode Bit 0
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Mode Bit 0
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Mode Bit 0
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Mode Bit 0
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Mode Bit 0
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Mode Bit 0
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Mode Bit 0
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Mode Bit 0
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Mode Bit 0
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Mode Bit 0
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Mode Bit 0
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Mode Bit 0
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Mode Bit 0
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Mode Bit 0
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Mode Bit 0
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Mode Bit 0
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Mode Bit 0
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Mode Bit 0
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Mode Bit 0
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Mode Bit 0
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Mode Bit 0
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Mode Bit 0
bits : 31 - 31 (1 bit)
access : write-only


IMR0C2

Interrupt Mode Register 0 - Clear
address_offset : 0x8A0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IMR0C2 IMR0C2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 0
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Mode Bit 0
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Mode Bit 0
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Mode Bit 0
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Mode Bit 0
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Mode Bit 0
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Mode Bit 0
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Mode Bit 0
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Mode Bit 0
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Mode Bit 0
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Mode Bit 0
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Mode Bit 0
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Mode Bit 0
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Mode Bit 0
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Mode Bit 0
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Mode Bit 0
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Mode Bit 0
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Mode Bit 0
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Mode Bit 0
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Mode Bit 0
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Mode Bit 0
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Mode Bit 0
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Mode Bit 0
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Mode Bit 0
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Mode Bit 0
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Mode Bit 0
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Mode Bit 0
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Mode Bit 0
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Mode Bit 0
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Mode Bit 0
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Mode Bit 0
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Mode Bit 0
bits : 31 - 31 (1 bit)
access : write-only


IMR0T2

Interrupt Mode Register 0 - Toggle
address_offset : 0x8B0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IMR0T2 IMR0T2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 0
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Mode Bit 0
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Mode Bit 0
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Mode Bit 0
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Mode Bit 0
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Mode Bit 0
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Mode Bit 0
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Mode Bit 0
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Mode Bit 0
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Mode Bit 0
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Mode Bit 0
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Mode Bit 0
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Mode Bit 0
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Mode Bit 0
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Mode Bit 0
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Mode Bit 0
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Mode Bit 0
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Mode Bit 0
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Mode Bit 0
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Mode Bit 0
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Mode Bit 0
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Mode Bit 0
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Mode Bit 0
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Mode Bit 0
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Mode Bit 0
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Mode Bit 0
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Mode Bit 0
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Mode Bit 0
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Mode Bit 0
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Mode Bit 0
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Mode Bit 0
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Mode Bit 0
bits : 31 - 31 (1 bit)
access : write-only


IMR12

Interrupt Mode Register 1
address_offset : 0x8C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMR12 IMR12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 1
bits : 0 - 0 (1 bit)

P1 : Interrupt Mode Bit 1
bits : 1 - 1 (1 bit)

P2 : Interrupt Mode Bit 1
bits : 2 - 2 (1 bit)

P3 : Interrupt Mode Bit 1
bits : 3 - 3 (1 bit)

P4 : Interrupt Mode Bit 1
bits : 4 - 4 (1 bit)

P5 : Interrupt Mode Bit 1
bits : 5 - 5 (1 bit)

P6 : Interrupt Mode Bit 1
bits : 6 - 6 (1 bit)

P7 : Interrupt Mode Bit 1
bits : 7 - 7 (1 bit)

P8 : Interrupt Mode Bit 1
bits : 8 - 8 (1 bit)

P9 : Interrupt Mode Bit 1
bits : 9 - 9 (1 bit)

P10 : Interrupt Mode Bit 1
bits : 10 - 10 (1 bit)

P11 : Interrupt Mode Bit 1
bits : 11 - 11 (1 bit)

P12 : Interrupt Mode Bit 1
bits : 12 - 12 (1 bit)

P13 : Interrupt Mode Bit 1
bits : 13 - 13 (1 bit)

P14 : Interrupt Mode Bit 1
bits : 14 - 14 (1 bit)

P15 : Interrupt Mode Bit 1
bits : 15 - 15 (1 bit)

P16 : Interrupt Mode Bit 1
bits : 16 - 16 (1 bit)

P17 : Interrupt Mode Bit 1
bits : 17 - 17 (1 bit)

P18 : Interrupt Mode Bit 1
bits : 18 - 18 (1 bit)

P19 : Interrupt Mode Bit 1
bits : 19 - 19 (1 bit)

P20 : Interrupt Mode Bit 1
bits : 20 - 20 (1 bit)

P21 : Interrupt Mode Bit 1
bits : 21 - 21 (1 bit)

P22 : Interrupt Mode Bit 1
bits : 22 - 22 (1 bit)

P23 : Interrupt Mode Bit 1
bits : 23 - 23 (1 bit)

P24 : Interrupt Mode Bit 1
bits : 24 - 24 (1 bit)

P25 : Interrupt Mode Bit 1
bits : 25 - 25 (1 bit)

P26 : Interrupt Mode Bit 1
bits : 26 - 26 (1 bit)

P27 : Interrupt Mode Bit 1
bits : 27 - 27 (1 bit)

P28 : Interrupt Mode Bit 1
bits : 28 - 28 (1 bit)

P29 : Interrupt Mode Bit 1
bits : 29 - 29 (1 bit)

P30 : Interrupt Mode Bit 1
bits : 30 - 30 (1 bit)

P31 : Interrupt Mode Bit 1
bits : 31 - 31 (1 bit)


IMR1S2

Interrupt Mode Register 1 - Set
address_offset : 0x8D0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IMR1S2 IMR1S2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 1
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Mode Bit 1
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Mode Bit 1
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Mode Bit 1
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Mode Bit 1
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Mode Bit 1
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Mode Bit 1
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Mode Bit 1
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Mode Bit 1
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Mode Bit 1
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Mode Bit 1
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Mode Bit 1
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Mode Bit 1
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Mode Bit 1
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Mode Bit 1
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Mode Bit 1
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Mode Bit 1
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Mode Bit 1
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Mode Bit 1
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Mode Bit 1
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Mode Bit 1
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Mode Bit 1
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Mode Bit 1
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Mode Bit 1
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Mode Bit 1
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Mode Bit 1
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Mode Bit 1
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Mode Bit 1
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Mode Bit 1
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Mode Bit 1
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Mode Bit 1
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Mode Bit 1
bits : 31 - 31 (1 bit)
access : write-only


IMR1C2

Interrupt Mode Register 1 - Clear
address_offset : 0x8E0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IMR1C2 IMR1C2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 1
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Mode Bit 1
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Mode Bit 1
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Mode Bit 1
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Mode Bit 1
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Mode Bit 1
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Mode Bit 1
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Mode Bit 1
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Mode Bit 1
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Mode Bit 1
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Mode Bit 1
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Mode Bit 1
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Mode Bit 1
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Mode Bit 1
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Mode Bit 1
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Mode Bit 1
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Mode Bit 1
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Mode Bit 1
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Mode Bit 1
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Mode Bit 1
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Mode Bit 1
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Mode Bit 1
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Mode Bit 1
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Mode Bit 1
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Mode Bit 1
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Mode Bit 1
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Mode Bit 1
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Mode Bit 1
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Mode Bit 1
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Mode Bit 1
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Mode Bit 1
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Mode Bit 1
bits : 31 - 31 (1 bit)
access : write-only


IMR1T2

Interrupt Mode Register 1 - Toggle
address_offset : 0x8F0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IMR1T2 IMR1T2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Mode Bit 1
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Mode Bit 1
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Mode Bit 1
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Mode Bit 1
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Mode Bit 1
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Mode Bit 1
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Mode Bit 1
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Mode Bit 1
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Mode Bit 1
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Mode Bit 1
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Mode Bit 1
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Mode Bit 1
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Mode Bit 1
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Mode Bit 1
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Mode Bit 1
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Mode Bit 1
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Mode Bit 1
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Mode Bit 1
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Mode Bit 1
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Mode Bit 1
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Mode Bit 1
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Mode Bit 1
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Mode Bit 1
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Mode Bit 1
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Mode Bit 1
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Mode Bit 1
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Mode Bit 1
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Mode Bit 1
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Mode Bit 1
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Mode Bit 1
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Mode Bit 1
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Mode Bit 1
bits : 31 - 31 (1 bit)
access : write-only


ODERC0

Output Driver Enable Register - Clear
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ODERC0 ODERC0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driver Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Driver Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Driver Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Driver Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Driver Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Driver Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Driver Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Driver Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Driver Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Driver Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Driver Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Driver Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Driver Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Driver Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Driver Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Driver Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Driver Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Driver Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Driver Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Driver Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Driver Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Driver Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Driver Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Driver Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Driver Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Driver Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Driver Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Driver Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Driver Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Driver Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Driver Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Driver Enable
bits : 31 - 31 (1 bit)
access : write-only


GFER2

Glitch Filter Enable Register
address_offset : 0x900 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GFER2 GFER2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Glitch Filter Enable
bits : 0 - 0 (1 bit)

P1 : Glitch Filter Enable
bits : 1 - 1 (1 bit)

P2 : Glitch Filter Enable
bits : 2 - 2 (1 bit)

P3 : Glitch Filter Enable
bits : 3 - 3 (1 bit)

P4 : Glitch Filter Enable
bits : 4 - 4 (1 bit)

P5 : Glitch Filter Enable
bits : 5 - 5 (1 bit)

P6 : Glitch Filter Enable
bits : 6 - 6 (1 bit)

P7 : Glitch Filter Enable
bits : 7 - 7 (1 bit)

P8 : Glitch Filter Enable
bits : 8 - 8 (1 bit)

P9 : Glitch Filter Enable
bits : 9 - 9 (1 bit)

P10 : Glitch Filter Enable
bits : 10 - 10 (1 bit)

P11 : Glitch Filter Enable
bits : 11 - 11 (1 bit)

P12 : Glitch Filter Enable
bits : 12 - 12 (1 bit)

P13 : Glitch Filter Enable
bits : 13 - 13 (1 bit)

P14 : Glitch Filter Enable
bits : 14 - 14 (1 bit)

P15 : Glitch Filter Enable
bits : 15 - 15 (1 bit)

P16 : Glitch Filter Enable
bits : 16 - 16 (1 bit)

P17 : Glitch Filter Enable
bits : 17 - 17 (1 bit)

P18 : Glitch Filter Enable
bits : 18 - 18 (1 bit)

P19 : Glitch Filter Enable
bits : 19 - 19 (1 bit)

P20 : Glitch Filter Enable
bits : 20 - 20 (1 bit)

P21 : Glitch Filter Enable
bits : 21 - 21 (1 bit)

P22 : Glitch Filter Enable
bits : 22 - 22 (1 bit)

P23 : Glitch Filter Enable
bits : 23 - 23 (1 bit)

P24 : Glitch Filter Enable
bits : 24 - 24 (1 bit)

P25 : Glitch Filter Enable
bits : 25 - 25 (1 bit)

P26 : Glitch Filter Enable
bits : 26 - 26 (1 bit)

P27 : Glitch Filter Enable
bits : 27 - 27 (1 bit)

P28 : Glitch Filter Enable
bits : 28 - 28 (1 bit)

P29 : Glitch Filter Enable
bits : 29 - 29 (1 bit)

P30 : Glitch Filter Enable
bits : 30 - 30 (1 bit)

P31 : Glitch Filter Enable
bits : 31 - 31 (1 bit)


GFERS2

Glitch Filter Enable Register - Set
address_offset : 0x910 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GFERS2 GFERS2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Glitch Filter Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Glitch Filter Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Glitch Filter Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Glitch Filter Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Glitch Filter Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Glitch Filter Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Glitch Filter Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Glitch Filter Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Glitch Filter Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Glitch Filter Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Glitch Filter Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Glitch Filter Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Glitch Filter Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Glitch Filter Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Glitch Filter Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Glitch Filter Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Glitch Filter Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Glitch Filter Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Glitch Filter Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Glitch Filter Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Glitch Filter Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Glitch Filter Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Glitch Filter Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Glitch Filter Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Glitch Filter Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Glitch Filter Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Glitch Filter Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Glitch Filter Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Glitch Filter Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Glitch Filter Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Glitch Filter Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Glitch Filter Enable
bits : 31 - 31 (1 bit)
access : write-only


GFERC2

Glitch Filter Enable Register - Clear
address_offset : 0x920 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GFERC2 GFERC2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Glitch Filter Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Glitch Filter Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Glitch Filter Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Glitch Filter Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Glitch Filter Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Glitch Filter Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Glitch Filter Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Glitch Filter Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Glitch Filter Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Glitch Filter Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Glitch Filter Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Glitch Filter Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Glitch Filter Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Glitch Filter Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Glitch Filter Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Glitch Filter Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Glitch Filter Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Glitch Filter Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Glitch Filter Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Glitch Filter Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Glitch Filter Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Glitch Filter Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Glitch Filter Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Glitch Filter Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Glitch Filter Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Glitch Filter Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Glitch Filter Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Glitch Filter Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Glitch Filter Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Glitch Filter Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Glitch Filter Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Glitch Filter Enable
bits : 31 - 31 (1 bit)
access : write-only


GFERT2

Glitch Filter Enable Register - Toggle
address_offset : 0x930 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GFERT2 GFERT2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Glitch Filter Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Glitch Filter Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Glitch Filter Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Glitch Filter Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Glitch Filter Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Glitch Filter Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Glitch Filter Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Glitch Filter Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Glitch Filter Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Glitch Filter Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Glitch Filter Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Glitch Filter Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Glitch Filter Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Glitch Filter Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Glitch Filter Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Glitch Filter Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Glitch Filter Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Glitch Filter Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Glitch Filter Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Glitch Filter Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Glitch Filter Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Glitch Filter Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Glitch Filter Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Glitch Filter Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Glitch Filter Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Glitch Filter Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Glitch Filter Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Glitch Filter Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Glitch Filter Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Glitch Filter Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Glitch Filter Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Glitch Filter Enable
bits : 31 - 31 (1 bit)
access : write-only


IFR2

Interrupt Flag Register
address_offset : 0x940 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IFR2 IFR2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Flag
bits : 0 - 0 (1 bit)
access : read-only

P1 : Interrupt Flag
bits : 1 - 1 (1 bit)
access : read-only

P2 : Interrupt Flag
bits : 2 - 2 (1 bit)
access : read-only

P3 : Interrupt Flag
bits : 3 - 3 (1 bit)
access : read-only

P4 : Interrupt Flag
bits : 4 - 4 (1 bit)
access : read-only

P5 : Interrupt Flag
bits : 5 - 5 (1 bit)
access : read-only

P6 : Interrupt Flag
bits : 6 - 6 (1 bit)
access : read-only

P7 : Interrupt Flag
bits : 7 - 7 (1 bit)
access : read-only

P8 : Interrupt Flag
bits : 8 - 8 (1 bit)
access : read-only

P9 : Interrupt Flag
bits : 9 - 9 (1 bit)
access : read-only

P10 : Interrupt Flag
bits : 10 - 10 (1 bit)
access : read-only

P11 : Interrupt Flag
bits : 11 - 11 (1 bit)
access : read-only

P12 : Interrupt Flag
bits : 12 - 12 (1 bit)
access : read-only

P13 : Interrupt Flag
bits : 13 - 13 (1 bit)
access : read-only

P14 : Interrupt Flag
bits : 14 - 14 (1 bit)
access : read-only

P15 : Interrupt Flag
bits : 15 - 15 (1 bit)
access : read-only

P16 : Interrupt Flag
bits : 16 - 16 (1 bit)
access : read-only

P17 : Interrupt Flag
bits : 17 - 17 (1 bit)
access : read-only

P18 : Interrupt Flag
bits : 18 - 18 (1 bit)
access : read-only

P19 : Interrupt Flag
bits : 19 - 19 (1 bit)
access : read-only

P20 : Interrupt Flag
bits : 20 - 20 (1 bit)
access : read-only

P21 : Interrupt Flag
bits : 21 - 21 (1 bit)
access : read-only

P22 : Interrupt Flag
bits : 22 - 22 (1 bit)
access : read-only

P23 : Interrupt Flag
bits : 23 - 23 (1 bit)
access : read-only

P24 : Interrupt Flag
bits : 24 - 24 (1 bit)
access : read-only

P25 : Interrupt Flag
bits : 25 - 25 (1 bit)
access : read-only

P26 : Interrupt Flag
bits : 26 - 26 (1 bit)
access : read-only

P27 : Interrupt Flag
bits : 27 - 27 (1 bit)
access : read-only

P28 : Interrupt Flag
bits : 28 - 28 (1 bit)
access : read-only

P29 : Interrupt Flag
bits : 29 - 29 (1 bit)
access : read-only

P30 : Interrupt Flag
bits : 30 - 30 (1 bit)
access : read-only

P31 : Interrupt Flag
bits : 31 - 31 (1 bit)
access : read-only


IFRC2

Interrupt Flag Register - Clear
address_offset : 0x960 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IFRC2 IFRC2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Interrupt Flag
bits : 0 - 0 (1 bit)
access : write-only

P1 : Interrupt Flag
bits : 1 - 1 (1 bit)
access : write-only

P2 : Interrupt Flag
bits : 2 - 2 (1 bit)
access : write-only

P3 : Interrupt Flag
bits : 3 - 3 (1 bit)
access : write-only

P4 : Interrupt Flag
bits : 4 - 4 (1 bit)
access : write-only

P5 : Interrupt Flag
bits : 5 - 5 (1 bit)
access : write-only

P6 : Interrupt Flag
bits : 6 - 6 (1 bit)
access : write-only

P7 : Interrupt Flag
bits : 7 - 7 (1 bit)
access : write-only

P8 : Interrupt Flag
bits : 8 - 8 (1 bit)
access : write-only

P9 : Interrupt Flag
bits : 9 - 9 (1 bit)
access : write-only

P10 : Interrupt Flag
bits : 10 - 10 (1 bit)
access : write-only

P11 : Interrupt Flag
bits : 11 - 11 (1 bit)
access : write-only

P12 : Interrupt Flag
bits : 12 - 12 (1 bit)
access : write-only

P13 : Interrupt Flag
bits : 13 - 13 (1 bit)
access : write-only

P14 : Interrupt Flag
bits : 14 - 14 (1 bit)
access : write-only

P15 : Interrupt Flag
bits : 15 - 15 (1 bit)
access : write-only

P16 : Interrupt Flag
bits : 16 - 16 (1 bit)
access : write-only

P17 : Interrupt Flag
bits : 17 - 17 (1 bit)
access : write-only

P18 : Interrupt Flag
bits : 18 - 18 (1 bit)
access : write-only

P19 : Interrupt Flag
bits : 19 - 19 (1 bit)
access : write-only

P20 : Interrupt Flag
bits : 20 - 20 (1 bit)
access : write-only

P21 : Interrupt Flag
bits : 21 - 21 (1 bit)
access : write-only

P22 : Interrupt Flag
bits : 22 - 22 (1 bit)
access : write-only

P23 : Interrupt Flag
bits : 23 - 23 (1 bit)
access : write-only

P24 : Interrupt Flag
bits : 24 - 24 (1 bit)
access : write-only

P25 : Interrupt Flag
bits : 25 - 25 (1 bit)
access : write-only

P26 : Interrupt Flag
bits : 26 - 26 (1 bit)
access : write-only

P27 : Interrupt Flag
bits : 27 - 27 (1 bit)
access : write-only

P28 : Interrupt Flag
bits : 28 - 28 (1 bit)
access : write-only

P29 : Interrupt Flag
bits : 29 - 29 (1 bit)
access : write-only

P30 : Interrupt Flag
bits : 30 - 30 (1 bit)
access : write-only

P31 : Interrupt Flag
bits : 31 - 31 (1 bit)
access : write-only


ODERT0

Output Driver Enable Register - Toggle
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ODERT0 ODERT0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driver Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Driver Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Driver Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Driver Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Driver Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Driver Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Driver Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Driver Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Driver Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Driver Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Driver Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Driver Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Driver Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Driver Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Driver Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Driver Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Driver Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Driver Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Driver Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Driver Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Driver Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Driver Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Driver Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Driver Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Driver Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Driver Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Driver Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Driver Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Driver Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Driver Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Driver Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Driver Enable
bits : 31 - 31 (1 bit)
access : write-only


ODMER2

Open Drain Mode Register
address_offset : 0x980 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODMER2 ODMER2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Open Drain Mode Enable
bits : 0 - 0 (1 bit)

P1 : Open Drain Mode Enable
bits : 1 - 1 (1 bit)

P2 : Open Drain Mode Enable
bits : 2 - 2 (1 bit)

P3 : Open Drain Mode Enable
bits : 3 - 3 (1 bit)

P4 : Open Drain Mode Enable
bits : 4 - 4 (1 bit)

P5 : Open Drain Mode Enable
bits : 5 - 5 (1 bit)

P6 : Open Drain Mode Enable
bits : 6 - 6 (1 bit)

P7 : Open Drain Mode Enable
bits : 7 - 7 (1 bit)

P8 : Open Drain Mode Enable
bits : 8 - 8 (1 bit)

P9 : Open Drain Mode Enable
bits : 9 - 9 (1 bit)

P10 : Open Drain Mode Enable
bits : 10 - 10 (1 bit)

P11 : Open Drain Mode Enable
bits : 11 - 11 (1 bit)

P12 : Open Drain Mode Enable
bits : 12 - 12 (1 bit)

P13 : Open Drain Mode Enable
bits : 13 - 13 (1 bit)

P14 : Open Drain Mode Enable
bits : 14 - 14 (1 bit)

P15 : Open Drain Mode Enable
bits : 15 - 15 (1 bit)

P16 : Open Drain Mode Enable
bits : 16 - 16 (1 bit)

P17 : Open Drain Mode Enable
bits : 17 - 17 (1 bit)

P18 : Open Drain Mode Enable
bits : 18 - 18 (1 bit)

P19 : Open Drain Mode Enable
bits : 19 - 19 (1 bit)

P20 : Open Drain Mode Enable
bits : 20 - 20 (1 bit)

P21 : Open Drain Mode Enable
bits : 21 - 21 (1 bit)

P22 : Open Drain Mode Enable
bits : 22 - 22 (1 bit)

P23 : Open Drain Mode Enable
bits : 23 - 23 (1 bit)

P24 : Open Drain Mode Enable
bits : 24 - 24 (1 bit)

P25 : Open Drain Mode Enable
bits : 25 - 25 (1 bit)

P26 : Open Drain Mode Enable
bits : 26 - 26 (1 bit)

P27 : Open Drain Mode Enable
bits : 27 - 27 (1 bit)

P28 : Open Drain Mode Enable
bits : 28 - 28 (1 bit)

P29 : Open Drain Mode Enable
bits : 29 - 29 (1 bit)

P30 : Open Drain Mode Enable
bits : 30 - 30 (1 bit)

P31 : Open Drain Mode Enable
bits : 31 - 31 (1 bit)


ODMERS2

Open Drain Mode Register - Set
address_offset : 0x990 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ODMERS2 ODMERS2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Open Drain Mode Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Open Drain Mode Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Open Drain Mode Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Open Drain Mode Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Open Drain Mode Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Open Drain Mode Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Open Drain Mode Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Open Drain Mode Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Open Drain Mode Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Open Drain Mode Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Open Drain Mode Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Open Drain Mode Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Open Drain Mode Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Open Drain Mode Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Open Drain Mode Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Open Drain Mode Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Open Drain Mode Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Open Drain Mode Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Open Drain Mode Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Open Drain Mode Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Open Drain Mode Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Open Drain Mode Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Open Drain Mode Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Open Drain Mode Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Open Drain Mode Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Open Drain Mode Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Open Drain Mode Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Open Drain Mode Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Open Drain Mode Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Open Drain Mode Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Open Drain Mode Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Open Drain Mode Enable
bits : 31 - 31 (1 bit)
access : write-only


ODMERC2

Open Drain Mode Register - Clear
address_offset : 0x9A0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ODMERC2 ODMERC2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Open Drain Mode Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Open Drain Mode Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Open Drain Mode Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Open Drain Mode Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Open Drain Mode Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Open Drain Mode Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Open Drain Mode Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Open Drain Mode Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Open Drain Mode Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Open Drain Mode Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Open Drain Mode Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Open Drain Mode Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Open Drain Mode Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Open Drain Mode Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Open Drain Mode Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Open Drain Mode Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Open Drain Mode Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Open Drain Mode Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Open Drain Mode Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Open Drain Mode Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Open Drain Mode Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Open Drain Mode Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Open Drain Mode Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Open Drain Mode Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Open Drain Mode Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Open Drain Mode Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Open Drain Mode Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Open Drain Mode Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Open Drain Mode Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Open Drain Mode Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Open Drain Mode Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Open Drain Mode Enable
bits : 31 - 31 (1 bit)
access : write-only


ODMERT2

Open Drain Mode Register - Toggle
address_offset : 0x9B0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ODMERT2 ODMERT2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Open Drain Mode Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Open Drain Mode Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Open Drain Mode Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Open Drain Mode Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Open Drain Mode Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Open Drain Mode Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Open Drain Mode Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Open Drain Mode Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Open Drain Mode Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Open Drain Mode Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Open Drain Mode Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Open Drain Mode Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Open Drain Mode Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Open Drain Mode Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Open Drain Mode Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Open Drain Mode Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Open Drain Mode Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Open Drain Mode Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Open Drain Mode Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Open Drain Mode Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Open Drain Mode Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Open Drain Mode Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Open Drain Mode Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Open Drain Mode Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Open Drain Mode Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Open Drain Mode Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Open Drain Mode Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Open Drain Mode Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Open Drain Mode Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Open Drain Mode Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Open Drain Mode Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Open Drain Mode Enable
bits : 31 - 31 (1 bit)
access : write-only


OVR0

Output Value Register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OVR0 OVR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Value
bits : 0 - 0 (1 bit)

P1 : Output Value
bits : 1 - 1 (1 bit)

P2 : Output Value
bits : 2 - 2 (1 bit)

P3 : Output Value
bits : 3 - 3 (1 bit)

P4 : Output Value
bits : 4 - 4 (1 bit)

P5 : Output Value
bits : 5 - 5 (1 bit)

P6 : Output Value
bits : 6 - 6 (1 bit)

P7 : Output Value
bits : 7 - 7 (1 bit)

P8 : Output Value
bits : 8 - 8 (1 bit)

P9 : Output Value
bits : 9 - 9 (1 bit)

P10 : Output Value
bits : 10 - 10 (1 bit)

P11 : Output Value
bits : 11 - 11 (1 bit)

P12 : Output Value
bits : 12 - 12 (1 bit)

P13 : Output Value
bits : 13 - 13 (1 bit)

P14 : Output Value
bits : 14 - 14 (1 bit)

P15 : Output Value
bits : 15 - 15 (1 bit)

P16 : Output Value
bits : 16 - 16 (1 bit)

P17 : Output Value
bits : 17 - 17 (1 bit)

P18 : Output Value
bits : 18 - 18 (1 bit)

P19 : Output Value
bits : 19 - 19 (1 bit)

P20 : Output Value
bits : 20 - 20 (1 bit)

P21 : Output Value
bits : 21 - 21 (1 bit)

P22 : Output Value
bits : 22 - 22 (1 bit)

P23 : Output Value
bits : 23 - 23 (1 bit)

P24 : Output Value
bits : 24 - 24 (1 bit)

P25 : Output Value
bits : 25 - 25 (1 bit)

P26 : Output Value
bits : 26 - 26 (1 bit)

P27 : Output Value
bits : 27 - 27 (1 bit)

P28 : Output Value
bits : 28 - 28 (1 bit)

P29 : Output Value
bits : 29 - 29 (1 bit)

P30 : Output Value
bits : 30 - 30 (1 bit)

P31 : Output Value
bits : 31 - 31 (1 bit)


ODCR02

Output Driving Capability Register 0
address_offset : 0xA00 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR02 ODCR02 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 0
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 0
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 0
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 0
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 0
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 0
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 0
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 0
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 0
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 0
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 0
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 0
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 0
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 0
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 0
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 0
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 0
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 0
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 0
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 0
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 0
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 0
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 0
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 0
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 0
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 0
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 0
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 0
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 0
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 0
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 0
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 0
bits : 31 - 31 (1 bit)


ODCR0S2

Output Driving Capability Register 0 - Set
address_offset : 0xA10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR0S2 ODCR0S2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 0
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 0
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 0
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 0
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 0
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 0
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 0
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 0
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 0
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 0
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 0
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 0
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 0
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 0
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 0
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 0
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 0
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 0
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 0
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 0
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 0
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 0
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 0
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 0
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 0
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 0
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 0
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 0
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 0
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 0
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 0
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 0
bits : 31 - 31 (1 bit)


ODCR0C2

Output Driving Capability Register 0 - Clear
address_offset : 0xA20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR0C2 ODCR0C2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 0
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 0
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 0
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 0
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 0
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 0
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 0
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 0
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 0
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 0
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 0
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 0
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 0
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 0
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 0
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 0
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 0
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 0
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 0
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 0
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 0
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 0
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 0
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 0
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 0
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 0
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 0
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 0
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 0
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 0
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 0
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 0
bits : 31 - 31 (1 bit)


ODCR0T2

Output Driving Capability Register 0 - Toggle
address_offset : 0xA30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR0T2 ODCR0T2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 0
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 0
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 0
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 0
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 0
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 0
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 0
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 0
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 0
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 0
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 0
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 0
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 0
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 0
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 0
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 0
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 0
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 0
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 0
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 0
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 0
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 0
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 0
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 0
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 0
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 0
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 0
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 0
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 0
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 0
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 0
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 0
bits : 31 - 31 (1 bit)


ODCR12

Output Driving Capability Register 1
address_offset : 0xA40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR12 ODCR12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 1
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 1
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 1
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 1
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 1
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 1
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 1
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 1
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 1
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 1
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 1
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 1
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 1
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 1
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 1
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 1
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 1
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 1
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 1
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 1
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 1
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 1
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 1
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 1
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 1
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 1
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 1
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 1
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 1
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 1
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 1
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 1
bits : 31 - 31 (1 bit)


ODCR1S2

Output Driving Capability Register 1 - Set
address_offset : 0xA50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR1S2 ODCR1S2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 1
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 1
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 1
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 1
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 1
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 1
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 1
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 1
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 1
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 1
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 1
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 1
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 1
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 1
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 1
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 1
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 1
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 1
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 1
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 1
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 1
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 1
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 1
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 1
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 1
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 1
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 1
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 1
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 1
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 1
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 1
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 1
bits : 31 - 31 (1 bit)


ODCR1C2

Output Driving Capability Register 1 - Clear
address_offset : 0xA60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR1C2 ODCR1C2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 1
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 1
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 1
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 1
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 1
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 1
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 1
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 1
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 1
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 1
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 1
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 1
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 1
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 1
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 1
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 1
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 1
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 1
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 1
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 1
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 1
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 1
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 1
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 1
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 1
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 1
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 1
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 1
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 1
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 1
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 1
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 1
bits : 31 - 31 (1 bit)


ODCR1T2

Output Driving Capability Register 1 - Toggle
address_offset : 0xA70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODCR1T2 ODCR1T2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Driving Capability Register Bit 1
bits : 0 - 0 (1 bit)

P1 : Output Driving Capability Register Bit 1
bits : 1 - 1 (1 bit)

P2 : Output Driving Capability Register Bit 1
bits : 2 - 2 (1 bit)

P3 : Output Driving Capability Register Bit 1
bits : 3 - 3 (1 bit)

P4 : Output Driving Capability Register Bit 1
bits : 4 - 4 (1 bit)

P5 : Output Driving Capability Register Bit 1
bits : 5 - 5 (1 bit)

P6 : Output Driving Capability Register Bit 1
bits : 6 - 6 (1 bit)

P7 : Output Driving Capability Register Bit 1
bits : 7 - 7 (1 bit)

P8 : Output Driving Capability Register Bit 1
bits : 8 - 8 (1 bit)

P9 : Output Driving Capability Register Bit 1
bits : 9 - 9 (1 bit)

P10 : Output Driving Capability Register Bit 1
bits : 10 - 10 (1 bit)

P11 : Output Driving Capability Register Bit 1
bits : 11 - 11 (1 bit)

P12 : Output Driving Capability Register Bit 1
bits : 12 - 12 (1 bit)

P13 : Output Driving Capability Register Bit 1
bits : 13 - 13 (1 bit)

P14 : Output Driving Capability Register Bit 1
bits : 14 - 14 (1 bit)

P15 : Output Driving Capability Register Bit 1
bits : 15 - 15 (1 bit)

P16 : Output Driving Capability Register Bit 1
bits : 16 - 16 (1 bit)

P17 : Output Driving Capability Register Bit 1
bits : 17 - 17 (1 bit)

P18 : Output Driving Capability Register Bit 1
bits : 18 - 18 (1 bit)

P19 : Output Driving Capability Register Bit 1
bits : 19 - 19 (1 bit)

P20 : Output Driving Capability Register Bit 1
bits : 20 - 20 (1 bit)

P21 : Output Driving Capability Register Bit 1
bits : 21 - 21 (1 bit)

P22 : Output Driving Capability Register Bit 1
bits : 22 - 22 (1 bit)

P23 : Output Driving Capability Register Bit 1
bits : 23 - 23 (1 bit)

P24 : Output Driving Capability Register Bit 1
bits : 24 - 24 (1 bit)

P25 : Output Driving Capability Register Bit 1
bits : 25 - 25 (1 bit)

P26 : Output Driving Capability Register Bit 1
bits : 26 - 26 (1 bit)

P27 : Output Driving Capability Register Bit 1
bits : 27 - 27 (1 bit)

P28 : Output Driving Capability Register Bit 1
bits : 28 - 28 (1 bit)

P29 : Output Driving Capability Register Bit 1
bits : 29 - 29 (1 bit)

P30 : Output Driving Capability Register Bit 1
bits : 30 - 30 (1 bit)

P31 : Output Driving Capability Register Bit 1
bits : 31 - 31 (1 bit)


OVRS0

Output Value Register - Set
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

OVRS0 OVRS0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Value
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Value
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Value
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Value
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Value
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Value
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Value
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Value
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Value
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Value
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Value
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Value
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Value
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Value
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Value
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Value
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Value
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Value
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Value
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Value
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Value
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Value
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Value
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Value
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Value
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Value
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Value
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Value
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Value
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Value
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Value
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Value
bits : 31 - 31 (1 bit)
access : write-only


OSRR02

Output Slew Rate Register 0
address_offset : 0xAC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSRR02 OSRR02 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Slew Rate Control Enable
bits : 0 - 0 (1 bit)

P1 : Output Slew Rate Control Enable
bits : 1 - 1 (1 bit)

P2 : Output Slew Rate Control Enable
bits : 2 - 2 (1 bit)

P3 : Output Slew Rate Control Enable
bits : 3 - 3 (1 bit)

P4 : Output Slew Rate Control Enable
bits : 4 - 4 (1 bit)

P5 : Output Slew Rate Control Enable
bits : 5 - 5 (1 bit)

P6 : Output Slew Rate Control Enable
bits : 6 - 6 (1 bit)

P7 : Output Slew Rate Control Enable
bits : 7 - 7 (1 bit)

P8 : Output Slew Rate Control Enable
bits : 8 - 8 (1 bit)

P9 : Output Slew Rate Control Enable
bits : 9 - 9 (1 bit)

P10 : Output Slew Rate Control Enable
bits : 10 - 10 (1 bit)

P11 : Output Slew Rate Control Enable
bits : 11 - 11 (1 bit)

P12 : Output Slew Rate Control Enable
bits : 12 - 12 (1 bit)

P13 : Output Slew Rate Control Enable
bits : 13 - 13 (1 bit)

P14 : Output Slew Rate Control Enable
bits : 14 - 14 (1 bit)

P15 : Output Slew Rate Control Enable
bits : 15 - 15 (1 bit)

P16 : Output Slew Rate Control Enable
bits : 16 - 16 (1 bit)

P17 : Output Slew Rate Control Enable
bits : 17 - 17 (1 bit)

P18 : Output Slew Rate Control Enable
bits : 18 - 18 (1 bit)

P19 : Output Slew Rate Control Enable
bits : 19 - 19 (1 bit)

P20 : Output Slew Rate Control Enable
bits : 20 - 20 (1 bit)

P21 : Output Slew Rate Control Enable
bits : 21 - 21 (1 bit)

P22 : Output Slew Rate Control Enable
bits : 22 - 22 (1 bit)

P23 : Output Slew Rate Control Enable
bits : 23 - 23 (1 bit)

P24 : Output Slew Rate Control Enable
bits : 24 - 24 (1 bit)

P25 : Output Slew Rate Control Enable
bits : 25 - 25 (1 bit)

P26 : Output Slew Rate Control Enable
bits : 26 - 26 (1 bit)

P27 : Output Slew Rate Control Enable
bits : 27 - 27 (1 bit)

P28 : Output Slew Rate Control Enable
bits : 28 - 28 (1 bit)

P29 : Output Slew Rate Control Enable
bits : 29 - 29 (1 bit)

P30 : Output Slew Rate Control Enable
bits : 30 - 30 (1 bit)

P31 : Output Slew Rate Control Enable
bits : 31 - 31 (1 bit)


OSRR0S2

Output Slew Rate Register 0 - Set
address_offset : 0xAD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSRR0S2 OSRR0S2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Slew Rate Control Enable
bits : 0 - 0 (1 bit)

P1 : Output Slew Rate Control Enable
bits : 1 - 1 (1 bit)

P2 : Output Slew Rate Control Enable
bits : 2 - 2 (1 bit)

P3 : Output Slew Rate Control Enable
bits : 3 - 3 (1 bit)

P4 : Output Slew Rate Control Enable
bits : 4 - 4 (1 bit)

P5 : Output Slew Rate Control Enable
bits : 5 - 5 (1 bit)

P6 : Output Slew Rate Control Enable
bits : 6 - 6 (1 bit)

P7 : Output Slew Rate Control Enable
bits : 7 - 7 (1 bit)

P8 : Output Slew Rate Control Enable
bits : 8 - 8 (1 bit)

P9 : Output Slew Rate Control Enable
bits : 9 - 9 (1 bit)

P10 : Output Slew Rate Control Enable
bits : 10 - 10 (1 bit)

P11 : Output Slew Rate Control Enable
bits : 11 - 11 (1 bit)

P12 : Output Slew Rate Control Enable
bits : 12 - 12 (1 bit)

P13 : Output Slew Rate Control Enable
bits : 13 - 13 (1 bit)

P14 : Output Slew Rate Control Enable
bits : 14 - 14 (1 bit)

P15 : Output Slew Rate Control Enable
bits : 15 - 15 (1 bit)

P16 : Output Slew Rate Control Enable
bits : 16 - 16 (1 bit)

P17 : Output Slew Rate Control Enable
bits : 17 - 17 (1 bit)

P18 : Output Slew Rate Control Enable
bits : 18 - 18 (1 bit)

P19 : Output Slew Rate Control Enable
bits : 19 - 19 (1 bit)

P20 : Output Slew Rate Control Enable
bits : 20 - 20 (1 bit)

P21 : Output Slew Rate Control Enable
bits : 21 - 21 (1 bit)

P22 : Output Slew Rate Control Enable
bits : 22 - 22 (1 bit)

P23 : Output Slew Rate Control Enable
bits : 23 - 23 (1 bit)

P24 : Output Slew Rate Control Enable
bits : 24 - 24 (1 bit)

P25 : Output Slew Rate Control Enable
bits : 25 - 25 (1 bit)

P26 : Output Slew Rate Control Enable
bits : 26 - 26 (1 bit)

P27 : Output Slew Rate Control Enable
bits : 27 - 27 (1 bit)

P28 : Output Slew Rate Control Enable
bits : 28 - 28 (1 bit)

P29 : Output Slew Rate Control Enable
bits : 29 - 29 (1 bit)

P30 : Output Slew Rate Control Enable
bits : 30 - 30 (1 bit)

P31 : Output Slew Rate Control Enable
bits : 31 - 31 (1 bit)


OSRR0C2

Output Slew Rate Register 0 - Clear
address_offset : 0xAE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSRR0C2 OSRR0C2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Slew Rate Control Enable
bits : 0 - 0 (1 bit)

P1 : Output Slew Rate Control Enable
bits : 1 - 1 (1 bit)

P2 : Output Slew Rate Control Enable
bits : 2 - 2 (1 bit)

P3 : Output Slew Rate Control Enable
bits : 3 - 3 (1 bit)

P4 : Output Slew Rate Control Enable
bits : 4 - 4 (1 bit)

P5 : Output Slew Rate Control Enable
bits : 5 - 5 (1 bit)

P6 : Output Slew Rate Control Enable
bits : 6 - 6 (1 bit)

P7 : Output Slew Rate Control Enable
bits : 7 - 7 (1 bit)

P8 : Output Slew Rate Control Enable
bits : 8 - 8 (1 bit)

P9 : Output Slew Rate Control Enable
bits : 9 - 9 (1 bit)

P10 : Output Slew Rate Control Enable
bits : 10 - 10 (1 bit)

P11 : Output Slew Rate Control Enable
bits : 11 - 11 (1 bit)

P12 : Output Slew Rate Control Enable
bits : 12 - 12 (1 bit)

P13 : Output Slew Rate Control Enable
bits : 13 - 13 (1 bit)

P14 : Output Slew Rate Control Enable
bits : 14 - 14 (1 bit)

P15 : Output Slew Rate Control Enable
bits : 15 - 15 (1 bit)

P16 : Output Slew Rate Control Enable
bits : 16 - 16 (1 bit)

P17 : Output Slew Rate Control Enable
bits : 17 - 17 (1 bit)

P18 : Output Slew Rate Control Enable
bits : 18 - 18 (1 bit)

P19 : Output Slew Rate Control Enable
bits : 19 - 19 (1 bit)

P20 : Output Slew Rate Control Enable
bits : 20 - 20 (1 bit)

P21 : Output Slew Rate Control Enable
bits : 21 - 21 (1 bit)

P22 : Output Slew Rate Control Enable
bits : 22 - 22 (1 bit)

P23 : Output Slew Rate Control Enable
bits : 23 - 23 (1 bit)

P24 : Output Slew Rate Control Enable
bits : 24 - 24 (1 bit)

P25 : Output Slew Rate Control Enable
bits : 25 - 25 (1 bit)

P26 : Output Slew Rate Control Enable
bits : 26 - 26 (1 bit)

P27 : Output Slew Rate Control Enable
bits : 27 - 27 (1 bit)

P28 : Output Slew Rate Control Enable
bits : 28 - 28 (1 bit)

P29 : Output Slew Rate Control Enable
bits : 29 - 29 (1 bit)

P30 : Output Slew Rate Control Enable
bits : 30 - 30 (1 bit)

P31 : Output Slew Rate Control Enable
bits : 31 - 31 (1 bit)


OSRR0T2

Output Slew Rate Register 0 - Toggle
address_offset : 0xAF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSRR0T2 OSRR0T2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Slew Rate Control Enable
bits : 0 - 0 (1 bit)

P1 : Output Slew Rate Control Enable
bits : 1 - 1 (1 bit)

P2 : Output Slew Rate Control Enable
bits : 2 - 2 (1 bit)

P3 : Output Slew Rate Control Enable
bits : 3 - 3 (1 bit)

P4 : Output Slew Rate Control Enable
bits : 4 - 4 (1 bit)

P5 : Output Slew Rate Control Enable
bits : 5 - 5 (1 bit)

P6 : Output Slew Rate Control Enable
bits : 6 - 6 (1 bit)

P7 : Output Slew Rate Control Enable
bits : 7 - 7 (1 bit)

P8 : Output Slew Rate Control Enable
bits : 8 - 8 (1 bit)

P9 : Output Slew Rate Control Enable
bits : 9 - 9 (1 bit)

P10 : Output Slew Rate Control Enable
bits : 10 - 10 (1 bit)

P11 : Output Slew Rate Control Enable
bits : 11 - 11 (1 bit)

P12 : Output Slew Rate Control Enable
bits : 12 - 12 (1 bit)

P13 : Output Slew Rate Control Enable
bits : 13 - 13 (1 bit)

P14 : Output Slew Rate Control Enable
bits : 14 - 14 (1 bit)

P15 : Output Slew Rate Control Enable
bits : 15 - 15 (1 bit)

P16 : Output Slew Rate Control Enable
bits : 16 - 16 (1 bit)

P17 : Output Slew Rate Control Enable
bits : 17 - 17 (1 bit)

P18 : Output Slew Rate Control Enable
bits : 18 - 18 (1 bit)

P19 : Output Slew Rate Control Enable
bits : 19 - 19 (1 bit)

P20 : Output Slew Rate Control Enable
bits : 20 - 20 (1 bit)

P21 : Output Slew Rate Control Enable
bits : 21 - 21 (1 bit)

P22 : Output Slew Rate Control Enable
bits : 22 - 22 (1 bit)

P23 : Output Slew Rate Control Enable
bits : 23 - 23 (1 bit)

P24 : Output Slew Rate Control Enable
bits : 24 - 24 (1 bit)

P25 : Output Slew Rate Control Enable
bits : 25 - 25 (1 bit)

P26 : Output Slew Rate Control Enable
bits : 26 - 26 (1 bit)

P27 : Output Slew Rate Control Enable
bits : 27 - 27 (1 bit)

P28 : Output Slew Rate Control Enable
bits : 28 - 28 (1 bit)

P29 : Output Slew Rate Control Enable
bits : 29 - 29 (1 bit)

P30 : Output Slew Rate Control Enable
bits : 30 - 30 (1 bit)

P31 : Output Slew Rate Control Enable
bits : 31 - 31 (1 bit)


OVRC0

Output Value Register - Clear
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

OVRC0 OVRC0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Value
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Value
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Value
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Value
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Value
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Value
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Value
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Value
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Value
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Value
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Value
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Value
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Value
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Value
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Value
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Value
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Value
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Value
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Value
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Value
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Value
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Value
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Value
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Value
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Value
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Value
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Value
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Value
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Value
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Value
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Value
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Value
bits : 31 - 31 (1 bit)
access : write-only


OVRT0

Output Value Register - Toggle
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

OVRT0 OVRT0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Value
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Value
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Value
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Value
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Value
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Value
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Value
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Value
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Value
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Value
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Value
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Value
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Value
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Value
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Value
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Value
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Value
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Value
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Value
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Value
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Value
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Value
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Value
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Value
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Value
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Value
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Value
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Value
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Value
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Value
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Value
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Value
bits : 31 - 31 (1 bit)
access : write-only


STER2

Schmitt Trigger Enable Register
address_offset : 0xB80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STER2 STER2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Schmitt Trigger Enable
bits : 0 - 0 (1 bit)

P1 : Schmitt Trigger Enable
bits : 1 - 1 (1 bit)

P2 : Schmitt Trigger Enable
bits : 2 - 2 (1 bit)

P3 : Schmitt Trigger Enable
bits : 3 - 3 (1 bit)

P4 : Schmitt Trigger Enable
bits : 4 - 4 (1 bit)

P5 : Schmitt Trigger Enable
bits : 5 - 5 (1 bit)

P6 : Schmitt Trigger Enable
bits : 6 - 6 (1 bit)

P7 : Schmitt Trigger Enable
bits : 7 - 7 (1 bit)

P8 : Schmitt Trigger Enable
bits : 8 - 8 (1 bit)

P9 : Schmitt Trigger Enable
bits : 9 - 9 (1 bit)

P10 : Schmitt Trigger Enable
bits : 10 - 10 (1 bit)

P11 : Schmitt Trigger Enable
bits : 11 - 11 (1 bit)

P12 : Schmitt Trigger Enable
bits : 12 - 12 (1 bit)

P13 : Schmitt Trigger Enable
bits : 13 - 13 (1 bit)

P14 : Schmitt Trigger Enable
bits : 14 - 14 (1 bit)

P15 : Schmitt Trigger Enable
bits : 15 - 15 (1 bit)

P16 : Schmitt Trigger Enable
bits : 16 - 16 (1 bit)

P17 : Schmitt Trigger Enable
bits : 17 - 17 (1 bit)

P18 : Schmitt Trigger Enable
bits : 18 - 18 (1 bit)

P19 : Schmitt Trigger Enable
bits : 19 - 19 (1 bit)

P20 : Schmitt Trigger Enable
bits : 20 - 20 (1 bit)

P21 : Schmitt Trigger Enable
bits : 21 - 21 (1 bit)

P22 : Schmitt Trigger Enable
bits : 22 - 22 (1 bit)

P23 : Schmitt Trigger Enable
bits : 23 - 23 (1 bit)

P24 : Schmitt Trigger Enable
bits : 24 - 24 (1 bit)

P25 : Schmitt Trigger Enable
bits : 25 - 25 (1 bit)

P26 : Schmitt Trigger Enable
bits : 26 - 26 (1 bit)

P27 : Schmitt Trigger Enable
bits : 27 - 27 (1 bit)

P28 : Schmitt Trigger Enable
bits : 28 - 28 (1 bit)

P29 : Schmitt Trigger Enable
bits : 29 - 29 (1 bit)

P30 : Schmitt Trigger Enable
bits : 30 - 30 (1 bit)

P31 : Schmitt Trigger Enable
bits : 31 - 31 (1 bit)


STERS2

Schmitt Trigger Enable Register - Set
address_offset : 0xB90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STERS2 STERS2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Schmitt Trigger Enable
bits : 0 - 0 (1 bit)

P1 : Schmitt Trigger Enable
bits : 1 - 1 (1 bit)

P2 : Schmitt Trigger Enable
bits : 2 - 2 (1 bit)

P3 : Schmitt Trigger Enable
bits : 3 - 3 (1 bit)

P4 : Schmitt Trigger Enable
bits : 4 - 4 (1 bit)

P5 : Schmitt Trigger Enable
bits : 5 - 5 (1 bit)

P6 : Schmitt Trigger Enable
bits : 6 - 6 (1 bit)

P7 : Schmitt Trigger Enable
bits : 7 - 7 (1 bit)

P8 : Schmitt Trigger Enable
bits : 8 - 8 (1 bit)

P9 : Schmitt Trigger Enable
bits : 9 - 9 (1 bit)

P10 : Schmitt Trigger Enable
bits : 10 - 10 (1 bit)

P11 : Schmitt Trigger Enable
bits : 11 - 11 (1 bit)

P12 : Schmitt Trigger Enable
bits : 12 - 12 (1 bit)

P13 : Schmitt Trigger Enable
bits : 13 - 13 (1 bit)

P14 : Schmitt Trigger Enable
bits : 14 - 14 (1 bit)

P15 : Schmitt Trigger Enable
bits : 15 - 15 (1 bit)

P16 : Schmitt Trigger Enable
bits : 16 - 16 (1 bit)

P17 : Schmitt Trigger Enable
bits : 17 - 17 (1 bit)

P18 : Schmitt Trigger Enable
bits : 18 - 18 (1 bit)

P19 : Schmitt Trigger Enable
bits : 19 - 19 (1 bit)

P20 : Schmitt Trigger Enable
bits : 20 - 20 (1 bit)

P21 : Schmitt Trigger Enable
bits : 21 - 21 (1 bit)

P22 : Schmitt Trigger Enable
bits : 22 - 22 (1 bit)

P23 : Schmitt Trigger Enable
bits : 23 - 23 (1 bit)

P24 : Schmitt Trigger Enable
bits : 24 - 24 (1 bit)

P25 : Schmitt Trigger Enable
bits : 25 - 25 (1 bit)

P26 : Schmitt Trigger Enable
bits : 26 - 26 (1 bit)

P27 : Schmitt Trigger Enable
bits : 27 - 27 (1 bit)

P28 : Schmitt Trigger Enable
bits : 28 - 28 (1 bit)

P29 : Schmitt Trigger Enable
bits : 29 - 29 (1 bit)

P30 : Schmitt Trigger Enable
bits : 30 - 30 (1 bit)

P31 : Schmitt Trigger Enable
bits : 31 - 31 (1 bit)


STERC2

Schmitt Trigger Enable Register - Clear
address_offset : 0xBA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STERC2 STERC2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Schmitt Trigger Enable
bits : 0 - 0 (1 bit)

P1 : Schmitt Trigger Enable
bits : 1 - 1 (1 bit)

P2 : Schmitt Trigger Enable
bits : 2 - 2 (1 bit)

P3 : Schmitt Trigger Enable
bits : 3 - 3 (1 bit)

P4 : Schmitt Trigger Enable
bits : 4 - 4 (1 bit)

P5 : Schmitt Trigger Enable
bits : 5 - 5 (1 bit)

P6 : Schmitt Trigger Enable
bits : 6 - 6 (1 bit)

P7 : Schmitt Trigger Enable
bits : 7 - 7 (1 bit)

P8 : Schmitt Trigger Enable
bits : 8 - 8 (1 bit)

P9 : Schmitt Trigger Enable
bits : 9 - 9 (1 bit)

P10 : Schmitt Trigger Enable
bits : 10 - 10 (1 bit)

P11 : Schmitt Trigger Enable
bits : 11 - 11 (1 bit)

P12 : Schmitt Trigger Enable
bits : 12 - 12 (1 bit)

P13 : Schmitt Trigger Enable
bits : 13 - 13 (1 bit)

P14 : Schmitt Trigger Enable
bits : 14 - 14 (1 bit)

P15 : Schmitt Trigger Enable
bits : 15 - 15 (1 bit)

P16 : Schmitt Trigger Enable
bits : 16 - 16 (1 bit)

P17 : Schmitt Trigger Enable
bits : 17 - 17 (1 bit)

P18 : Schmitt Trigger Enable
bits : 18 - 18 (1 bit)

P19 : Schmitt Trigger Enable
bits : 19 - 19 (1 bit)

P20 : Schmitt Trigger Enable
bits : 20 - 20 (1 bit)

P21 : Schmitt Trigger Enable
bits : 21 - 21 (1 bit)

P22 : Schmitt Trigger Enable
bits : 22 - 22 (1 bit)

P23 : Schmitt Trigger Enable
bits : 23 - 23 (1 bit)

P24 : Schmitt Trigger Enable
bits : 24 - 24 (1 bit)

P25 : Schmitt Trigger Enable
bits : 25 - 25 (1 bit)

P26 : Schmitt Trigger Enable
bits : 26 - 26 (1 bit)

P27 : Schmitt Trigger Enable
bits : 27 - 27 (1 bit)

P28 : Schmitt Trigger Enable
bits : 28 - 28 (1 bit)

P29 : Schmitt Trigger Enable
bits : 29 - 29 (1 bit)

P30 : Schmitt Trigger Enable
bits : 30 - 30 (1 bit)

P31 : Schmitt Trigger Enable
bits : 31 - 31 (1 bit)


STERT2

Schmitt Trigger Enable Register - Toggle
address_offset : 0xBB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STERT2 STERT2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Schmitt Trigger Enable
bits : 0 - 0 (1 bit)

P1 : Schmitt Trigger Enable
bits : 1 - 1 (1 bit)

P2 : Schmitt Trigger Enable
bits : 2 - 2 (1 bit)

P3 : Schmitt Trigger Enable
bits : 3 - 3 (1 bit)

P4 : Schmitt Trigger Enable
bits : 4 - 4 (1 bit)

P5 : Schmitt Trigger Enable
bits : 5 - 5 (1 bit)

P6 : Schmitt Trigger Enable
bits : 6 - 6 (1 bit)

P7 : Schmitt Trigger Enable
bits : 7 - 7 (1 bit)

P8 : Schmitt Trigger Enable
bits : 8 - 8 (1 bit)

P9 : Schmitt Trigger Enable
bits : 9 - 9 (1 bit)

P10 : Schmitt Trigger Enable
bits : 10 - 10 (1 bit)

P11 : Schmitt Trigger Enable
bits : 11 - 11 (1 bit)

P12 : Schmitt Trigger Enable
bits : 12 - 12 (1 bit)

P13 : Schmitt Trigger Enable
bits : 13 - 13 (1 bit)

P14 : Schmitt Trigger Enable
bits : 14 - 14 (1 bit)

P15 : Schmitt Trigger Enable
bits : 15 - 15 (1 bit)

P16 : Schmitt Trigger Enable
bits : 16 - 16 (1 bit)

P17 : Schmitt Trigger Enable
bits : 17 - 17 (1 bit)

P18 : Schmitt Trigger Enable
bits : 18 - 18 (1 bit)

P19 : Schmitt Trigger Enable
bits : 19 - 19 (1 bit)

P20 : Schmitt Trigger Enable
bits : 20 - 20 (1 bit)

P21 : Schmitt Trigger Enable
bits : 21 - 21 (1 bit)

P22 : Schmitt Trigger Enable
bits : 22 - 22 (1 bit)

P23 : Schmitt Trigger Enable
bits : 23 - 23 (1 bit)

P24 : Schmitt Trigger Enable
bits : 24 - 24 (1 bit)

P25 : Schmitt Trigger Enable
bits : 25 - 25 (1 bit)

P26 : Schmitt Trigger Enable
bits : 26 - 26 (1 bit)

P27 : Schmitt Trigger Enable
bits : 27 - 27 (1 bit)

P28 : Schmitt Trigger Enable
bits : 28 - 28 (1 bit)

P29 : Schmitt Trigger Enable
bits : 29 - 29 (1 bit)

P30 : Schmitt Trigger Enable
bits : 30 - 30 (1 bit)

P31 : Schmitt Trigger Enable
bits : 31 - 31 (1 bit)


PVR0

Pin Value Register
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PVR0 PVR0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pin Value
bits : 0 - 0 (1 bit)
access : read-only

P1 : Pin Value
bits : 1 - 1 (1 bit)
access : read-only

P2 : Pin Value
bits : 2 - 2 (1 bit)
access : read-only

P3 : Pin Value
bits : 3 - 3 (1 bit)
access : read-only

P4 : Pin Value
bits : 4 - 4 (1 bit)
access : read-only

P5 : Pin Value
bits : 5 - 5 (1 bit)
access : read-only

P6 : Pin Value
bits : 6 - 6 (1 bit)
access : read-only

P7 : Pin Value
bits : 7 - 7 (1 bit)
access : read-only

P8 : Pin Value
bits : 8 - 8 (1 bit)
access : read-only

P9 : Pin Value
bits : 9 - 9 (1 bit)
access : read-only

P10 : Pin Value
bits : 10 - 10 (1 bit)
access : read-only

P11 : Pin Value
bits : 11 - 11 (1 bit)
access : read-only

P12 : Pin Value
bits : 12 - 12 (1 bit)
access : read-only

P13 : Pin Value
bits : 13 - 13 (1 bit)
access : read-only

P14 : Pin Value
bits : 14 - 14 (1 bit)
access : read-only

P15 : Pin Value
bits : 15 - 15 (1 bit)
access : read-only

P16 : Pin Value
bits : 16 - 16 (1 bit)
access : read-only

P17 : Pin Value
bits : 17 - 17 (1 bit)
access : read-only

P18 : Pin Value
bits : 18 - 18 (1 bit)
access : read-only

P19 : Pin Value
bits : 19 - 19 (1 bit)
access : read-only

P20 : Pin Value
bits : 20 - 20 (1 bit)
access : read-only

P21 : Pin Value
bits : 21 - 21 (1 bit)
access : read-only

P22 : Pin Value
bits : 22 - 22 (1 bit)
access : read-only

P23 : Pin Value
bits : 23 - 23 (1 bit)
access : read-only

P24 : Pin Value
bits : 24 - 24 (1 bit)
access : read-only

P25 : Pin Value
bits : 25 - 25 (1 bit)
access : read-only

P26 : Pin Value
bits : 26 - 26 (1 bit)
access : read-only

P27 : Pin Value
bits : 27 - 27 (1 bit)
access : read-only

P28 : Pin Value
bits : 28 - 28 (1 bit)
access : read-only

P29 : Pin Value
bits : 29 - 29 (1 bit)
access : read-only

P30 : Pin Value
bits : 30 - 30 (1 bit)
access : read-only

P31 : Pin Value
bits : 31 - 31 (1 bit)
access : read-only


EVER2

Event Enable Register
address_offset : 0xC00 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVER2 EVER2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Event Enable
bits : 0 - 0 (1 bit)

P1 : Event Enable
bits : 1 - 1 (1 bit)

P2 : Event Enable
bits : 2 - 2 (1 bit)

P3 : Event Enable
bits : 3 - 3 (1 bit)

P4 : Event Enable
bits : 4 - 4 (1 bit)

P5 : Event Enable
bits : 5 - 5 (1 bit)

P6 : Event Enable
bits : 6 - 6 (1 bit)

P7 : Event Enable
bits : 7 - 7 (1 bit)

P8 : Event Enable
bits : 8 - 8 (1 bit)

P9 : Event Enable
bits : 9 - 9 (1 bit)

P10 : Event Enable
bits : 10 - 10 (1 bit)

P11 : Event Enable
bits : 11 - 11 (1 bit)

P12 : Event Enable
bits : 12 - 12 (1 bit)

P13 : Event Enable
bits : 13 - 13 (1 bit)

P14 : Event Enable
bits : 14 - 14 (1 bit)

P15 : Event Enable
bits : 15 - 15 (1 bit)

P16 : Event Enable
bits : 16 - 16 (1 bit)

P17 : Event Enable
bits : 17 - 17 (1 bit)

P18 : Event Enable
bits : 18 - 18 (1 bit)

P19 : Event Enable
bits : 19 - 19 (1 bit)

P20 : Event Enable
bits : 20 - 20 (1 bit)

P21 : Event Enable
bits : 21 - 21 (1 bit)

P22 : Event Enable
bits : 22 - 22 (1 bit)

P23 : Event Enable
bits : 23 - 23 (1 bit)

P24 : Event Enable
bits : 24 - 24 (1 bit)

P25 : Event Enable
bits : 25 - 25 (1 bit)

P26 : Event Enable
bits : 26 - 26 (1 bit)

P27 : Event Enable
bits : 27 - 27 (1 bit)

P28 : Event Enable
bits : 28 - 28 (1 bit)

P29 : Event Enable
bits : 29 - 29 (1 bit)

P30 : Event Enable
bits : 30 - 30 (1 bit)

P31 : Event Enable
bits : 31 - 31 (1 bit)


EVERS2

Event Enable Register - Set
address_offset : 0xC10 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

EVERS2 EVERS2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Event Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Event Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Event Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Event Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Event Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Event Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Event Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Event Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Event Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Event Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Event Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Event Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Event Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Event Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Event Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Event Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Event Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Event Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Event Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Event Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Event Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Event Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Event Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Event Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Event Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Event Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Event Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Event Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Event Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Event Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Event Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Event Enable
bits : 31 - 31 (1 bit)
access : write-only


EVERC2

Event Enable Register - Clear
address_offset : 0xC20 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

EVERC2 EVERC2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Event Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Event Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Event Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Event Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Event Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Event Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Event Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Event Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Event Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Event Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Event Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Event Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Event Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Event Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Event Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Event Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Event Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Event Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Event Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Event Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Event Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Event Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Event Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Event Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Event Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Event Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Event Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Event Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Event Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Event Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Event Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Event Enable
bits : 31 - 31 (1 bit)
access : write-only


EVERT2

Event Enable Register - Toggle
address_offset : 0xC30 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

EVERT2 EVERT2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Event Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Event Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Event Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Event Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Event Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Event Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Event Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Event Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Event Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Event Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Event Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Event Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Event Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Event Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Event Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Event Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Event Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Event Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Event Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Event Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Event Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Event Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Event Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Event Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Event Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Event Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Event Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Event Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Event Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Event Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Event Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Event Enable
bits : 31 - 31 (1 bit)
access : write-only


LOCK2

Lock Register
address_offset : 0xC80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOCK2 LOCK2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Lock State
bits : 0 - 0 (1 bit)

P1 : Lock State
bits : 1 - 1 (1 bit)

P2 : Lock State
bits : 2 - 2 (1 bit)

P3 : Lock State
bits : 3 - 3 (1 bit)

P4 : Lock State
bits : 4 - 4 (1 bit)

P5 : Lock State
bits : 5 - 5 (1 bit)

P6 : Lock State
bits : 6 - 6 (1 bit)

P7 : Lock State
bits : 7 - 7 (1 bit)

P8 : Lock State
bits : 8 - 8 (1 bit)

P9 : Lock State
bits : 9 - 9 (1 bit)

P10 : Lock State
bits : 10 - 10 (1 bit)

P11 : Lock State
bits : 11 - 11 (1 bit)

P12 : Lock State
bits : 12 - 12 (1 bit)

P13 : Lock State
bits : 13 - 13 (1 bit)

P14 : Lock State
bits : 14 - 14 (1 bit)

P15 : Lock State
bits : 15 - 15 (1 bit)

P16 : Lock State
bits : 16 - 16 (1 bit)

P17 : Lock State
bits : 17 - 17 (1 bit)

P18 : Lock State
bits : 18 - 18 (1 bit)

P19 : Lock State
bits : 19 - 19 (1 bit)

P20 : Lock State
bits : 20 - 20 (1 bit)

P21 : Lock State
bits : 21 - 21 (1 bit)

P22 : Lock State
bits : 22 - 22 (1 bit)

P23 : Lock State
bits : 23 - 23 (1 bit)

P24 : Lock State
bits : 24 - 24 (1 bit)

P25 : Lock State
bits : 25 - 25 (1 bit)

P26 : Lock State
bits : 26 - 26 (1 bit)

P27 : Lock State
bits : 27 - 27 (1 bit)

P28 : Lock State
bits : 28 - 28 (1 bit)

P29 : Lock State
bits : 29 - 29 (1 bit)

P30 : Lock State
bits : 30 - 30 (1 bit)

P31 : Lock State
bits : 31 - 31 (1 bit)


LOCKS2

Lock Register - Set
address_offset : 0xC90 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

LOCKS2 LOCKS2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Lock State
bits : 0 - 0 (1 bit)

P1 : Lock State
bits : 1 - 1 (1 bit)

P2 : Lock State
bits : 2 - 2 (1 bit)

P3 : Lock State
bits : 3 - 3 (1 bit)

P4 : Lock State
bits : 4 - 4 (1 bit)

P5 : Lock State
bits : 5 - 5 (1 bit)

P6 : Lock State
bits : 6 - 6 (1 bit)

P7 : Lock State
bits : 7 - 7 (1 bit)

P8 : Lock State
bits : 8 - 8 (1 bit)

P9 : Lock State
bits : 9 - 9 (1 bit)

P10 : Lock State
bits : 10 - 10 (1 bit)

P11 : Lock State
bits : 11 - 11 (1 bit)

P12 : Lock State
bits : 12 - 12 (1 bit)

P13 : Lock State
bits : 13 - 13 (1 bit)

P14 : Lock State
bits : 14 - 14 (1 bit)

P15 : Lock State
bits : 15 - 15 (1 bit)

P16 : Lock State
bits : 16 - 16 (1 bit)

P17 : Lock State
bits : 17 - 17 (1 bit)

P18 : Lock State
bits : 18 - 18 (1 bit)

P19 : Lock State
bits : 19 - 19 (1 bit)

P20 : Lock State
bits : 20 - 20 (1 bit)

P21 : Lock State
bits : 21 - 21 (1 bit)

P22 : Lock State
bits : 22 - 22 (1 bit)

P23 : Lock State
bits : 23 - 23 (1 bit)

P24 : Lock State
bits : 24 - 24 (1 bit)

P25 : Lock State
bits : 25 - 25 (1 bit)

P26 : Lock State
bits : 26 - 26 (1 bit)

P27 : Lock State
bits : 27 - 27 (1 bit)

P28 : Lock State
bits : 28 - 28 (1 bit)

P29 : Lock State
bits : 29 - 29 (1 bit)

P30 : Lock State
bits : 30 - 30 (1 bit)

P31 : Lock State
bits : 31 - 31 (1 bit)


LOCKC2

Lock Register - Clear
address_offset : 0xCA0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

LOCKC2 LOCKC2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Lock State
bits : 0 - 0 (1 bit)

P1 : Lock State
bits : 1 - 1 (1 bit)

P2 : Lock State
bits : 2 - 2 (1 bit)

P3 : Lock State
bits : 3 - 3 (1 bit)

P4 : Lock State
bits : 4 - 4 (1 bit)

P5 : Lock State
bits : 5 - 5 (1 bit)

P6 : Lock State
bits : 6 - 6 (1 bit)

P7 : Lock State
bits : 7 - 7 (1 bit)

P8 : Lock State
bits : 8 - 8 (1 bit)

P9 : Lock State
bits : 9 - 9 (1 bit)

P10 : Lock State
bits : 10 - 10 (1 bit)

P11 : Lock State
bits : 11 - 11 (1 bit)

P12 : Lock State
bits : 12 - 12 (1 bit)

P13 : Lock State
bits : 13 - 13 (1 bit)

P14 : Lock State
bits : 14 - 14 (1 bit)

P15 : Lock State
bits : 15 - 15 (1 bit)

P16 : Lock State
bits : 16 - 16 (1 bit)

P17 : Lock State
bits : 17 - 17 (1 bit)

P18 : Lock State
bits : 18 - 18 (1 bit)

P19 : Lock State
bits : 19 - 19 (1 bit)

P20 : Lock State
bits : 20 - 20 (1 bit)

P21 : Lock State
bits : 21 - 21 (1 bit)

P22 : Lock State
bits : 22 - 22 (1 bit)

P23 : Lock State
bits : 23 - 23 (1 bit)

P24 : Lock State
bits : 24 - 24 (1 bit)

P25 : Lock State
bits : 25 - 25 (1 bit)

P26 : Lock State
bits : 26 - 26 (1 bit)

P27 : Lock State
bits : 27 - 27 (1 bit)

P28 : Lock State
bits : 28 - 28 (1 bit)

P29 : Lock State
bits : 29 - 29 (1 bit)

P30 : Lock State
bits : 30 - 30 (1 bit)

P31 : Lock State
bits : 31 - 31 (1 bit)


LOCKT2

Lock Register - Toggle
address_offset : 0xCB0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

LOCKT2 LOCKT2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Lock State
bits : 0 - 0 (1 bit)

P1 : Lock State
bits : 1 - 1 (1 bit)

P2 : Lock State
bits : 2 - 2 (1 bit)

P3 : Lock State
bits : 3 - 3 (1 bit)

P4 : Lock State
bits : 4 - 4 (1 bit)

P5 : Lock State
bits : 5 - 5 (1 bit)

P6 : Lock State
bits : 6 - 6 (1 bit)

P7 : Lock State
bits : 7 - 7 (1 bit)

P8 : Lock State
bits : 8 - 8 (1 bit)

P9 : Lock State
bits : 9 - 9 (1 bit)

P10 : Lock State
bits : 10 - 10 (1 bit)

P11 : Lock State
bits : 11 - 11 (1 bit)

P12 : Lock State
bits : 12 - 12 (1 bit)

P13 : Lock State
bits : 13 - 13 (1 bit)

P14 : Lock State
bits : 14 - 14 (1 bit)

P15 : Lock State
bits : 15 - 15 (1 bit)

P16 : Lock State
bits : 16 - 16 (1 bit)

P17 : Lock State
bits : 17 - 17 (1 bit)

P18 : Lock State
bits : 18 - 18 (1 bit)

P19 : Lock State
bits : 19 - 19 (1 bit)

P20 : Lock State
bits : 20 - 20 (1 bit)

P21 : Lock State
bits : 21 - 21 (1 bit)

P22 : Lock State
bits : 22 - 22 (1 bit)

P23 : Lock State
bits : 23 - 23 (1 bit)

P24 : Lock State
bits : 24 - 24 (1 bit)

P25 : Lock State
bits : 25 - 25 (1 bit)

P26 : Lock State
bits : 26 - 26 (1 bit)

P27 : Lock State
bits : 27 - 27 (1 bit)

P28 : Lock State
bits : 28 - 28 (1 bit)

P29 : Lock State
bits : 29 - 29 (1 bit)

P30 : Lock State
bits : 30 - 30 (1 bit)

P31 : Lock State
bits : 31 - 31 (1 bit)


UNLOCK2

Unlock Register
address_offset : 0xD80 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

UNLOCK2 UNLOCK2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR KEY

ADDR : Offset Register
bits : 0 - 9 (10 bit)
access : write-only

KEY : Unlocking Key
bits : 24 - 31 (8 bit)


ASR2

Access Status Register
address_offset : 0xD90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ASR2 ASR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AR

AR : Access Error
bits : 0 - 0 (1 bit)


PARAMETER2

Parameter Register
address_offset : 0xDE0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PARAMETER2 PARAMETER2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PARAMETER

PARAMETER : Parameter
bits : 0 - 31 (32 bit)


VERSION2

Version Register
address_offset : 0xDF0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

VERSION2 VERSION2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VERSION VARIANT

VERSION : Version Number
bits : 0 - 11 (12 bit)
access : read-only

VARIANT : Variant Number
bits : 16 - 19 (4 bit)
access : read-only


PUER0

Pull-up Enable Register
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUER0 PUER0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-up Enable
bits : 0 - 0 (1 bit)

P1 : Pull-up Enable
bits : 1 - 1 (1 bit)

P2 : Pull-up Enable
bits : 2 - 2 (1 bit)

P3 : Pull-up Enable
bits : 3 - 3 (1 bit)

P4 : Pull-up Enable
bits : 4 - 4 (1 bit)

P5 : Pull-up Enable
bits : 5 - 5 (1 bit)

P6 : Pull-up Enable
bits : 6 - 6 (1 bit)

P7 : Pull-up Enable
bits : 7 - 7 (1 bit)

P8 : Pull-up Enable
bits : 8 - 8 (1 bit)

P9 : Pull-up Enable
bits : 9 - 9 (1 bit)

P10 : Pull-up Enable
bits : 10 - 10 (1 bit)

P11 : Pull-up Enable
bits : 11 - 11 (1 bit)

P12 : Pull-up Enable
bits : 12 - 12 (1 bit)

P13 : Pull-up Enable
bits : 13 - 13 (1 bit)

P14 : Pull-up Enable
bits : 14 - 14 (1 bit)

P15 : Pull-up Enable
bits : 15 - 15 (1 bit)

P16 : Pull-up Enable
bits : 16 - 16 (1 bit)

P17 : Pull-up Enable
bits : 17 - 17 (1 bit)

P18 : Pull-up Enable
bits : 18 - 18 (1 bit)

P19 : Pull-up Enable
bits : 19 - 19 (1 bit)

P20 : Pull-up Enable
bits : 20 - 20 (1 bit)

P21 : Pull-up Enable
bits : 21 - 21 (1 bit)

P22 : Pull-up Enable
bits : 22 - 22 (1 bit)

P23 : Pull-up Enable
bits : 23 - 23 (1 bit)

P24 : Pull-up Enable
bits : 24 - 24 (1 bit)

P25 : Pull-up Enable
bits : 25 - 25 (1 bit)

P26 : Pull-up Enable
bits : 26 - 26 (1 bit)

P27 : Pull-up Enable
bits : 27 - 27 (1 bit)

P28 : Pull-up Enable
bits : 28 - 28 (1 bit)

P29 : Pull-up Enable
bits : 29 - 29 (1 bit)

P30 : Pull-up Enable
bits : 30 - 30 (1 bit)

P31 : Pull-up Enable
bits : 31 - 31 (1 bit)


PUERS0

Pull-up Enable Register - Set
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PUERS0 PUERS0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-up Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Pull-up Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Pull-up Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Pull-up Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Pull-up Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Pull-up Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Pull-up Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Pull-up Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Pull-up Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Pull-up Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Pull-up Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Pull-up Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Pull-up Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Pull-up Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Pull-up Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Pull-up Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Pull-up Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Pull-up Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Pull-up Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Pull-up Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Pull-up Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Pull-up Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Pull-up Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Pull-up Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Pull-up Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Pull-up Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Pull-up Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Pull-up Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Pull-up Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Pull-up Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Pull-up Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Pull-up Enable
bits : 31 - 31 (1 bit)
access : write-only


PUERC0

Pull-up Enable Register - Clear
address_offset : 0xF0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PUERC0 PUERC0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-up Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Pull-up Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Pull-up Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Pull-up Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Pull-up Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Pull-up Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Pull-up Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Pull-up Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Pull-up Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Pull-up Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Pull-up Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Pull-up Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Pull-up Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Pull-up Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Pull-up Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Pull-up Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Pull-up Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Pull-up Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Pull-up Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Pull-up Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Pull-up Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Pull-up Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Pull-up Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Pull-up Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Pull-up Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Pull-up Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Pull-up Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Pull-up Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Pull-up Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Pull-up Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Pull-up Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Pull-up Enable
bits : 31 - 31 (1 bit)
access : write-only


PUERT0

Pull-up Enable Register - Toggle
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PUERT0 PUERT0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull-up Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Pull-up Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Pull-up Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Pull-up Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Pull-up Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Pull-up Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Pull-up Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Pull-up Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Pull-up Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Pull-up Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Pull-up Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Pull-up Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Pull-up Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Pull-up Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Pull-up Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Pull-up Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Pull-up Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Pull-up Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Pull-up Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Pull-up Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Pull-up Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Pull-up Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Pull-up Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Pull-up Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Pull-up Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Pull-up Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Pull-up Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Pull-up Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Pull-up Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Pull-up Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Pull-up Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Pull-up Enable
bits : 31 - 31 (1 bit)
access : write-only



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