\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected
Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
EN : Enable
bits : 0 - 0 (1 bit)
DIS : Disable
bits : 1 - 1 (1 bit)
access : write-only
Version Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
VERSION : Version Number
bits : 0 - 11 (12 bit)
access : read-only
VARIANT : Variant Number
bits : 16 - 19 (4 bit)
access : read-only
Configuration Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SOURCE : Source Enable Mode
bits : 0 - 1 (2 bit)
ACTION : Action to perform
bits : 2 - 2 (1 bit)
MATCH : Data Match
bits : 8 - 15 (8 bit)
Status Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
EN : Enable Interrupt Status
bits : 0 - 0 (1 bit)
access : read-only
DRDY : Data Ready Interrupt Status
bits : 1 - 1 (1 bit)
access : read-only
Receive Holding Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CDATA : Received Data
bits : 0 - 31 (32 bit)
access : read-only
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