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BPM

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected

Registers

IER

ICR

SR

UNLOCK

PMCON

BKUPWCAUSE

BKUPWEN

BKUPPMUX

IORET

IDR

BPR

FWRUNPS

FWPSAVEPS

IMR

ISR

VERSION


IER

Interrupt Enable Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IER IER write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PSOK AE

PSOK : Power Scaling OK Interrupt Enable
bits : 0 - 0 (1 bit)
access : write-only

AE : Access Error Interrupt Enable
bits : 31 - 31 (1 bit)
access : write-only


ICR

Interrupt Clear Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ICR ICR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PSOK AE

PSOK : Power Scaling OK Interrupt Status Clear
bits : 0 - 0 (1 bit)
access : write-only

AE : Access Error Interrupt Status Clear
bits : 31 - 31 (1 bit)
access : write-only


SR

Status Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SR SR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PSOK

PSOK : Power Scaling OK Status
bits : 0 - 0 (1 bit)
access : read-only


UNLOCK

Unlock Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

UNLOCK UNLOCK write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR KEY

ADDR : Unlock Address
bits : 0 - 9 (10 bit)
access : write-only

KEY : Unlock Key
bits : 24 - 31 (8 bit)
access : write-only


PMCON

Power Mode Control Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMCON PMCON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PSCREQ PSCM BKUP RET SLEEP CK32S FASTWKUP

PS : Power Scaling Configuration Value
bits : 0 - 1 (2 bit)

PSCREQ : Power Scaling Change Request
bits : 2 - 2 (1 bit)

PSCM : Power Scaling Change Mode
bits : 3 - 3 (1 bit)

BKUP : BACKUP Mode
bits : 8 - 8 (1 bit)

RET : RETENTION Mode
bits : 9 - 9 (1 bit)

SLEEP : SLEEP mode Configuration
bits : 12 - 13 (2 bit)

CK32S : 32Khz-1Khz Clock Source Selection
bits : 16 - 16 (1 bit)

FASTWKUP : Fast Wakeup
bits : 24 - 24 (1 bit)


BKUPWCAUSE

Backup Wake up Cause Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BKUPWCAUSE BKUPWCAUSE read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

BKUPWEN

Backup Wake up Enable Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKUPWEN BKUPWEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

BKUPPMUX

Backup Pin Muxing Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKUPPMUX BKUPPMUX read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKUPPMUX

BKUPPMUX : Backup Pin Muxing
bits : 0 - 8 (9 bit)


IORET

Input Output Retention Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IORET IORET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RET

RET : Retention on I/O lines after waking up from the BACKUP mode
bits : 0 - 0 (1 bit)


IDR

Interrupt Disable Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IDR IDR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PSOK AE

PSOK : Power Scaling OK Interrupt Disable
bits : 0 - 0 (1 bit)
access : write-only

AE : Access Error Interrupt Disable
bits : 31 - 31 (1 bit)
access : write-only


BPR

Bypass Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BPR BPR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RUNPSPB PSMPSPB SEQSTN PSBTD PSHFD DLYRSTD BIASSEN LATSEN BOD18CONT POBS FFFW FBRDYEN FVREFSEN

RUNPSPB : Run Mode Power Scaling Preset Bypass
bits : 0 - 0 (1 bit)

PSMPSPB : Power Save Mode Power Scaling Preset Bypass
bits : 1 - 1 (1 bit)

SEQSTN : Sequencial Startup from ULP (Active Low)
bits : 2 - 2 (1 bit)

PSBTD : Power Scaling Bias Timing Disable
bits : 3 - 3 (1 bit)

PSHFD : Power Scaling Halt Flash Until VREGOK Disable
bits : 4 - 4 (1 bit)

DLYRSTD : Delaying Reset Disable
bits : 5 - 5 (1 bit)

BIASSEN : Bias Switch Enable
bits : 6 - 6 (1 bit)

LATSEN : Latdel Switch Enable
bits : 7 - 7 (1 bit)

BOD18CONT : BOD18 in continuous mode not disabled in WAIT/RET/BACKUP modes
bits : 8 - 8 (1 bit)

POBS : Pico Uart Observability
bits : 9 - 9 (1 bit)

FFFW : Force Flash Fast Wakeup
bits : 10 - 10 (1 bit)

FBRDYEN : Flash Bias Ready Enable
bits : 11 - 11 (1 bit)

FVREFSEN : Flash Vref Switch Enable
bits : 12 - 12 (1 bit)


FWRUNPS

Factory Word Run PS Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

FWRUNPS FWRUNPS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REGLEVEL REGTYPE REFTYPE FLASHLATDEL FLASHBIAS FPPW RC115 RCFAST

REGLEVEL : Regulator Voltage Level
bits : 0 - 3 (4 bit)

REGTYPE : Regulator Type
bits : 4 - 5 (2 bit)

Enumeration: REGTYPESelect

0x0 : NORMAL

None

0x1 : LP

None

0x2 : XULP

None

End of enumeration elements list.

REFTYPE : Reference Type
bits : 6 - 7 (2 bit)

Enumeration: REFTYPESelect

0x0 : BOTH

None

0x1 : BG

None

0x2 : LPBG

None

0x3 : INTERNAL

None

End of enumeration elements list.

FLASHLATDEL : Flash Latch Delay Value
bits : 8 - 12 (5 bit)

FLASHBIAS : Flash Bias Value
bits : 13 - 16 (4 bit)

FPPW : Flash Pico Power Mode
bits : 17 - 17 (1 bit)

RC115 : RC 115KHZ Calibration Value
bits : 18 - 24 (7 bit)

RCFAST : RCFAST Calibration Value
bits : 25 - 31 (7 bit)


FWPSAVEPS

Factory Word Power Save PS Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

FWPSAVEPS FWPSAVEPS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WREGLEVEL WBIAS WLATDEL RREGLEVEL RBIAS RLATDEL BREGLEVEL POR18DIS FWSAS

WREGLEVEL : Wait mode Regulator Level
bits : 0 - 3 (4 bit)
access : read-only

WBIAS : Bias in wait mode
bits : 4 - 7 (4 bit)
access : read-only

WLATDEL : Flash Latdel in wait mode
bits : 8 - 12 (5 bit)
access : read-only

RREGLEVEL : Retention mode Regulator Level
bits : 13 - 16 (4 bit)
access : read-only

RBIAS : Bias in Retention mode
bits : 17 - 20 (4 bit)
access : read-only

RLATDEL : Flash Latdel in Retention mode
bits : 21 - 25 (5 bit)
access : read-only

BREGLEVEL : Backup mode Regulator Level
bits : 26 - 29 (4 bit)
access : read-only

POR18DIS : POR 18 Disable
bits : 30 - 30 (1 bit)
access : read-only

FWSAS : Flash Wait State Automatic Switching
bits : 31 - 31 (1 bit)
access : read-only


IMR

Interrupt Mask Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IMR IMR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PSOK AE

PSOK : Power Scaling OK Interrupt Mask
bits : 0 - 0 (1 bit)
access : read-only

AE : Access Error Interrupt Mask
bits : 31 - 31 (1 bit)
access : read-only


ISR

Interrupt Status Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ISR ISR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PSOK AE

PSOK : Power Scaling OK Interrupt Status
bits : 0 - 0 (1 bit)
access : read-only

AE : Access Error Interrupt Status
bits : 31 - 31 (1 bit)
access : read-only


VERSION

Version Register
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

VERSION VERSION read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VERSION VARIANT

VERSION : Version Number
bits : 0 - 11 (12 bit)
access : read-only

VARIANT : Variant Number
bits : 16 - 19 (4 bit)
access : read-only



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