\n
address_offset : 0x0 Bytes (0x0)
size : 0x50 byte (0x0)
mem_usage : registers
protection : not protected
Mode 1: Write Access
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
CMD : Host Command
bits : 0 - 3 (4 bit)
access : write-only
Enumeration:
0x0 : NO_ACTION
-
0x1 : STOP
Waits for ongoing execution to complete, then stops.
0x2 : RESET
Stops and resets.
0x4 : ABORT
Stops without waiting for ongoing execution to complete.
0x5 : RUN
Starts execution (from stopped state)
0x6 : RUN_LOCKED
Starts execution and locks.
0x7 : RUN_OCD
Starts execution and enables host-controller OCD.
0x8 : UNLOCK
Unlocks.
0x9 : NMI
Triggers a non-maskable interrupt.
0xB : HOST_OCD_RESUME
Resumes from break in host-controlled OCD.
End of enumeration elements list.
UNLOCK : Unlock Locked Execution
bits : 16 - 31 (16 bit)
access : write-only
Host Flags
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HF : Host Flags
bits : 0 - 31 (32 bit)
access : read-write
Host Flags Control
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
SET_IRQEN : Set IRQ Enable
bits : 4 - 7 (4 bit)
access : write-only
CLR_IRQEN : Clear IRQ Enable
bits : 12 - 15 (4 bit)
access : write-only
Host Flags Clear/Set 0 and 1
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
CLR0 : Host Flag Clear
bits : 0 - 7 (8 bit)
access : write-only
SET0 : Host Flag Set
bits : 8 - 15 (8 bit)
access : write-only
CLR1 : Host Flag Clear
bits : 16 - 23 (8 bit)
access : write-only
SET1 : Host Flag Set
bits : 24 - 31 (8 bit)
access : write-only
Host Flags Clear/Set 2 and 3
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
CLR2 : Host Flag Clear
bits : 0 - 7 (8 bit)
access : write-only
SET2 : Host Flag Set
bits : 8 - 15 (8 bit)
access : write-only
CLR3 : Host Flag Clear
bits : 16 - 23 (8 bit)
access : write-only
SET3 : Host Flag Set
bits : 24 - 31 (8 bit)
access : write-only
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.