\n
address_offset : 0x0 Bytes (0x0)
size : 0x50 byte (0x0)
mem_usage : registers
protection : not protected
Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
START : Start Processing
bits : 0 - 0 (1 bit)
access : write-only
SWRST : Software Reset
bits : 8 - 8 (1 bit)
access : write-only
Interrupt Enable Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
DATRDY : Data Ready Interrupt Enable
bits : 0 - 0 (1 bit)
access : write-only
URAD : Unspecified Register Access Detection Interrupt Enable
bits : 8 - 8 (1 bit)
access : write-only
Input Data Register
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
IDATA : Input Data Word
bits : 0 - 31 (32 bit)
access : write-only
Initialization Vector Register
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
IV : Initialization Vector
bits : 0 - 31 (32 bit)
access : write-only
Interrupt Disable Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
DATRDY : Data Ready Interrupt Disable
bits : 0 - 0 (1 bit)
access : write-only
URAD : Unspecified Register Access Detection Interrupt Disable
bits : 8 - 8 (1 bit)
access : write-only
Output Data Register
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ODATA : Output Data
bits : 0 - 31 (32 bit)
access : read-only
Input Data Register
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
IDATA : Input Data Word
bits : 0 - 31 (32 bit)
access : write-only
Interrupt Mask Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATRDY : Data Ready Interrupt Mask
bits : 0 - 0 (1 bit)
access : read-only
URAD : Unspecified Register Access Detection Interrupt Mask
bits : 8 - 8 (1 bit)
access : read-only
Initialization Vector Register
address_offset : 0x18C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
IV : Initialization Vector
bits : 0 - 31 (32 bit)
access : write-only
Output Data Register
address_offset : 0x1A8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ODATA : Output Data
bits : 0 - 31 (32 bit)
access : read-only
Interrupt Status Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATRDY : Data Ready
bits : 0 - 0 (1 bit)
access : read-only
URAD : Unspecified Register Access Detection Status
bits : 8 - 8 (1 bit)
access : read-only
URAT : Unspecified Register Access
bits : 12 - 15 (4 bit)
access : read-only
Enumeration:
0x0 : IDR_WR_PROCESSING
Input Data Register written during the data processing when SMOD = 0x2 mode
0x1 : ODR_RD_PROCESSING
Output Data Register read during the data processing
0x2 : MR_WR_PROCESSING
Mode Register written during the data processing
0x3 : ODR_RD_SUBKGEN
Output Data Register read during the sub-keys generation
0x4 : MR_WR_SUBKGEN
Mode Register written during the sub-keys generation
0x5 : WOR_RD_ACCESS
Write-only register read access
End of enumeration elements list.
Initialization Vector Register
address_offset : 0x1F8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
IV : Initialization Vector
bits : 0 - 31 (32 bit)
access : write-only
Key Word Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
KEYW : Key Word
bits : 0 - 31 (32 bit)
access : write-only
Key Word Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
KEYW : Key Word
bits : 0 - 31 (32 bit)
access : write-only
Key Word Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
KEYW : Key Word
bits : 0 - 31 (32 bit)
access : write-only
Key Word Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
KEYW : Key Word
bits : 0 - 31 (32 bit)
access : write-only
Mode Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CIPHER : Processing Mode
bits : 0 - 0 (1 bit)
access : read-write
AAHB : Automatic Bridge Mode
bits : 2 - 2 (1 bit)
access : read-write
DUALBUFF : Dual Input Buffer
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0x0 : INACTIVE
AESB_IDATARx cannot be written during processing of previous block.
0x1 : ACTIVE
AESB_IDATARx can be written during processing of previous block when SMOD = 0x2. It speeds up the overall runtime of large files.
End of enumeration elements list.
PROCDLY : Processing Delay
bits : 4 - 7 (4 bit)
access : read-write
SMOD : Start Mode
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
0x0 : MANUAL_START
Manual mode
0x1 : AUTO_START
Auto mode
0x2 : IDATAR0_START
AESB_IDATAR0 access only Auto mode
End of enumeration elements list.
OPMOD : Operating Mode
bits : 12 - 14 (3 bit)
access : read-write
Enumeration:
0x0 : ECB
Electronic Code Book mode
0x1 : CBC
Cipher Block Chaining mode
0x4 : CTR
Counter mode (16-bit internal counter)
End of enumeration elements list.
LOD : Last Output Data Mode
bits : 15 - 15 (1 bit)
access : read-write
CKEY : Key
bits : 20 - 23 (4 bit)
access : read-write
Enumeration:
0xE : PASSWD
This field must be written with 0xE the first time that AES_MR is programmed. For subsequent programming of the AES_MR register, any value can be written, including that of 0xE.Always reads as 0.
End of enumeration elements list.
Key Word Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
KEYW : Key Word
bits : 0 - 31 (32 bit)
access : write-only
Input Data Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
IDATA : Input Data Word
bits : 0 - 31 (32 bit)
access : write-only
Input Data Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
IDATA : Input Data Word
bits : 0 - 31 (32 bit)
access : write-only
Input Data Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
IDATA : Input Data Word
bits : 0 - 31 (32 bit)
access : write-only
Input Data Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
IDATA : Input Data Word
bits : 0 - 31 (32 bit)
access : write-only
Output Data Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
ODATA : Output Data
bits : 0 - 31 (32 bit)
access : read-only
Output Data Register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
ODATA : Output Data
bits : 0 - 31 (32 bit)
access : read-only
Output Data Register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
ODATA : Output Data
bits : 0 - 31 (32 bit)
access : read-only
Output Data Register
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
ODATA : Output Data
bits : 0 - 31 (32 bit)
access : read-only
Initialization Vector Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
IV : Initialization Vector
bits : 0 - 31 (32 bit)
access : write-only
Key Word Register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
KEYW : Key Word
bits : 0 - 31 (32 bit)
access : write-only
Initialization Vector Register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
IV : Initialization Vector
bits : 0 - 31 (32 bit)
access : write-only
Initialization Vector Register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
IV : Initialization Vector
bits : 0 - 31 (32 bit)
access : write-only
Initialization Vector Register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
IV : Initialization Vector
bits : 0 - 31 (32 bit)
access : write-only
Input Data Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
IDATA : Input Data Word
bits : 0 - 31 (32 bit)
access : write-only
Key Word Register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
KEYW : Key Word
bits : 0 - 31 (32 bit)
access : write-only
Output Data Register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ODATA : Output Data
bits : 0 - 31 (32 bit)
access : read-only
Key Word Register
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
KEYW : Key Word
bits : 0 - 31 (32 bit)
access : write-only
Initialization Vector Register
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
IV : Initialization Vector
bits : 0 - 31 (32 bit)
access : write-only
Input Data Register
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
IDATA : Input Data Word
bits : 0 - 31 (32 bit)
access : write-only
Output Data Register
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ODATA : Output Data
bits : 0 - 31 (32 bit)
access : read-only
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