\n

SYSC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x200 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CR

MR

SR


CR

Shutdown Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CR CR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SHDW KEY

SHDW : Shutdown Command
bits : 0 - 0 (1 bit)
access : write-only

KEY : Password
bits : 24 - 31 (8 bit)
access : write-only

Enumeration:

0xA5 : PASSWD

Writing any other value in this field aborts the write operation.

End of enumeration elements list.


MR

Shutdown Mode Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MR MR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WKMODE0 CPTWK0 WKMODE1 CPTWK1 RTCWKEN

WKMODE0 : Wake-up Mode 0
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0x0 : NO_DETECTION

No detection is performed on the wake-up input

0x1 : RISING_EDGE

Low to high transition triggers the detection process

0x2 : FALLING_EDGE

High to low level transition triggers the detection process

0x3 : ANY_EDGE

Any edge on the wake-up input triggers the detection process

End of enumeration elements list.

CPTWK0 : Debounce Counter on Wake-up 0
bits : 4 - 7 (4 bit)
access : read-write

WKMODE1 : Wake-up Mode 1
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0x0 : NO_DETECTION

No detection is performed on the wake-up input

0x1 : RISING_EDGE

Low to high transition triggers the detection process

0x2 : FALLING_EDGE

High to low level transition triggers the detection process

0x3 : ANY_EDGE

Any edge on the wake-up input triggers the detection process

End of enumeration elements list.

CPTWK1 : Debounce Counter on Wake-up 1
bits : 12 - 15 (4 bit)
access : read-write

RTCWKEN : Real-time Clock Wake-up Enable
bits : 17 - 17 (1 bit)
access : read-write


SR

Shutdown Status Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SR SR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WAKEUP0 WAKEUP1 RTCWK

WAKEUP0 : Wake-up 0 Status
bits : 0 - 0 (1 bit)
access : read-only

WAKEUP1 : Wake-up 1 Status
bits : 1 - 1 (1 bit)
access : read-only

RTCWK : Real-time Clock Wake-up
bits : 17 - 17 (1 bit)
access : read-only



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