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EIC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x0 Bytes (0x0)
size : 0x24 byte (0x0)
mem_usage : registers
protection :

Registers

CTRLA

NMICTRL

INTENSET

INTFLAG

ASYNCH

NMIFLAG

CONFIG0

SYNCBUSY

CONFIG1

EVCTRL

INTENCLR


CTRLA

Control
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRLA CTRLA read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SWRST ENABLE CKSEL

SWRST : Software Reset
bits : 0 - 0 (1 bit)
access : write-only

ENABLE : Enable
bits : 1 - 1 (1 bit)

CKSEL : Clock Selection
bits : 4 - 4 (1 bit)


NMICTRL

NMI Control
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NMICTRL NMICTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 NMISENSE NMIFILTEN NMIASYNCH

NMISENSE : NMI Input Sense Configuration
bits : 0 - 2 (3 bit)

Enumeration: NMISENSESelect

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

NMIFILTEN : NMI Filter Enable
bits : 3 - 3 (1 bit)

NMIASYNCH : NMI Asynchronous edge Detection Enable
bits : 4 - 4 (1 bit)


INTENSET

Interrupt Enable Set
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTENSET INTENSET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTINT

EXTINT : External Interrupt Disable
bits : 0 - 15 (16 bit)


INTFLAG

Interrupt Flag Status and Clear
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTFLAG INTFLAG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTINT

EXTINT : External Interrupt Flag
bits : 0 - 15 (16 bit)


ASYNCH

EIC Asynchronous edge Detection Enable
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ASYNCH ASYNCH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ASYNCH

ASYNCH : EIC Asynchronous edge Detection Enable
bits : 0 - 15 (16 bit)


NMIFLAG

NMI Interrupt Flag
address_offset : 0x2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NMIFLAG NMIFLAG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NMI

NMI : NMI Interrupt Flag
bits : 0 - 0 (1 bit)


CONFIG0

Configuration n
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CONFIG0 CONFIG0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SENSE0 FILTEN0 SENSE1 FILTEN1 SENSE2 FILTEN2 SENSE3 FILTEN3 SENSE4 FILTEN4 SENSE5 FILTEN5 SENSE6 FILTEN6 SENSE7 FILTEN7

SENSE0 : Input Sense Configuration 0
bits : 0 - 2 (3 bit)

Enumeration: SENSE0Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN0 : Filter Enable 0
bits : 3 - 3 (1 bit)

SENSE1 : Input Sense Configuration 1
bits : 4 - 6 (3 bit)

Enumeration: SENSE1Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN1 : Filter Enable 1
bits : 7 - 7 (1 bit)

SENSE2 : Input Sense Configuration 2
bits : 8 - 10 (3 bit)

Enumeration: SENSE2Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN2 : Filter Enable 2
bits : 11 - 11 (1 bit)

SENSE3 : Input Sense Configuration 3
bits : 12 - 14 (3 bit)

Enumeration: SENSE3Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN3 : Filter Enable 3
bits : 15 - 15 (1 bit)

SENSE4 : Input Sense Configuration 4
bits : 16 - 18 (3 bit)

Enumeration: SENSE4Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN4 : Filter Enable 4
bits : 19 - 19 (1 bit)

SENSE5 : Input Sense Configuration 5
bits : 20 - 22 (3 bit)

Enumeration: SENSE5Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN5 : Filter Enable 5
bits : 23 - 23 (1 bit)

SENSE6 : Input Sense Configuration 6
bits : 24 - 26 (3 bit)

Enumeration: SENSE6Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN6 : Filter Enable 6
bits : 27 - 27 (1 bit)

SENSE7 : Input Sense Configuration 7
bits : 28 - 30 (3 bit)

Enumeration: SENSE7Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN7 : Filter Enable 7
bits : 31 - 31 (1 bit)


SYNCBUSY

Syncbusy register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SYNCBUSY SYNCBUSY read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SWRST ENABLE

SWRST : Software reset synchronisation
bits : 0 - 0 (1 bit)
access : read-only

ENABLE : Enable synchronisation
bits : 1 - 1 (1 bit)
access : read-only


CONFIG1

Configuration n
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CONFIG1 CONFIG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SENSE0 FILTEN0 SENSE1 FILTEN1 SENSE2 FILTEN2 SENSE3 FILTEN3 SENSE4 FILTEN4 SENSE5 FILTEN5 SENSE6 FILTEN6 SENSE7 FILTEN7

SENSE0 : Input Sense Configuration 0
bits : 0 - 2 (3 bit)

Enumeration: SENSE0Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN0 : Filter Enable 0
bits : 3 - 3 (1 bit)

SENSE1 : Input Sense Configuration 1
bits : 4 - 6 (3 bit)

Enumeration: SENSE1Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN1 : Filter Enable 1
bits : 7 - 7 (1 bit)

SENSE2 : Input Sense Configuration 2
bits : 8 - 10 (3 bit)

Enumeration: SENSE2Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN2 : Filter Enable 2
bits : 11 - 11 (1 bit)

SENSE3 : Input Sense Configuration 3
bits : 12 - 14 (3 bit)

Enumeration: SENSE3Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN3 : Filter Enable 3
bits : 15 - 15 (1 bit)

SENSE4 : Input Sense Configuration 4
bits : 16 - 18 (3 bit)

Enumeration: SENSE4Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN4 : Filter Enable 4
bits : 19 - 19 (1 bit)

SENSE5 : Input Sense Configuration 5
bits : 20 - 22 (3 bit)

Enumeration: SENSE5Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN5 : Filter Enable 5
bits : 23 - 23 (1 bit)

SENSE6 : Input Sense Configuration 6
bits : 24 - 26 (3 bit)

Enumeration: SENSE6Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN6 : Filter Enable 6
bits : 27 - 27 (1 bit)

SENSE7 : Input Sense Configuration 7
bits : 28 - 30 (3 bit)

Enumeration: SENSE7Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN7 : Filter Enable 7
bits : 31 - 31 (1 bit)


EVCTRL

Event Control
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVCTRL EVCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTINTEO

EXTINTEO : External Interrupt Event Output Enable
bits : 0 - 15 (16 bit)


INTENCLR

Interrupt Enable Clear
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTENCLR INTENCLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTINT

EXTINT : External Interrupt Disable
bits : 0 - 15 (16 bit)



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