\n

PM

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2C byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x0 Bytes (0x0)
size : 0xA byte (0x0)
mem_usage : registers
protection :

Registers

SLEEPCFG

STDBYCFG


SLEEPCFG

Sleep Configuration
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SLEEPCFG SLEEPCFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SLEEPMODE

SLEEPMODE : Sleep Mode
bits : 0 - 2 (3 bit)

Enumeration: SLEEPMODESelect

0x0 : IDLE0

CPU clock is OFF

0x1 : IDLE1

AHB clock is OFF

0x2 : IDLE2

APB clock are OFF

0x4 : STANDBY

All Clocks are OFF

End of enumeration elements list.


STDBYCFG

Standby Configuration
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STDBYCFG STDBYCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VREGSMOD BBIASHS

VREGSMOD : Voltage Regulator Standby mode
bits : 6 - 7 (2 bit)

Enumeration: VREGSMODSelect

0x0 : AUTO

Automatic mode

0x1 : PERFORMANCE

Performance oriented

0x2 : LP

Low Power oriented

End of enumeration elements list.

BBIASHS : Back Bias for HMCRAMCHS
bits : 10 - 10 (1 bit)



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