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AC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CTRLA

CTRLB

EVCTRL

COMPCTRL0

COMPCTRL1

INTENCLR

SCALER0

INTENSET

INTFLAG

SCALER1

STATUSA

STATUSB

STATUSC

WINCTRL


CTRLA

Control A
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRLA CTRLA read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SWRST ENABLE RUNSTDBY LPMUX

SWRST : Software Reset
bits : 0 - 0 (1 bit)
access : write-only

ENABLE : Enable
bits : 1 - 1 (1 bit)

RUNSTDBY : Run in Standby
bits : 2 - 2 (1 bit)

LPMUX : Low-Power Mux
bits : 7 - 7 (1 bit)


CTRLB

Control B
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CTRLB CTRLB write-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 START0 START1

START0 : Comparator 0 Start Comparison
bits : 0 - 0 (1 bit)

START1 : Comparator 1 Start Comparison
bits : 1 - 1 (1 bit)


EVCTRL

Event Control
address_offset : 0x2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVCTRL EVCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPEO0 COMPEO1 WINEO0 COMPEI0 COMPEI1

COMPEO0 : Comparator 0 Event Output Enable
bits : 0 - 0 (1 bit)

COMPEO1 : Comparator 1 Event Output Enable
bits : 1 - 1 (1 bit)

WINEO0 : Window 0 Event Output Enable
bits : 4 - 4 (1 bit)

COMPEI0 : Comparator 0 Event Input
bits : 8 - 8 (1 bit)

COMPEI1 : Comparator 1 Event Input
bits : 9 - 9 (1 bit)


COMPCTRL0

Comparator Control n
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMPCTRL0 COMPCTRL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENABLE SINGLE SPEED INTSEL MUXNEG MUXPOS SWAP OUT HYST FLEN

ENABLE : Enable
bits : 0 - 0 (1 bit)

SINGLE : Single-Shot Mode
bits : 1 - 1 (1 bit)

SPEED : Speed Selection
bits : 2 - 3 (2 bit)

Enumeration: SPEEDSelect

0x0 : LOW

Low speed

0x1 : HIGH

High speed

End of enumeration elements list.

INTSEL : Interrupt Selection
bits : 5 - 6 (2 bit)

Enumeration: INTSELSelect

0x0 : TOGGLE

Interrupt on comparator output toggle

0x1 : RISING

Interrupt on comparator output rising

0x2 : FALLING

Interrupt on comparator output falling

0x3 : EOC

Interrupt on end of comparison (single-shot mode only)

End of enumeration elements list.

MUXNEG : Negative Input Mux Selection
bits : 8 - 10 (3 bit)

Enumeration: MUXNEGSelect

0x0 : PIN0

I/O pin 0

0x1 : PIN1

I/O pin 1

0x2 : PIN2

I/O pin 2

0x3 : PIN3

I/O pin 3

0x4 : GND

Ground

0x5 : VSCALE

VDD scaler

0x6 : BANDGAP

Internal bandgap voltage

0x7 : DAC

DAC output

End of enumeration elements list.

MUXPOS : Positive Input Mux Selection
bits : 12 - 13 (2 bit)

Enumeration: MUXPOSSelect

0x0 : PIN0

I/O pin 0

0x1 : PIN1

I/O pin 1

0x2 : PIN2

I/O pin 2

0x3 : PIN3

I/O pin 3

End of enumeration elements list.

SWAP : Swap Inputs and Invert
bits : 15 - 15 (1 bit)

OUT : Output
bits : 16 - 17 (2 bit)

Enumeration: OUTSelect

0x0 : OFF

The output of COMPn is not routed to the COMPn I/O port

0x1 : ASYNC

The asynchronous output of COMPn is routed to the COMPn I/O port

0x2 : SYNC

The synchronous output (including filtering) of COMPn is routed to the COMPn I/O port

End of enumeration elements list.

HYST : Hysteresis Enable
bits : 19 - 19 (1 bit)

FLEN : Filter Length
bits : 24 - 26 (3 bit)

Enumeration: FLENSelect

0x0 : OFF

No filtering

0x1 : MAJ3

3-bit majority function (2 of 3)

0x2 : MAJ5

5-bit majority function (3 of 5)

End of enumeration elements list.


COMPCTRL1

Comparator Control n
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMPCTRL1 COMPCTRL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENABLE SINGLE SPEED INTSEL MUXNEG MUXPOS SWAP OUT HYST FLEN

ENABLE : Enable
bits : 0 - 0 (1 bit)

SINGLE : Single-Shot Mode
bits : 1 - 1 (1 bit)

SPEED : Speed Selection
bits : 2 - 3 (2 bit)

Enumeration: SPEEDSelect

0x0 : LOW

Low speed

0x1 : HIGH

High speed

End of enumeration elements list.

INTSEL : Interrupt Selection
bits : 5 - 6 (2 bit)

Enumeration: INTSELSelect

0x0 : TOGGLE

Interrupt on comparator output toggle

0x1 : RISING

Interrupt on comparator output rising

0x2 : FALLING

Interrupt on comparator output falling

0x3 : EOC

Interrupt on end of comparison (single-shot mode only)

End of enumeration elements list.

MUXNEG : Negative Input Mux Selection
bits : 8 - 10 (3 bit)

Enumeration: MUXNEGSelect

0x0 : PIN0

I/O pin 0

0x1 : PIN1

I/O pin 1

0x2 : PIN2

I/O pin 2

0x3 : PIN3

I/O pin 3

0x4 : GND

Ground

0x5 : VSCALE

VDD scaler

0x6 : BANDGAP

Internal bandgap voltage

0x7 : DAC

DAC output

End of enumeration elements list.

MUXPOS : Positive Input Mux Selection
bits : 12 - 13 (2 bit)

Enumeration: MUXPOSSelect

0x0 : PIN0

I/O pin 0

0x1 : PIN1

I/O pin 1

0x2 : PIN2

I/O pin 2

0x3 : PIN3

I/O pin 3

End of enumeration elements list.

SWAP : Swap Inputs and Invert
bits : 15 - 15 (1 bit)

OUT : Output
bits : 16 - 17 (2 bit)

Enumeration: OUTSelect

0x0 : OFF

The output of COMPn is not routed to the COMPn I/O port

0x1 : ASYNC

The asynchronous output of COMPn is routed to the COMPn I/O port

0x2 : SYNC

The synchronous output (including filtering) of COMPn is routed to the COMPn I/O port

End of enumeration elements list.

HYST : Hysteresis Enable
bits : 19 - 19 (1 bit)

FLEN : Filter Length
bits : 24 - 26 (3 bit)

Enumeration: FLENSelect

0x0 : OFF

No filtering

0x1 : MAJ3

3-bit majority function (2 of 3)

0x2 : MAJ5

5-bit majority function (3 of 5)

End of enumeration elements list.


INTENCLR

Interrupt Enable Clear
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTENCLR INTENCLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 COMP0 COMP1 WIN0

COMP0 : Comparator 0 Interrupt Enable
bits : 0 - 0 (1 bit)

COMP1 : Comparator 1 Interrupt Enable
bits : 1 - 1 (1 bit)

WIN0 : Window 0 Interrupt Enable
bits : 4 - 4 (1 bit)


SCALER0

Scaler n
address_offset : 0x40 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCALER0 SCALER0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 VALUE

VALUE : Scaler Value
bits : 0 - 5 (6 bit)


INTENSET

Interrupt Enable Set
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTENSET INTENSET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 COMP0 COMP1 WIN0

COMP0 : Comparator 0 Interrupt Enable
bits : 0 - 0 (1 bit)

COMP1 : Comparator 1 Interrupt Enable
bits : 1 - 1 (1 bit)

WIN0 : Window 0 Interrupt Enable
bits : 4 - 4 (1 bit)


INTFLAG

Interrupt Flag Status and Clear
address_offset : 0x6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTFLAG INTFLAG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 COMP0 COMP1 WIN0

COMP0 : Comparator 0
bits : 0 - 0 (1 bit)

COMP1 : Comparator 1
bits : 1 - 1 (1 bit)

WIN0 : Window 0
bits : 4 - 4 (1 bit)


SCALER1

Scaler n
address_offset : 0x61 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCALER1 SCALER1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 VALUE

VALUE : Scaler Value
bits : 0 - 5 (6 bit)


STATUSA

Status A
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STATUSA STATUSA read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 STATE0 STATE1 WSTATE0

STATE0 : Comparator 0 Current State
bits : 0 - 0 (1 bit)

STATE1 : Comparator 1 Current State
bits : 1 - 1 (1 bit)

WSTATE0 : Window 0 Current State
bits : 4 - 5 (2 bit)

Enumeration: WSTATE0Select

0x0 : ABOVE

Signal is above window

0x1 : INSIDE

Signal is inside window

0x2 : BELOW

Signal is below window

End of enumeration elements list.


STATUSB

Status B
address_offset : 0x9 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STATUSB STATUSB read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 READY0 READY1 SYNCBUSY

READY0 : Comparator 0 Ready
bits : 0 - 0 (1 bit)
access : read-only

READY1 : Comparator 1 Ready
bits : 1 - 1 (1 bit)
access : read-only

SYNCBUSY : Synchronization Busy
bits : 7 - 7 (1 bit)


STATUSC

Status C
address_offset : 0xA Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STATUSC STATUSC read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 STATE0 STATE1 WSTATE0

STATE0 : Comparator 0 Current State
bits : 0 - 0 (1 bit)

STATE1 : Comparator 1 Current State
bits : 1 - 1 (1 bit)

WSTATE0 : Window 0 Current State
bits : 4 - 5 (2 bit)

Enumeration: WSTATE0Select

0x0 : ABOVE

Signal is above window

0x1 : INSIDE

Signal is inside window

0x2 : BELOW

Signal is below window

End of enumeration elements list.


WINCTRL

Window Control
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WINCTRL WINCTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 WEN0 WINTSEL0

WEN0 : Window 0 Mode Enable
bits : 0 - 0 (1 bit)

WINTSEL0 : Window 0 Interrupt Selection
bits : 1 - 2 (2 bit)

Enumeration: WINTSEL0Select

0x0 : ABOVE

Interrupt on signal above window

0x1 : INSIDE

Interrupt on signal inside window

0x2 : BELOW

Interrupt on signal below window

0x3 : OUTSIDE

Interrupt on signal outside window

End of enumeration elements list.



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