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EIC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CTRL

STATUS

INTFLAG

WAKEUP

NMICTRL

NMIFLAG

CONFIG0

EVCTRL

CONFIG1

INTENCLR

INTENSET


CTRL

Control
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SWRST ENABLE

SWRST : Software Reset
bits : 0 - 0 (1 bit)

ENABLE : Enable
bits : 1 - 1 (1 bit)


STATUS

Status
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STATUS STATUS read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SYNCBUSY

SYNCBUSY : Synchronization Busy
bits : 7 - 7 (1 bit)
access : read-only


INTFLAG

Interrupt Flag Status and Clear
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTFLAG INTFLAG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTINT0 EXTINT1 EXTINT2 EXTINT3 EXTINT4 EXTINT5 EXTINT6 EXTINT7 EXTINT8 EXTINT9 EXTINT10 EXTINT11 EXTINT12 EXTINT13 EXTINT14 EXTINT15

EXTINT0 : External Interrupt 0
bits : 0 - 0 (1 bit)

EXTINT1 : External Interrupt 1
bits : 1 - 1 (1 bit)

EXTINT2 : External Interrupt 2
bits : 2 - 2 (1 bit)

EXTINT3 : External Interrupt 3
bits : 3 - 3 (1 bit)

EXTINT4 : External Interrupt 4
bits : 4 - 4 (1 bit)

EXTINT5 : External Interrupt 5
bits : 5 - 5 (1 bit)

EXTINT6 : External Interrupt 6
bits : 6 - 6 (1 bit)

EXTINT7 : External Interrupt 7
bits : 7 - 7 (1 bit)

EXTINT8 : External Interrupt 8
bits : 8 - 8 (1 bit)

EXTINT9 : External Interrupt 9
bits : 9 - 9 (1 bit)

EXTINT10 : External Interrupt 10
bits : 10 - 10 (1 bit)

EXTINT11 : External Interrupt 11
bits : 11 - 11 (1 bit)

EXTINT12 : External Interrupt 12
bits : 12 - 12 (1 bit)

EXTINT13 : External Interrupt 13
bits : 13 - 13 (1 bit)

EXTINT14 : External Interrupt 14
bits : 14 - 14 (1 bit)

EXTINT15 : External Interrupt 15
bits : 15 - 15 (1 bit)


WAKEUP

Wake-Up Enable
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WAKEUP WAKEUP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WAKEUPEN0 WAKEUPEN1 WAKEUPEN2 WAKEUPEN3 WAKEUPEN4 WAKEUPEN5 WAKEUPEN6 WAKEUPEN7 WAKEUPEN8 WAKEUPEN9 WAKEUPEN10 WAKEUPEN11 WAKEUPEN12 WAKEUPEN13 WAKEUPEN14 WAKEUPEN15

WAKEUPEN0 : External Interrupt 0 Wake-up Enable
bits : 0 - 0 (1 bit)

WAKEUPEN1 : External Interrupt 1 Wake-up Enable
bits : 1 - 1 (1 bit)

WAKEUPEN2 : External Interrupt 2 Wake-up Enable
bits : 2 - 2 (1 bit)

WAKEUPEN3 : External Interrupt 3 Wake-up Enable
bits : 3 - 3 (1 bit)

WAKEUPEN4 : External Interrupt 4 Wake-up Enable
bits : 4 - 4 (1 bit)

WAKEUPEN5 : External Interrupt 5 Wake-up Enable
bits : 5 - 5 (1 bit)

WAKEUPEN6 : External Interrupt 6 Wake-up Enable
bits : 6 - 6 (1 bit)

WAKEUPEN7 : External Interrupt 7 Wake-up Enable
bits : 7 - 7 (1 bit)

WAKEUPEN8 : External Interrupt 8 Wake-up Enable
bits : 8 - 8 (1 bit)

WAKEUPEN9 : External Interrupt 9 Wake-up Enable
bits : 9 - 9 (1 bit)

WAKEUPEN10 : External Interrupt 10 Wake-up Enable
bits : 10 - 10 (1 bit)

WAKEUPEN11 : External Interrupt 11 Wake-up Enable
bits : 11 - 11 (1 bit)

WAKEUPEN12 : External Interrupt 12 Wake-up Enable
bits : 12 - 12 (1 bit)

WAKEUPEN13 : External Interrupt 13 Wake-up Enable
bits : 13 - 13 (1 bit)

WAKEUPEN14 : External Interrupt 14 Wake-up Enable
bits : 14 - 14 (1 bit)

WAKEUPEN15 : External Interrupt 15 Wake-up Enable
bits : 15 - 15 (1 bit)


NMICTRL

Non-Maskable Interrupt Control
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NMICTRL NMICTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 NMISENSE NMIFILTEN

NMISENSE : Non-Maskable Interrupt Sense
bits : 0 - 2 (3 bit)

Enumeration: NMISENSESelect

0x0 : NONE

No detection

0x1 : RISE

Rising-edge detection

0x2 : FALL

Falling-edge detection

0x3 : BOTH

Both-edges detection

0x4 : HIGH

High-level detection

0x5 : LOW

Low-level detection

End of enumeration elements list.

NMIFILTEN : Non-Maskable Interrupt Filter Enable
bits : 3 - 3 (1 bit)


NMIFLAG

Non-Maskable Interrupt Flag Status and Clear
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NMIFLAG NMIFLAG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 NMI

NMI : Non-Maskable Interrupt
bits : 0 - 0 (1 bit)


CONFIG0

Configuration n
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CONFIG0 CONFIG0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SENSE0 FILTEN0 SENSE1 FILTEN1 SENSE2 FILTEN2 SENSE3 FILTEN3 SENSE4 FILTEN4 SENSE5 FILTEN5 SENSE6 FILTEN6 SENSE7 FILTEN7

SENSE0 : Input Sense 0 Configuration
bits : 0 - 2 (3 bit)

Enumeration: SENSE0Select

0x0 : NONE

No detection

0x1 : RISE

Rising-edge detection

0x2 : FALL

Falling-edge detection

0x3 : BOTH

Both-edges detection

0x4 : HIGH

High-level detection

0x5 : LOW

Low-level detection

End of enumeration elements list.

FILTEN0 : Filter 0 Enable
bits : 3 - 3 (1 bit)

SENSE1 : Input Sense 1 Configuration
bits : 4 - 6 (3 bit)

Enumeration: SENSE1Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN1 : Filter 1 Enable
bits : 7 - 7 (1 bit)

SENSE2 : Input Sense 2 Configuration
bits : 8 - 10 (3 bit)

Enumeration: SENSE2Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN2 : Filter 2 Enable
bits : 11 - 11 (1 bit)

SENSE3 : Input Sense 3 Configuration
bits : 12 - 14 (3 bit)

Enumeration: SENSE3Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN3 : Filter 3 Enable
bits : 15 - 15 (1 bit)

SENSE4 : Input Sense 4 Configuration
bits : 16 - 18 (3 bit)

Enumeration: SENSE4Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN4 : Filter 4 Enable
bits : 19 - 19 (1 bit)

SENSE5 : Input Sense 5 Configuration
bits : 20 - 22 (3 bit)

Enumeration: SENSE5Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN5 : Filter 5 Enable
bits : 23 - 23 (1 bit)

SENSE6 : Input Sense 6 Configuration
bits : 24 - 26 (3 bit)

Enumeration: SENSE6Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN6 : Filter 6 Enable
bits : 27 - 27 (1 bit)

SENSE7 : Input Sense 7 Configuration
bits : 28 - 30 (3 bit)

Enumeration: SENSE7Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN7 : Filter 7 Enable
bits : 31 - 31 (1 bit)


EVCTRL

Event Control
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVCTRL EVCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTINTEO0 EXTINTEO1 EXTINTEO2 EXTINTEO3 EXTINTEO4 EXTINTEO5 EXTINTEO6 EXTINTEO7 EXTINTEO8 EXTINTEO9 EXTINTEO10 EXTINTEO11 EXTINTEO12 EXTINTEO13 EXTINTEO14 EXTINTEO15

EXTINTEO0 : External Interrupt 0 Event Output Enable
bits : 0 - 0 (1 bit)

EXTINTEO1 : External Interrupt 1 Event Output Enable
bits : 1 - 1 (1 bit)

EXTINTEO2 : External Interrupt 2 Event Output Enable
bits : 2 - 2 (1 bit)

EXTINTEO3 : External Interrupt 3 Event Output Enable
bits : 3 - 3 (1 bit)

EXTINTEO4 : External Interrupt 4 Event Output Enable
bits : 4 - 4 (1 bit)

EXTINTEO5 : External Interrupt 5 Event Output Enable
bits : 5 - 5 (1 bit)

EXTINTEO6 : External Interrupt 6 Event Output Enable
bits : 6 - 6 (1 bit)

EXTINTEO7 : External Interrupt 7 Event Output Enable
bits : 7 - 7 (1 bit)

EXTINTEO8 : External Interrupt 8 Event Output Enable
bits : 8 - 8 (1 bit)

EXTINTEO9 : External Interrupt 9 Event Output Enable
bits : 9 - 9 (1 bit)

EXTINTEO10 : External Interrupt 10 Event Output Enable
bits : 10 - 10 (1 bit)

EXTINTEO11 : External Interrupt 11 Event Output Enable
bits : 11 - 11 (1 bit)

EXTINTEO12 : External Interrupt 12 Event Output Enable
bits : 12 - 12 (1 bit)

EXTINTEO13 : External Interrupt 13 Event Output Enable
bits : 13 - 13 (1 bit)

EXTINTEO14 : External Interrupt 14 Event Output Enable
bits : 14 - 14 (1 bit)

EXTINTEO15 : External Interrupt 15 Event Output Enable
bits : 15 - 15 (1 bit)


CONFIG1

Configuration n
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CONFIG1 CONFIG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SENSE0 FILTEN0 SENSE1 FILTEN1 SENSE2 FILTEN2 SENSE3 FILTEN3 SENSE4 FILTEN4 SENSE5 FILTEN5 SENSE6 FILTEN6 SENSE7 FILTEN7

SENSE0 : Input Sense 0 Configuration
bits : 0 - 2 (3 bit)

Enumeration: SENSE0Select

0x0 : NONE

No detection

0x1 : RISE

Rising-edge detection

0x2 : FALL

Falling-edge detection

0x3 : BOTH

Both-edges detection

0x4 : HIGH

High-level detection

0x5 : LOW

Low-level detection

End of enumeration elements list.

FILTEN0 : Filter 0 Enable
bits : 3 - 3 (1 bit)

SENSE1 : Input Sense 1 Configuration
bits : 4 - 6 (3 bit)

Enumeration: SENSE1Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN1 : Filter 1 Enable
bits : 7 - 7 (1 bit)

SENSE2 : Input Sense 2 Configuration
bits : 8 - 10 (3 bit)

Enumeration: SENSE2Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN2 : Filter 2 Enable
bits : 11 - 11 (1 bit)

SENSE3 : Input Sense 3 Configuration
bits : 12 - 14 (3 bit)

Enumeration: SENSE3Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN3 : Filter 3 Enable
bits : 15 - 15 (1 bit)

SENSE4 : Input Sense 4 Configuration
bits : 16 - 18 (3 bit)

Enumeration: SENSE4Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN4 : Filter 4 Enable
bits : 19 - 19 (1 bit)

SENSE5 : Input Sense 5 Configuration
bits : 20 - 22 (3 bit)

Enumeration: SENSE5Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN5 : Filter 5 Enable
bits : 23 - 23 (1 bit)

SENSE6 : Input Sense 6 Configuration
bits : 24 - 26 (3 bit)

Enumeration: SENSE6Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN6 : Filter 6 Enable
bits : 27 - 27 (1 bit)

SENSE7 : Input Sense 7 Configuration
bits : 28 - 30 (3 bit)

Enumeration: SENSE7Select

0x0 : NONE

No detection

0x1 : RISE

Rising edge detection

0x2 : FALL

Falling edge detection

0x3 : BOTH

Both edges detection

0x4 : HIGH

High level detection

0x5 : LOW

Low level detection

End of enumeration elements list.

FILTEN7 : Filter 7 Enable
bits : 31 - 31 (1 bit)


INTENCLR

Interrupt Enable Clear
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTENCLR INTENCLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTINT0 EXTINT1 EXTINT2 EXTINT3 EXTINT4 EXTINT5 EXTINT6 EXTINT7 EXTINT8 EXTINT9 EXTINT10 EXTINT11 EXTINT12 EXTINT13 EXTINT14 EXTINT15

EXTINT0 : External Interrupt 0 Enable
bits : 0 - 0 (1 bit)

EXTINT1 : External Interrupt 1 Enable
bits : 1 - 1 (1 bit)

EXTINT2 : External Interrupt 2 Enable
bits : 2 - 2 (1 bit)

EXTINT3 : External Interrupt 3 Enable
bits : 3 - 3 (1 bit)

EXTINT4 : External Interrupt 4 Enable
bits : 4 - 4 (1 bit)

EXTINT5 : External Interrupt 5 Enable
bits : 5 - 5 (1 bit)

EXTINT6 : External Interrupt 6 Enable
bits : 6 - 6 (1 bit)

EXTINT7 : External Interrupt 7 Enable
bits : 7 - 7 (1 bit)

EXTINT8 : External Interrupt 8 Enable
bits : 8 - 8 (1 bit)

EXTINT9 : External Interrupt 9 Enable
bits : 9 - 9 (1 bit)

EXTINT10 : External Interrupt 10 Enable
bits : 10 - 10 (1 bit)

EXTINT11 : External Interrupt 11 Enable
bits : 11 - 11 (1 bit)

EXTINT12 : External Interrupt 12 Enable
bits : 12 - 12 (1 bit)

EXTINT13 : External Interrupt 13 Enable
bits : 13 - 13 (1 bit)

EXTINT14 : External Interrupt 14 Enable
bits : 14 - 14 (1 bit)

EXTINT15 : External Interrupt 15 Enable
bits : 15 - 15 (1 bit)


INTENSET

Interrupt Enable Set
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTENSET INTENSET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTINT0 EXTINT1 EXTINT2 EXTINT3 EXTINT4 EXTINT5 EXTINT6 EXTINT7 EXTINT8 EXTINT9 EXTINT10 EXTINT11 EXTINT12 EXTINT13 EXTINT14 EXTINT15

EXTINT0 : External Interrupt 0 Enable
bits : 0 - 0 (1 bit)

EXTINT1 : External Interrupt 1 Enable
bits : 1 - 1 (1 bit)

EXTINT2 : External Interrupt 2 Enable
bits : 2 - 2 (1 bit)

EXTINT3 : External Interrupt 3 Enable
bits : 3 - 3 (1 bit)

EXTINT4 : External Interrupt 4 Enable
bits : 4 - 4 (1 bit)

EXTINT5 : External Interrupt 5 Enable
bits : 5 - 5 (1 bit)

EXTINT6 : External Interrupt 6 Enable
bits : 6 - 6 (1 bit)

EXTINT7 : External Interrupt 7 Enable
bits : 7 - 7 (1 bit)

EXTINT8 : External Interrupt 8 Enable
bits : 8 - 8 (1 bit)

EXTINT9 : External Interrupt 9 Enable
bits : 9 - 9 (1 bit)

EXTINT10 : External Interrupt 10 Enable
bits : 10 - 10 (1 bit)

EXTINT11 : External Interrupt 11 Enable
bits : 11 - 11 (1 bit)

EXTINT12 : External Interrupt 12 Enable
bits : 12 - 12 (1 bit)

EXTINT13 : External Interrupt 13 Enable
bits : 13 - 13 (1 bit)

EXTINT14 : External Interrupt 14 Enable
bits : 14 - 14 (1 bit)

EXTINT15 : External Interrupt 15 Enable
bits : 15 - 15 (1 bit)



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