\n
address_offset : 0x0 Bytes (0x0)
size : 0x2C byte (0x0)
mem_usage : registers
protection : not protected
Control A
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWRST : Software Reset
bits : 0 - 0 (1 bit)
ENABLE : Enable
bits : 1 - 1 (1 bit)
RUNSTDBY : Run in Standby
bits : 2 - 2 (1 bit)
Reference Control
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REFSEL : Reference Selection
bits : 0 - 3 (4 bit)
Enumeration: REFSELSelect
0x0 : INT1V
1.0V voltage reference
0x1 : INTVCC0
1/1.48 VDDANA
0x2 : INTVCC1
1/2 VDDANA (only for VDDANA > 2.0V)
0x3 : AREFA
External reference
0x4 : AREFB
External reference
End of enumeration elements list.
REFCOMP : Reference Buffer Offset Compensation Enable
bits : 7 - 7 (1 bit)
Inputs Control
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MUXPOS : Positive MUX Input Selection
bits : 0 - 4 (5 bit)
Enumeration: MUXPOSSelect
0x0 : PIN0
ADC AIN0 Pin
0x1 : PIN1
ADC AIN1 Pin
0x2 : PIN2
ADC AIN2 Pin
0x3 : PIN3
ADC AIN3 Pin
0x4 : PIN4
ADC AIN4 Pin
0x5 : PIN5
ADC AIN5 Pin
0x6 : PIN6
ADC AIN6 Pin
0x7 : PIN7
ADC AIN7 Pin
0x8 : PIN8
ADC AIN8 Pin
0x9 : PIN9
ADC AIN9 Pin
0xa : PIN10
ADC AIN10 Pin
0xb : PIN11
ADC AIN11 Pin
0xc : PIN12
ADC AIN12 Pin
0xd : PIN13
ADC AIN13 Pin
0xe : PIN14
ADC AIN14 Pin
0xf : PIN15
ADC AIN15 Pin
0x10 : PIN16
ADC AIN16 Pin
0x11 : PIN17
ADC AIN17 Pin
0x12 : PIN18
ADC AIN18 Pin
0x13 : PIN19
ADC AIN19 Pin
0x18 : TEMP
Temperature Reference
0x19 : BANDGAP
Bandgap Voltage
0x1a : SCALEDCOREVCC
1/4 Scaled Core Supply
0x1b : SCALEDIOVCC
1/4 Scaled I/O Supply
0x1c : DAC
DAC Output
End of enumeration elements list.
MUXNEG : Negative MUX Input Selection
bits : 8 - 12 (5 bit)
Enumeration: MUXNEGSelect
0x0 : PIN0
ADC AIN0 Pin
0x1 : PIN1
ADC AIN1 Pin
0x2 : PIN2
ADC AIN2 Pin
0x3 : PIN3
ADC AIN3 Pin
0x4 : PIN4
ADC AIN4 Pin
0x5 : PIN5
ADC AIN5 Pin
0x6 : PIN6
ADC AIN6 Pin
0x7 : PIN7
ADC AIN7 Pin
0x18 : GND
Internal ground
0x19 : IOGND
IO ground
End of enumeration elements list.
INPUTSCAN : Number of Input Channels Included in Scan
bits : 16 - 19 (4 bit)
INPUTOFFSET : Positive MUX Setting Offset
bits : 20 - 23 (4 bit)
GAIN : Gain Factor Selection
bits : 24 - 27 (4 bit)
Enumeration: GAINSelect
0x0 : 1X
1x
0x1 : 2X
2x
0x2 : 4X
4x
0x3 : 8X
8x
0x4 : 16X
16x
0xf : DIV2
1/2x
End of enumeration elements list.
Event Control
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STARTEI : Start Conversion Event In
bits : 0 - 0 (1 bit)
SYNCEI : Synchronization Event In
bits : 1 - 1 (1 bit)
RESRDYEO : Result Ready Event Out
bits : 4 - 4 (1 bit)
WINMONEO : Window Monitor Event Out
bits : 5 - 5 (1 bit)
Interrupt Enable Clear
address_offset : 0x16 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RESRDY : Result Ready Interrupt Enable
bits : 0 - 0 (1 bit)
OVERRUN : Overrun Interrupt Enable
bits : 1 - 1 (1 bit)
WINMON : Window Monitor Interrupt Enable
bits : 2 - 2 (1 bit)
SYNCRDY : Synchronization Ready Interrupt Enable
bits : 3 - 3 (1 bit)
Interrupt Enable Set
address_offset : 0x17 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RESRDY : Result Ready Interrupt Enable
bits : 0 - 0 (1 bit)
OVERRUN : Overrun Interrupt Enable
bits : 1 - 1 (1 bit)
WINMON : Window Monitor Interrupt Enable
bits : 2 - 2 (1 bit)
SYNCRDY : Synchronization Ready Interrupt Enable
bits : 3 - 3 (1 bit)
Interrupt Flag Status and Clear
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RESRDY : Result Ready
bits : 0 - 0 (1 bit)
OVERRUN : Overrun
bits : 1 - 1 (1 bit)
WINMON : Window Monitor
bits : 2 - 2 (1 bit)
SYNCRDY : Synchronization Ready
bits : 3 - 3 (1 bit)
Status
address_offset : 0x19 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SYNCBUSY : Synchronization Busy
bits : 7 - 7 (1 bit)
access : read-only
Result
address_offset : 0x1A Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RESULT : Result Conversion Value
bits : 0 - 15 (16 bit)
access : read-only
Window Monitor Lower Threshold
address_offset : 0x1C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WINLT : Window Lower Threshold
bits : 0 - 15 (16 bit)
Average Control
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SAMPLENUM : Number of Samples to be Collected
bits : 0 - 3 (4 bit)
Enumeration: SAMPLENUMSelect
0x0 : 1
1 sample
0x1 : 2
2 samples
0x2 : 4
4 samples
0x3 : 8
8 samples
0x4 : 16
16 samples
0x5 : 32
32 samples
0x6 : 64
64 samples
0x7 : 128
128 samples
0x8 : 256
256 samples
0x9 : 512
512 samples
0xa : 1024
1024 samples
End of enumeration elements list.
ADJRES : Adjusting Result / Division Coefficient
bits : 4 - 6 (3 bit)
Window Monitor Upper Threshold
address_offset : 0x20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WINUT : Window Upper Threshold
bits : 0 - 15 (16 bit)
Gain Correction
address_offset : 0x24 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GAINCORR : Gain Correction Value
bits : 0 - 11 (12 bit)
Offset Correction
address_offset : 0x26 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OFFSETCORR : Offset Correction Value
bits : 0 - 11 (12 bit)
Calibration
address_offset : 0x28 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LINEARITY_CAL : Linearity Calibration Value
bits : 0 - 7 (8 bit)
BIAS_CAL : Bias Calibration Value
bits : 8 - 10 (3 bit)
Debug Control
address_offset : 0x2A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DBGRUN : Debug Run
bits : 0 - 0 (1 bit)
Sampling Time Control
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SAMPLEN : Sampling Time Length
bits : 0 - 5 (6 bit)
Control B
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIFFMODE : Differential Mode
bits : 0 - 0 (1 bit)
LEFTADJ : Left Adjusted Result
bits : 1 - 1 (1 bit)
FREERUN : Free Running Mode
bits : 2 - 2 (1 bit)
CORREN : Digital Correction Logic Enabled
bits : 3 - 3 (1 bit)
RESSEL : Conversion Result Resolution
bits : 4 - 5 (2 bit)
Enumeration: RESSELSelect
0x0 : 12BIT
12-bit result
0x1 : 16BIT
For averaging mode output
0x2 : 10BIT
10-bit result
0x3 : 8BIT
8-bit result
End of enumeration elements list.
PRESCALER : Prescaler Configuration
bits : 8 - 10 (3 bit)
Enumeration: PRESCALERSelect
0x0 : DIV4
Peripheral clock divided by 4
0x1 : DIV8
Peripheral clock divided by 8
0x2 : DIV16
Peripheral clock divided by 16
0x3 : DIV32
Peripheral clock divided by 32
0x4 : DIV64
Peripheral clock divided by 64
0x5 : DIV128
Peripheral clock divided by 128
0x6 : DIV256
Peripheral clock divided by 256
0x7 : DIV512
Peripheral clock divided by 512
End of enumeration elements list.
Window Monitor Control
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WINMODE : Window Monitor Mode
bits : 0 - 2 (3 bit)
Enumeration: WINMODESelect
0x0 : DISABLE
No window mode (default)
0x1 : MODE1
Mode 1: RESULT > WINLT
0x2 : MODE2
Mode 2: RESULT < WINUT
0x3 : MODE3
Mode 3: WINLT < RESULT < WINUT
0x4 : MODE4
Mode 4: !(WINLT < RESULT < WINUT)
End of enumeration elements list.
Software Trigger
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FLUSH : ADC Conversion Flush
bits : 0 - 0 (1 bit)
START : ADC Start Conversion
bits : 1 - 1 (1 bit)
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