\n
address_offset : 0x0 Bytes (0x0)
size : 0x100 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x0 Bytes (0x0)
size : 0x24 byte (0x0)
mem_usage : registers
protection :
FLEXCOM Mode register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OPMODE : FLEXCOM Operating Mode
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0x0 : NO_COM
No communication
0x1 : USART
All related USART related protocols are selected (RS232, RS485, ISO7816, LIN,)All SPI/TWI related registers are not accessible and have no impact on IOs.
0x2 : SPI
SPI operating mode is selected.All USART/TWI related registers are not accessible and have no impact on IOs.
0x3 : TWI
All related TWI protocols are selected (TWI, SMBUS). All USART/SPI related registers are not accessible and have no impact on IOs.
End of enumeration elements list.
FLEXCOM Receive Holding Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RXDATA : Receive Data
bits : 0 - 15 (16 bit)
access : read-only
FLEXCOM Transmit Holding Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXDATA : Transmit Data
bits : 0 - 15 (16 bit)
access : read-write
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