\n

OSC32KCTRL

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2C byte (0x0)
mem_usage : registers
protection : not protected

Registers

INTENCLR

RTCCTRL

XOSC32K

OSC32K

OSCULP32K

INTENSET

INTFLAG

STATUS


INTENCLR

Interrupt Enable Clear
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTENCLR INTENCLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XOSC32KRDY OSC32KRDY

XOSC32KRDY : XOSC32K Ready Interrupt Enable
bits : 0 - 0 (1 bit)

OSC32KRDY : OSC32K Ready Interrupt Enable
bits : 1 - 1 (1 bit)


RTCCTRL

Clock selection
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RTCCTRL RTCCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RTCSEL

RTCSEL : RTC Clock Selection
bits : 0 - 2 (3 bit)

Enumeration: RTCSELSelect

0x0 : ULP1K

1.024kHz from 32kHz internal ULP oscillator

0x1 : ULP32K

32.768kHz from 32kHz internal ULP oscillator

0x2 : OSC1K

1.024kHz from 32.768kHz internal oscillator

0x3 : OSC32K

32.768kHz from 32.768kHz internal oscillator

0x4 : XOSC1K

1.024kHz from 32.768kHz internal oscillator

0x5 : XOSC32K

32.768kHz from 32.768kHz external crystal oscillator

End of enumeration elements list.


XOSC32K

32kHz External Crystal Oscillator (XOSC32K) Control
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

XOSC32K XOSC32K read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENABLE XTALEN EN32K EN1K RUNSTDBY ONDEMAND STARTUP WRTLOCK

ENABLE : Oscillator Enable
bits : 1 - 1 (1 bit)

XTALEN : Crystal Oscillator Enable
bits : 2 - 2 (1 bit)

EN32K : 32kHz Output Enable
bits : 3 - 3 (1 bit)

EN1K : 1kHz Output Enable
bits : 4 - 4 (1 bit)

RUNSTDBY : Run in Standby
bits : 6 - 6 (1 bit)

ONDEMAND : On Demand Control
bits : 7 - 7 (1 bit)

STARTUP : Oscillator Start-Up Time
bits : 8 - 10 (3 bit)

WRTLOCK : Write Lock
bits : 12 - 12 (1 bit)


OSC32K

32kHz Internal Oscillator (OSC32K) Control
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSC32K OSC32K read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENABLE EN32K EN1K RUNSTDBY ONDEMAND STARTUP WRTLOCK CALIB

ENABLE : Oscillator Enable
bits : 1 - 1 (1 bit)

EN32K : 32kHz Output Enable
bits : 2 - 2 (1 bit)

EN1K : 1kHz Output Enable
bits : 3 - 3 (1 bit)

RUNSTDBY : Run in Standby
bits : 6 - 6 (1 bit)

ONDEMAND : On Demand Control
bits : 7 - 7 (1 bit)

STARTUP : Oscillator Start-Up Time
bits : 8 - 10 (3 bit)

WRTLOCK : Write Lock
bits : 12 - 12 (1 bit)

CALIB : Oscillator Calibration
bits : 16 - 22 (7 bit)


OSCULP32K

32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSCULP32K OSCULP32K read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EN32K EN1K CALIB WRTLOCK

EN32K : Enable Out 32k
bits : 1 - 1 (1 bit)

EN1K : Enable Out 1k
bits : 2 - 2 (1 bit)

CALIB : Oscillator Calibration
bits : 8 - 12 (5 bit)

WRTLOCK : Write Lock
bits : 15 - 15 (1 bit)


INTENSET

Interrupt Enable Set
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTENSET INTENSET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XOSC32KRDY OSC32KRDY

XOSC32KRDY : XOSC32K Ready Interrupt Enable
bits : 0 - 0 (1 bit)

OSC32KRDY : OSC32K Ready Interrupt Enable
bits : 1 - 1 (1 bit)


INTFLAG

Interrupt Flag Status and Clear
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTFLAG INTFLAG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XOSC32KRDY OSC32KRDY

XOSC32KRDY : XOSC32K Ready
bits : 0 - 0 (1 bit)

OSC32KRDY : OSC32K Ready
bits : 1 - 1 (1 bit)


STATUS

Power and Clocks Status
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STATUS STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XOSC32KRDY OSC32KRDY

XOSC32KRDY : XOSC32K Ready
bits : 0 - 0 (1 bit)
access : read-only

OSC32KRDY : OSC32K Ready
bits : 1 - 1 (1 bit)
access : read-only



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