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CCL

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CTRL

LUTCTRL0

LUTCTRL1

LUTCTRL2

LUTCTRL3

SEQCTRL0

SEQCTRL1


CTRL

Control
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL CTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SWRST ENABLE RUNSTDBY

SWRST : Software Reset
bits : 0 - 0 (1 bit)
access : write-only

ENABLE : Enable
bits : 1 - 1 (1 bit)

RUNSTDBY : Run during Standby
bits : 6 - 6 (1 bit)


LUTCTRL0

LUT Control x
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LUTCTRL0 LUTCTRL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENABLE FILTSEL EDGESEL INSEL0 INSEL1 INSEL2 INVEI LUTEI LUTEO TRUTH

ENABLE : LUT Enable
bits : 1 - 1 (1 bit)

FILTSEL : Filter Selection
bits : 4 - 5 (2 bit)

Enumeration: FILTSELSelect

0x0 : DISABLE

Filter disabled

0x1 : SYNCH

Synchronizer enabled

0x2 : FILTER

Filter enabled

End of enumeration elements list.

EDGESEL : Edge Selection
bits : 7 - 7 (1 bit)

INSEL0 : Input Selection 0
bits : 8 - 11 (4 bit)

Enumeration: INSEL0Select

0x0 : MASK

Masked input

0x1 : FEEDBACK

Feedback input source

0x2 : LINK

Linked LUT input source

0x3 : EVENT

Event in put source

0x4 : IO

I/O pin input source

0x5 : AC

AC input source

0x6 : TC

TC input source

0x7 : ALTTC

Alternate TC input source

0x8 : TCC

TCC input source

0x9 : SERCOM

SERCOM inout source

End of enumeration elements list.

INSEL1 : Input Selection 1
bits : 12 - 15 (4 bit)

INSEL2 : Input Selection 2
bits : 16 - 19 (4 bit)

INVEI : Input Event Invert
bits : 20 - 20 (1 bit)

LUTEI : Event Input Enable
bits : 21 - 21 (1 bit)

LUTEO : Event Output Enable
bits : 22 - 22 (1 bit)

TRUTH : Truth Value
bits : 24 - 31 (8 bit)


LUTCTRL1

LUT Control x
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LUTCTRL1 LUTCTRL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENABLE FILTSEL EDGESEL INSEL0 INSEL1 INSEL2 INVEI LUTEI LUTEO TRUTH

ENABLE : LUT Enable
bits : 1 - 1 (1 bit)

FILTSEL : Filter Selection
bits : 4 - 5 (2 bit)

Enumeration: FILTSELSelect

0x0 : DISABLE

Filter disabled

0x1 : SYNCH

Synchronizer enabled

0x2 : FILTER

Filter enabled

End of enumeration elements list.

EDGESEL : Edge Selection
bits : 7 - 7 (1 bit)

INSEL0 : Input Selection 0
bits : 8 - 11 (4 bit)

Enumeration: INSEL0Select

0x0 : MASK

Masked input

0x1 : FEEDBACK

Feedback input source

0x2 : LINK

Linked LUT input source

0x3 : EVENT

Event in put source

0x4 : IO

I/O pin input source

0x5 : AC

AC input source

0x6 : TC

TC input source

0x7 : ALTTC

Alternate TC input source

0x8 : TCC

TCC input source

0x9 : SERCOM

SERCOM inout source

End of enumeration elements list.

INSEL1 : Input Selection 1
bits : 12 - 15 (4 bit)

INSEL2 : Input Selection 2
bits : 16 - 19 (4 bit)

INVEI : Input Event Invert
bits : 20 - 20 (1 bit)

LUTEI : Event Input Enable
bits : 21 - 21 (1 bit)

LUTEO : Event Output Enable
bits : 22 - 22 (1 bit)

TRUTH : Truth Value
bits : 24 - 31 (8 bit)


LUTCTRL2

LUT Control x
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LUTCTRL2 LUTCTRL2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENABLE FILTSEL EDGESEL INSEL0 INSEL1 INSEL2 INVEI LUTEI LUTEO TRUTH

ENABLE : LUT Enable
bits : 1 - 1 (1 bit)

FILTSEL : Filter Selection
bits : 4 - 5 (2 bit)

Enumeration: FILTSELSelect

0x0 : DISABLE

Filter disabled

0x1 : SYNCH

Synchronizer enabled

0x2 : FILTER

Filter enabled

End of enumeration elements list.

EDGESEL : Edge Selection
bits : 7 - 7 (1 bit)

INSEL0 : Input Selection 0
bits : 8 - 11 (4 bit)

Enumeration: INSEL0Select

0x0 : MASK

Masked input

0x1 : FEEDBACK

Feedback input source

0x2 : LINK

Linked LUT input source

0x3 : EVENT

Event in put source

0x4 : IO

I/O pin input source

0x5 : AC

AC input source

0x6 : TC

TC input source

0x7 : ALTTC

Alternate TC input source

0x8 : TCC

TCC input source

0x9 : SERCOM

SERCOM inout source

End of enumeration elements list.

INSEL1 : Input Selection 1
bits : 12 - 15 (4 bit)

INSEL2 : Input Selection 2
bits : 16 - 19 (4 bit)

INVEI : Input Event Invert
bits : 20 - 20 (1 bit)

LUTEI : Event Input Enable
bits : 21 - 21 (1 bit)

LUTEO : Event Output Enable
bits : 22 - 22 (1 bit)

TRUTH : Truth Value
bits : 24 - 31 (8 bit)


LUTCTRL3

LUT Control x
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LUTCTRL3 LUTCTRL3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENABLE FILTSEL EDGESEL INSEL0 INSEL1 INSEL2 INVEI LUTEI LUTEO TRUTH

ENABLE : LUT Enable
bits : 1 - 1 (1 bit)

FILTSEL : Filter Selection
bits : 4 - 5 (2 bit)

Enumeration: FILTSELSelect

0x0 : DISABLE

Filter disabled

0x1 : SYNCH

Synchronizer enabled

0x2 : FILTER

Filter enabled

End of enumeration elements list.

EDGESEL : Edge Selection
bits : 7 - 7 (1 bit)

INSEL0 : Input Selection 0
bits : 8 - 11 (4 bit)

Enumeration: INSEL0Select

0x0 : MASK

Masked input

0x1 : FEEDBACK

Feedback input source

0x2 : LINK

Linked LUT input source

0x3 : EVENT

Event in put source

0x4 : IO

I/O pin input source

0x5 : AC

AC input source

0x6 : TC

TC input source

0x7 : ALTTC

Alternate TC input source

0x8 : TCC

TCC input source

0x9 : SERCOM

SERCOM inout source

End of enumeration elements list.

INSEL1 : Input Selection 1
bits : 12 - 15 (4 bit)

INSEL2 : Input Selection 2
bits : 16 - 19 (4 bit)

INVEI : Input Event Invert
bits : 20 - 20 (1 bit)

LUTEI : Event Input Enable
bits : 21 - 21 (1 bit)

LUTEO : Event Output Enable
bits : 22 - 22 (1 bit)

TRUTH : Truth Value
bits : 24 - 31 (8 bit)


SEQCTRL0

SEQ Control x
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SEQCTRL0 SEQCTRL0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SEQSEL

SEQSEL : Sequential Selection
bits : 0 - 3 (4 bit)

Enumeration: SEQSELSelect

0x0 : DISABLE

Sequential logic is disabled

0x1 : DFF

D flip flop

0x2 : JK

JK flip flop

0x3 : LATCH

D latch

0x4 : RS

RS latch

End of enumeration elements list.


SEQCTRL1

SEQ Control x
address_offset : 0xD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SEQCTRL1 SEQCTRL1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SEQSEL

SEQSEL : Sequential Selection
bits : 0 - 3 (4 bit)

Enumeration: SEQSELSelect

0x0 : DISABLE

Sequential logic is disabled

0x1 : DFF

D flip flop

0x2 : JK

JK flip flop

0x3 : LATCH

D latch

0x4 : RS

RS latch

End of enumeration elements list.



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