Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x100 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x0 Bytes (0x0)
size : 0xA0 byte (0x0)
mem_usage : registers
protection :
32-bit Counter with Single 32-bit Compare - - MODE0 Control A
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWRST : Software Reset
bits : 0 - 0 (1 bit)
access : write-only
ENABLE : Enable
bits : 1 - 1 (1 bit)
MODE : Operating Mode
bits : 2 - 3 (2 bit)
Enumeration: MODESelect
0x0 : COUNT32
Mode 0: 32-bit Counter
0x1 : COUNT16
Mode 1: 16-bit Counter
0x2 : CLOCK
Mode 2: Clock/Calendar
End of enumeration elements list.
MATCHCLR : Clear on Match
bits : 7 - 7 (1 bit)
PRESCALER : Prescaler
bits : 8 - 11 (4 bit)
Enumeration: PRESCALERSelect
0x0 : OFF
CLK_RTC_CNT = GCLK_RTC/1
0x1 : DIV1
CLK_RTC_CNT = GCLK_RTC/1
0x2 : DIV2
CLK_RTC_CNT = GCLK_RTC/2
0x3 : DIV4
CLK_RTC_CNT = GCLK_RTC/4
0x4 : DIV8
CLK_RTC_CNT = GCLK_RTC/8
0x5 : DIV16
CLK_RTC_CNT = GCLK_RTC/16
0x6 : DIV32
CLK_RTC_CNT = GCLK_RTC/32
0x7 : DIV64
CLK_RTC_CNT = GCLK_RTC/64
0x8 : DIV128
CLK_RTC_CNT = GCLK_RTC/128
0x9 : DIV256
CLK_RTC_CNT = GCLK_RTC/256
0xa : DIV512
CLK_RTC_CNT = GCLK_RTC/512
0xb : DIV1024
CLK_RTC_CNT = GCLK_RTC/1024
End of enumeration elements list.
BKTRST : BKUP Registers Reset On Tamper Enable
bits : 13 - 13 (1 bit)
GPTRST : GP Registers Reset On Tamper Enable
bits : 14 - 14 (1 bit)
COUNTSYNC : Count Read Synchronization Enable
bits : 15 - 15 (1 bit)
16-bit Counter with Two 16-bit Compares - - MODE1 Control A
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWRST : Software Reset
bits : 0 - 0 (1 bit)
access : write-only
ENABLE : Enable
bits : 1 - 1 (1 bit)
MODE : Operating Mode
bits : 2 - 3 (2 bit)
Enumeration: MODESelect
0x0 : COUNT32
Mode 0: 32-bit Counter
0x1 : COUNT16
Mode 1: 16-bit Counter
0x2 : CLOCK
Mode 2: Clock/Calendar
End of enumeration elements list.
PRESCALER : Prescaler
bits : 8 - 11 (4 bit)
Enumeration: PRESCALERSelect
0x0 : OFF
CLK_RTC_CNT = GCLK_RTC/1
0x1 : DIV1
CLK_RTC_CNT = GCLK_RTC/1
0x2 : DIV2
CLK_RTC_CNT = GCLK_RTC/2
0x3 : DIV4
CLK_RTC_CNT = GCLK_RTC/4
0x4 : DIV8
CLK_RTC_CNT = GCLK_RTC/8
0x5 : DIV16
CLK_RTC_CNT = GCLK_RTC/16
0x6 : DIV32
CLK_RTC_CNT = GCLK_RTC/32
0x7 : DIV64
CLK_RTC_CNT = GCLK_RTC/64
0x8 : DIV128
CLK_RTC_CNT = GCLK_RTC/128
0x9 : DIV256
CLK_RTC_CNT = GCLK_RTC/256
0xa : DIV512
CLK_RTC_CNT = GCLK_RTC/512
0xb : DIV1024
CLK_RTC_CNT = GCLK_RTC/1024
End of enumeration elements list.
BKTRST : BKUP Registers Reset On Tamper Enable
bits : 13 - 13 (1 bit)
GPTRST : GP Registers Reset On Tamper Enable
bits : 14 - 14 (1 bit)
COUNTSYNC : Count Read Synchronization Enable
bits : 15 - 15 (1 bit)
Clock/Calendar with Alarm - - MODE2 Control A
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWRST : Software Reset
bits : 0 - 0 (1 bit)
access : write-only
ENABLE : Enable
bits : 1 - 1 (1 bit)
MODE : Operating Mode
bits : 2 - 3 (2 bit)
Enumeration: MODESelect
0x0 : COUNT32
Mode 0: 32-bit Counter
0x1 : COUNT16
Mode 1: 16-bit Counter
0x2 : CLOCK
Mode 2: Clock/Calendar
End of enumeration elements list.
CLKREP : Clock Representation
bits : 6 - 6 (1 bit)
MATCHCLR : Clear on Match
bits : 7 - 7 (1 bit)
PRESCALER : Prescaler
bits : 8 - 11 (4 bit)
Enumeration: PRESCALERSelect
0x0 : OFF
CLK_RTC_CNT = GCLK_RTC/1
0x1 : DIV1
CLK_RTC_CNT = GCLK_RTC/1
0x2 : DIV2
CLK_RTC_CNT = GCLK_RTC/2
0x3 : DIV4
CLK_RTC_CNT = GCLK_RTC/4
0x4 : DIV8
CLK_RTC_CNT = GCLK_RTC/8
0x5 : DIV16
CLK_RTC_CNT = GCLK_RTC/16
0x6 : DIV32
CLK_RTC_CNT = GCLK_RTC/32
0x7 : DIV64
CLK_RTC_CNT = GCLK_RTC/64
0x8 : DIV128
CLK_RTC_CNT = GCLK_RTC/128
0x9 : DIV256
CLK_RTC_CNT = GCLK_RTC/256
0xa : DIV512
CLK_RTC_CNT = GCLK_RTC/512
0xb : DIV1024
CLK_RTC_CNT = GCLK_RTC/1024
End of enumeration elements list.
BKTRST : BKUP Registers Reset On Tamper Enable
bits : 13 - 13 (1 bit)
GPTRST : GP Registers Reset On Tamper Enable
bits : 14 - 14 (1 bit)
CLOCKSYNC : Clock Read Synchronization Enable
bits : 15 - 15 (1 bit)
MODE2 Control A
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWRST : Software Reset
bits : 0 - 0 (1 bit)
access : write-only
ENABLE : Enable
bits : 1 - 1 (1 bit)
MODE : Operating Mode
bits : 2 - 3 (2 bit)
Enumeration: MODESelect
0 : COUNT32
Mode 0: 32-bit Counter
1 : COUNT16
Mode 1: 16-bit Counter
2 : CLOCK
Mode 2: Clock/Calendar
End of enumeration elements list.
CLKREP : Clock Representation
bits : 6 - 6 (1 bit)
MATCHCLR : Clear on Match
bits : 7 - 7 (1 bit)
PRESCALER : Prescaler
bits : 8 - 11 (4 bit)
Enumeration: PRESCALERSelect
0x0 : OFF
CLK_RTC_CNT = GCLK_RTC/1
0x1 : DIV1
CLK_RTC_CNT = GCLK_RTC/1
0x2 : DIV2
CLK_RTC_CNT = GCLK_RTC/2
0x3 : DIV4
CLK_RTC_CNT = GCLK_RTC/4
0x4 : DIV8
CLK_RTC_CNT = GCLK_RTC/8
0x5 : DIV16
CLK_RTC_CNT = GCLK_RTC/16
0x6 : DIV32
CLK_RTC_CNT = GCLK_RTC/32
0x7 : DIV64
CLK_RTC_CNT = GCLK_RTC/64
0x8 : DIV128
CLK_RTC_CNT = GCLK_RTC/128
0x9 : DIV256
CLK_RTC_CNT = GCLK_RTC/256
0xA : DIV512
CLK_RTC_CNT = GCLK_RTC/512
0xB : DIV1024
CLK_RTC_CNT = GCLK_RTC/1024
End of enumeration elements list.
BKTRST : BKUP Registers Reset On Tamper Enable
bits : 13 - 13 (1 bit)
GPTRST : GP Registers Reset On Tamper Enable
bits : 14 - 14 (1 bit)
COUNTSYNC : Count Read Synchronization Enable
bits : 15 - 15 (1 bit)
CLOCKSYNC : Clock Read Synchronization Enable
bits : 15 - 15 (1 bit)
32-bit Counter with Single 32-bit Compare - - MODE0 Synchronization Busy Status
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SWRST : Software Reset Busy
bits : 0 - 0 (1 bit)
access : read-only
ENABLE : Enable Bit Busy
bits : 1 - 1 (1 bit)
access : read-only
FREQCORR : FREQCORR Register Busy
bits : 2 - 2 (1 bit)
access : read-only
COUNT : COUNT Register Busy
bits : 3 - 3 (1 bit)
access : read-only
COMP0 : COMP 0 Register Busy
bits : 5 - 5 (1 bit)
access : read-only
COUNTSYNC : Count Synchronization Enable Bit Busy
bits : 15 - 15 (1 bit)
access : read-only
GP0 : General Purpose 0 Register Busy
bits : 16 - 16 (1 bit)
access : read-only
GP1 : General Purpose 1 Register Busy
bits : 17 - 17 (1 bit)
access : read-only
16-bit Counter with Two 16-bit Compares - - MODE1 Synchronization Busy Status
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SWRST : Software Reset Bit Busy
bits : 0 - 0 (1 bit)
access : read-only
ENABLE : Enable Bit Busy
bits : 1 - 1 (1 bit)
access : read-only
FREQCORR : FREQCORR Register Busy
bits : 2 - 2 (1 bit)
access : read-only
COUNT : COUNT Register Busy
bits : 3 - 3 (1 bit)
access : read-only
PER : PER Register Busy
bits : 4 - 4 (1 bit)
access : read-only
COMP0 : COMP 0 Register Busy
bits : 5 - 5 (1 bit)
access : read-only
COMP1 : COMP 1 Register Busy
bits : 6 - 6 (1 bit)
access : read-only
COUNTSYNC : Count Synchronization Enable Bit Busy
bits : 15 - 15 (1 bit)
access : read-only
GP0 : General Purpose 0 Register Busy
bits : 16 - 16 (1 bit)
access : read-only
GP1 : General Purpose 1 Register Busy
bits : 17 - 17 (1 bit)
access : read-only
Clock/Calendar with Alarm - - MODE2 Synchronization Busy Status
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SWRST : Software Reset Bit Busy
bits : 0 - 0 (1 bit)
access : read-only
ENABLE : Enable Bit Busy
bits : 1 - 1 (1 bit)
access : read-only
FREQCORR : FREQCORR Register Busy
bits : 2 - 2 (1 bit)
access : read-only
CLOCK : CLOCK Register Busy
bits : 3 - 3 (1 bit)
access : read-only
ALARM0 : ALARM 0 Register Busy
bits : 5 - 5 (1 bit)
access : read-only
MASK0 : MASK 0 Register Busy
bits : 11 - 11 (1 bit)
access : read-only
CLOCKSYNC : Clock Synchronization Enable Bit Busy
bits : 15 - 15 (1 bit)
access : read-only
GP0 : General Purpose 0 Register Busy
bits : 16 - 16 (1 bit)
access : read-only
GP1 : General Purpose 1 Register Busy
bits : 17 - 17 (1 bit)
access : read-only
MODE2 Synchronization Busy Status
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SWRST : Software Reset Bit Busy
bits : 0 - 0 (1 bit)
access : read-only
ENABLE : Enable Bit Busy
bits : 1 - 1 (1 bit)
access : read-only
FREQCORR : FREQCORR Register Busy
bits : 2 - 2 (1 bit)
access : read-only
COUNT : COUNT Register Busy
bits : 3 - 3 (1 bit)
access : read-only
CLOCK : CLOCK Register Busy
bits : 3 - 3 (1 bit)
access : read-only
PER : PER Register Busy
bits : 4 - 4 (1 bit)
access : read-only
COMP0 : COMP 0 Register Busy
bits : 5 - 5 (1 bit)
access : read-only
ALARM0 : ALARM 0 Register Busy
bits : 5 - 5 (1 bit)
access : read-only
COMP1 : COMP 1 Register Busy
bits : 6 - 6 (1 bit)
access : read-only
MASK0 : MASK 0 Register Busy
bits : 11 - 11 (1 bit)
access : read-only
COUNTSYNC : Count Synchronization Enable Bit Busy
bits : 15 - 15 (1 bit)
access : read-only
CLOCKSYNC : Clock Synchronization Enable Bit Busy
bits : 15 - 15 (1 bit)
access : read-only
GP0 : General Purpose 0 Register Busy
bits : 16 - 16 (1 bit)
access : read-only
GP1 : General Purpose 1 Register Busy
bits : 17 - 17 (1 bit)
access : read-only
32-bit Counter with Single 32-bit Compare - - Backup
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
16-bit Counter with Two 16-bit Compares - - Backup
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
Clock/Calendar with Alarm - - Backup
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
32-bit Counter with Single 32-bit Compare - - Frequency Correction
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Correction Value
bits : 0 - 6 (7 bit)
SIGN : Correction Sign
bits : 7 - 7 (1 bit)
16-bit Counter with Two 16-bit Compares - - Frequency Correction
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Correction Value
bits : 0 - 6 (7 bit)
SIGN : Correction Sign
bits : 7 - 7 (1 bit)
Clock/Calendar with Alarm - - Frequency Correction
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Correction Value
bits : 0 - 6 (7 bit)
SIGN : Correction Sign
bits : 7 - 7 (1 bit)
Frequency Correction
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Correction Value
bits : 0 - 6 (7 bit)
SIGN : Correction Sign
bits : 7 - 7 (1 bit)
32-bit Counter with Single 32-bit Compare - - MODE0 Counter Value
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COUNT : Counter Value
bits : 0 - 31 (32 bit)
16-bit Counter with Two 16-bit Compares - - MODE1 Counter Value
address_offset : 0x18 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COUNT : Counter Value
bits : 0 - 15 (16 bit)
Clock/Calendar with Alarm - - MODE2 Clock Value
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECOND : Second
bits : 0 - 5 (6 bit)
MINUTE : Minute
bits : 6 - 11 (6 bit)
HOUR : Hour
bits : 12 - 16 (5 bit)
DAY : Day
bits : 17 - 21 (5 bit)
MONTH : Month
bits : 22 - 25 (4 bit)
YEAR : Year
bits : 26 - 31 (6 bit)
MODE1 Counter Value
address_offset : 0x18 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COUNT : Counter Value
bits : 0 - 15 (16 bit)
MODE2 Clock Value
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECOND : Second
bits : 0 - 5 (6 bit)
MINUTE : Minute
bits : 6 - 11 (6 bit)
HOUR : Hour
bits : 12 - 16 (5 bit)
Enumeration: HOURSelect
0x00 : AM
AM when CLKREP in 12-hour
0x10 : PM
PM when CLKREP in 12-hour
End of enumeration elements list.
DAY : Day
bits : 17 - 21 (5 bit)
MONTH : Month
bits : 22 - 25 (4 bit)
YEAR : Year
bits : 26 - 31 (6 bit)
32-bit Counter with Single 32-bit Compare - - Backup
address_offset : 0x184 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
16-bit Counter with Two 16-bit Compares - - Backup
address_offset : 0x184 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
Clock/Calendar with Alarm - - Backup
address_offset : 0x184 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
16-bit Counter with Two 16-bit Compares - - MODE1 Counter Period
address_offset : 0x1C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PER : Counter Period
bits : 0 - 15 (16 bit)
MODE1 Counter Period
address_offset : 0x1C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PER : Counter Period
bits : 0 - 15 (16 bit)
32-bit Counter with Single 32-bit Compare - - MODE0 Control B
address_offset : 0x2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GP0EN : General Purpose 0 Enable
bits : 0 - 0 (1 bit)
DEBMAJ : Debouncer Majority Enable
bits : 4 - 4 (1 bit)
DEBASYNC : Debouncer Asynchronous Enable
bits : 5 - 5 (1 bit)
RTCOUT : RTC Output Enable
bits : 6 - 6 (1 bit)
DMAEN : DMA Enable
bits : 7 - 7 (1 bit)
DEBF : Debounce Freqnuency
bits : 8 - 10 (3 bit)
Enumeration: DEBFSelect
0x0 : DIV2
CLK_RTC_DEB = CLK_RTC/2
0x1 : DIV4
CLK_RTC_DEB = CLK_RTC/4
0x2 : DIV8
CLK_RTC_DEB = CLK_RTC/8
0x3 : DIV16
CLK_RTC_DEB = CLK_RTC/16
0x4 : DIV32
CLK_RTC_DEB = CLK_RTC/32
0x5 : DIV64
CLK_RTC_DEB = CLK_RTC/64
0x6 : DIV128
CLK_RTC_DEB = CLK_RTC/128
0x7 : DIV256
CLK_RTC_DEB = CLK_RTC/256
End of enumeration elements list.
ACTF : Active Layer Freqnuency
bits : 12 - 14 (3 bit)
Enumeration: ACTFSelect
0x0 : DIV2
CLK_RTC_OUT = CLK_RTC/2
0x1 : DIV4
CLK_RTC_OUT = CLK_RTC/4
0x2 : DIV8
CLK_RTC_OUT = CLK_RTC/8
0x3 : DIV16
CLK_RTC_OUT = CLK_RTC/16
0x4 : DIV32
CLK_RTC_OUT = CLK_RTC/32
0x5 : DIV64
CLK_RTC_OUT = CLK_RTC/64
0x6 : DIV128
CLK_RTC_OUT = CLK_RTC/128
0x7 : DIV256
CLK_RTC_OUT = CLK_RTC/256
End of enumeration elements list.
16-bit Counter with Two 16-bit Compares - - MODE1 Control B
address_offset : 0x2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GP0EN : General Purpose 0 Enable
bits : 0 - 0 (1 bit)
DEBMAJ : Debouncer Majority Enable
bits : 4 - 4 (1 bit)
DEBASYNC : Debouncer Asynchronous Enable
bits : 5 - 5 (1 bit)
RTCOUT : RTC Output Enable
bits : 6 - 6 (1 bit)
DMAEN : DMA Enable
bits : 7 - 7 (1 bit)
DEBF : Debounce Freqnuency
bits : 8 - 10 (3 bit)
Enumeration: DEBFSelect
0x0 : DIV2
CLK_RTC_DEB = CLK_RTC/2
0x1 : DIV4
CLK_RTC_DEB = CLK_RTC/4
0x2 : DIV8
CLK_RTC_DEB = CLK_RTC/8
0x3 : DIV16
CLK_RTC_DEB = CLK_RTC/16
0x4 : DIV32
CLK_RTC_DEB = CLK_RTC/32
0x5 : DIV64
CLK_RTC_DEB = CLK_RTC/64
0x6 : DIV128
CLK_RTC_DEB = CLK_RTC/128
0x7 : DIV256
CLK_RTC_DEB = CLK_RTC/256
End of enumeration elements list.
ACTF : Active Layer Freqnuency
bits : 12 - 14 (3 bit)
Enumeration: ACTFSelect
0x0 : DIV2
CLK_RTC_OUT = CLK_RTC/2
0x1 : DIV4
CLK_RTC_OUT = CLK_RTC/4
0x2 : DIV8
CLK_RTC_OUT = CLK_RTC/8
0x3 : DIV16
CLK_RTC_OUT = CLK_RTC/16
0x4 : DIV32
CLK_RTC_OUT = CLK_RTC/32
0x5 : DIV64
CLK_RTC_OUT = CLK_RTC/64
0x6 : DIV128
CLK_RTC_OUT = CLK_RTC/128
0x7 : DIV256
CLK_RTC_OUT = CLK_RTC/256
End of enumeration elements list.
Clock/Calendar with Alarm - - MODE2 Control B
address_offset : 0x2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GP0EN : General Purpose 0 Enable
bits : 0 - 0 (1 bit)
DEBMAJ : Debouncer Majority Enable
bits : 4 - 4 (1 bit)
DEBASYNC : Debouncer Asynchronous Enable
bits : 5 - 5 (1 bit)
RTCOUT : RTC Output Enable
bits : 6 - 6 (1 bit)
DMAEN : DMA Enable
bits : 7 - 7 (1 bit)
DEBF : Debounce Freqnuency
bits : 8 - 10 (3 bit)
Enumeration: DEBFSelect
0x0 : DIV2
CLK_RTC_DEB = CLK_RTC/2
0x1 : DIV4
CLK_RTC_DEB = CLK_RTC/4
0x2 : DIV8
CLK_RTC_DEB = CLK_RTC/8
0x3 : DIV16
CLK_RTC_DEB = CLK_RTC/16
0x4 : DIV32
CLK_RTC_DEB = CLK_RTC/32
0x5 : DIV64
CLK_RTC_DEB = CLK_RTC/64
0x6 : DIV128
CLK_RTC_DEB = CLK_RTC/128
0x7 : DIV256
CLK_RTC_DEB = CLK_RTC/256
End of enumeration elements list.
ACTF : Active Layer Freqnuency
bits : 12 - 14 (3 bit)
Enumeration: ACTFSelect
0x0 : DIV2
CLK_RTC_OUT = CLK_RTC/2
0x1 : DIV4
CLK_RTC_OUT = CLK_RTC/4
0x2 : DIV8
CLK_RTC_OUT = CLK_RTC/8
0x3 : DIV16
CLK_RTC_OUT = CLK_RTC/16
0x4 : DIV32
CLK_RTC_OUT = CLK_RTC/32
0x5 : DIV64
CLK_RTC_OUT = CLK_RTC/64
0x6 : DIV128
CLK_RTC_OUT = CLK_RTC/128
0x7 : DIV256
CLK_RTC_OUT = CLK_RTC/256
End of enumeration elements list.
MODE2 Control B
address_offset : 0x2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GP0EN : General Purpose 0 Enable
bits : 0 - 0 (1 bit)
DEBMAJ : Debouncer Majority Enable
bits : 4 - 4 (1 bit)
DEBASYNC : Debouncer Asynchronous Enable
bits : 5 - 5 (1 bit)
RTCOUT : RTC Output Enable
bits : 6 - 6 (1 bit)
DMAEN : DMA Enable
bits : 7 - 7 (1 bit)
DEBF : Debounce Freqnuency
bits : 8 - 10 (3 bit)
Enumeration: DEBFSelect
0x0 : DIV2
CLK_RTC_DEB = CLK_RTC/2
0x1 : DIV4
CLK_RTC_DEB = CLK_RTC/4
0x2 : DIV8
CLK_RTC_DEB = CLK_RTC/8
0x3 : DIV16
CLK_RTC_DEB = CLK_RTC/16
0x4 : DIV32
CLK_RTC_DEB = CLK_RTC/32
0x5 : DIV64
CLK_RTC_DEB = CLK_RTC/64
0x6 : DIV128
CLK_RTC_DEB = CLK_RTC/128
0x7 : DIV256
CLK_RTC_DEB = CLK_RTC/256
End of enumeration elements list.
ACTF : Active Layer Freqnuency
bits : 12 - 14 (3 bit)
Enumeration: ACTFSelect
0x0 : DIV2
CLK_RTC_OUT = CLK_RTC/2
0x1 : DIV4
CLK_RTC_OUT = CLK_RTC/4
0x2 : DIV8
CLK_RTC_OUT = CLK_RTC/8
0x3 : DIV16
CLK_RTC_OUT = CLK_RTC/16
0x4 : DIV32
CLK_RTC_OUT = CLK_RTC/32
0x5 : DIV64
CLK_RTC_OUT = CLK_RTC/64
0x6 : DIV128
CLK_RTC_OUT = CLK_RTC/128
0x7 : DIV256
CLK_RTC_OUT = CLK_RTC/256
End of enumeration elements list.
MODE1 Compare n Value
address_offset : 0x20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMP : Compare Value
bits : 0 - 15 (16 bit)
MODE2 Alarm n Value
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECOND : Second
bits : 0 - 5 (6 bit)
MINUTE : Minute
bits : 6 - 11 (6 bit)
HOUR : Hour
bits : 12 - 16 (5 bit)
DAY : Day
bits : 17 - 21 (5 bit)
MONTH : Month
bits : 22 - 25 (4 bit)
YEAR : Year
bits : 26 - 31 (6 bit)
MODE0 Compare n Value
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMP : Compare Value
bits : 0 - 31 (32 bit)
MODE2_ALARM Alarm n Value
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECOND : Second
bits : 0 - 5 (6 bit)
MINUTE : Minute
bits : 6 - 11 (6 bit)
HOUR : Hour
bits : 12 - 16 (5 bit)
Enumeration: HOURSelect
0x00 : AM
Morning hour
0x10 : PM
Afternoon hour
End of enumeration elements list.
DAY : Day
bits : 17 - 21 (5 bit)
MONTH : Month
bits : 22 - 25 (4 bit)
YEAR : Year
bits : 26 - 31 (6 bit)
32-bit Counter with Single 32-bit Compare - - Backup
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
16-bit Counter with Two 16-bit Compares - - Backup
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
Clock/Calendar with Alarm - - Backup
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
MODE1 Compare n Value
address_offset : 0x22 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMP : Compare Value
bits : 0 - 15 (16 bit)
MODE2 Alarm n Mask
address_offset : 0x24 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEL : Alarm Mask Selection
bits : 0 - 2 (3 bit)
Enumeration: SELSelect
0x0 : OFF
Alarm Disabled
0x1 : SS
Match seconds only
0x2 : MMSS
Match seconds and minutes only
0x3 : HHMMSS
Match seconds, minutes, and hours only
0x4 : DDHHMMSS
Match seconds, minutes, hours, and days only
0x5 : MMDDHHMMSS
Match seconds, minutes, hours, days, and months only
0x6 : YYMMDDHHMMSS
Match seconds, minutes, hours, days, months, and years
End of enumeration elements list.
MODE2_ALARM Alarm n Mask
address_offset : 0x24 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEL : Alarm Mask Selection
bits : 0 - 2 (3 bit)
Enumeration: SELSelect
0x0 : OFF
Alarm Disabled
0x1 : SS
Match seconds only
0x2 : MMSS
Match seconds and minutes only
0x3 : HHMMSS
Match seconds, minutes, and hours only
0x4 : DDHHMMSS
Match seconds, minutes, hours, and days only
0x5 : MMDDHHMMSS
Match seconds, minutes, hours, days, and months only
0x6 : YYMMDDHHMMSS
Match seconds, minutes, hours, days, months, and years
End of enumeration elements list.
32-bit Counter with Single 32-bit Compare - - Backup
address_offset : 0x298 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
16-bit Counter with Two 16-bit Compares - - Backup
address_offset : 0x298 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
Clock/Calendar with Alarm - - Backup
address_offset : 0x298 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
32-bit Counter with Single 32-bit Compare - - Backup
address_offset : 0x328 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
16-bit Counter with Two 16-bit Compares - - Backup
address_offset : 0x328 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
Clock/Calendar with Alarm - - Backup
address_offset : 0x328 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
32-bit Counter with Single 32-bit Compare - - Backup
address_offset : 0x3BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
16-bit Counter with Two 16-bit Compares - - Backup
address_offset : 0x3BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
Clock/Calendar with Alarm - - Backup
address_offset : 0x3BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
32-bit Counter with Single 32-bit Compare - - MODE0 Event Control
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PEREO0 : Periodic Interval 0 Event Output Enable
bits : 0 - 0 (1 bit)
PEREO1 : Periodic Interval 1 Event Output Enable
bits : 1 - 1 (1 bit)
PEREO2 : Periodic Interval 2 Event Output Enable
bits : 2 - 2 (1 bit)
PEREO3 : Periodic Interval 3 Event Output Enable
bits : 3 - 3 (1 bit)
PEREO4 : Periodic Interval 4 Event Output Enable
bits : 4 - 4 (1 bit)
PEREO5 : Periodic Interval 5 Event Output Enable
bits : 5 - 5 (1 bit)
PEREO6 : Periodic Interval 6 Event Output Enable
bits : 6 - 6 (1 bit)
PEREO7 : Periodic Interval 7 Event Output Enable
bits : 7 - 7 (1 bit)
CMPEO0 : Compare 0 Event Output Enable
bits : 8 - 8 (1 bit)
TAMPEREO : Tamper Event Output Enable
bits : 14 - 14 (1 bit)
OVFEO : Overflow Event Output Enable
bits : 15 - 15 (1 bit)
TAMPEVEI : Tamper Event Input Enable
bits : 16 - 16 (1 bit)
16-bit Counter with Two 16-bit Compares - - MODE1 Event Control
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PEREO0 : Periodic Interval 0 Event Output Enable
bits : 0 - 0 (1 bit)
PEREO1 : Periodic Interval 1 Event Output Enable
bits : 1 - 1 (1 bit)
PEREO2 : Periodic Interval 2 Event Output Enable
bits : 2 - 2 (1 bit)
PEREO3 : Periodic Interval 3 Event Output Enable
bits : 3 - 3 (1 bit)
PEREO4 : Periodic Interval 4 Event Output Enable
bits : 4 - 4 (1 bit)
PEREO5 : Periodic Interval 5 Event Output Enable
bits : 5 - 5 (1 bit)
PEREO6 : Periodic Interval 6 Event Output Enable
bits : 6 - 6 (1 bit)
PEREO7 : Periodic Interval 7 Event Output Enable
bits : 7 - 7 (1 bit)
CMPEO0 : Compare 0 Event Output Enable
bits : 8 - 8 (1 bit)
CMPEO1 : Compare 1 Event Output Enable
bits : 9 - 9 (1 bit)
TAMPEREO : Tamper Event Output Enable
bits : 14 - 14 (1 bit)
OVFEO : Overflow Event Output Enable
bits : 15 - 15 (1 bit)
TAMPEVEI : Tamper Event Input Enable
bits : 16 - 16 (1 bit)
Clock/Calendar with Alarm - - MODE2 Event Control
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PEREO0 : Periodic Interval 0 Event Output Enable
bits : 0 - 0 (1 bit)
PEREO1 : Periodic Interval 1 Event Output Enable
bits : 1 - 1 (1 bit)
PEREO2 : Periodic Interval 2 Event Output Enable
bits : 2 - 2 (1 bit)
PEREO3 : Periodic Interval 3 Event Output Enable
bits : 3 - 3 (1 bit)
PEREO4 : Periodic Interval 4 Event Output Enable
bits : 4 - 4 (1 bit)
PEREO5 : Periodic Interval 5 Event Output Enable
bits : 5 - 5 (1 bit)
PEREO6 : Periodic Interval 6 Event Output Enable
bits : 6 - 6 (1 bit)
PEREO7 : Periodic Interval 7 Event Output Enable
bits : 7 - 7 (1 bit)
ALARMEO0 : Alarm 0 Event Output Enable
bits : 8 - 8 (1 bit)
TAMPEREO : Tamper Event Output Enable
bits : 14 - 14 (1 bit)
OVFEO : Overflow Event Output Enable
bits : 15 - 15 (1 bit)
TAMPEVEI : Tamper Event Input Enable
bits : 16 - 16 (1 bit)
MODE2 Event Control
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PEREO0 : Periodic Interval 0 Event Output Enable
bits : 0 - 0 (1 bit)
PEREO1 : Periodic Interval 1 Event Output Enable
bits : 1 - 1 (1 bit)
PEREO2 : Periodic Interval 2 Event Output Enable
bits : 2 - 2 (1 bit)
PEREO3 : Periodic Interval 3 Event Output Enable
bits : 3 - 3 (1 bit)
PEREO4 : Periodic Interval 4 Event Output Enable
bits : 4 - 4 (1 bit)
PEREO5 : Periodic Interval 5 Event Output Enable
bits : 5 - 5 (1 bit)
PEREO6 : Periodic Interval 6 Event Output Enable
bits : 6 - 6 (1 bit)
PEREO7 : Periodic Interval 7 Event Output Enable
bits : 7 - 7 (1 bit)
CMPEO0 : Compare 0 Event Output Enable
bits : 8 - 8 (1 bit)
ALARMEO0 : Alarm 0 Event Output Enable
bits : 8 - 8 (1 bit)
CMPEO1 : Compare 1 Event Output Enable
bits : 9 - 9 (1 bit)
TAMPEREO : Tamper Event Output Enable
bits : 14 - 14 (1 bit)
OVFEO : Overflow Event Output Enable
bits : 15 - 15 (1 bit)
TAMPEVEI : Tamper Event Input Enable
bits : 16 - 16 (1 bit)
32-bit Counter with Single 32-bit Compare - - MODE0 Compare n Value
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMP : Compare Value
bits : 0 - 31 (32 bit)
16-bit Counter with Two 16-bit Compares - - MODE1 Compare n Value
address_offset : 0x40 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMP : Compare Value
bits : 0 - 15 (16 bit)
Clock/Calendar with Alarm - - MODE2 Alarm n Value
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECOND : Second
bits : 0 - 5 (6 bit)
MINUTE : Minute
bits : 6 - 11 (6 bit)
HOUR : Hour
bits : 12 - 16 (5 bit)
DAY : Day
bits : 17 - 21 (5 bit)
MONTH : Month
bits : 22 - 25 (4 bit)
YEAR : Year
bits : 26 - 31 (6 bit)
General Purpose
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GP : General Purpose
bits : 0 - 31 (32 bit)
General Purpose
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GP : General Purpose
bits : 0 - 31 (32 bit)
32-bit Counter with Single 32-bit Compare - - Backup
address_offset : 0x454 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
16-bit Counter with Two 16-bit Compares - - Backup
address_offset : 0x454 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
Clock/Calendar with Alarm - - Backup
address_offset : 0x454 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
Clock/Calendar with Alarm - - MODE2 Alarm n Mask
address_offset : 0x48 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEL : Alarm Mask Selection
bits : 0 - 2 (3 bit)
Enumeration: SELSelect
0x0 : OFF
Alarm Disabled
0x1 : SS
Match seconds only
0x2 : MMSS
Match seconds and minutes only
0x3 : HHMMSS
Match seconds, minutes, and hours only
0x4 : DDHHMMSS
Match seconds, minutes, hours, and days only
0x5 : MMDDHHMMSS
Match seconds, minutes, hours, days, and months only
0x6 : YYMMDDHHMMSS
Match seconds, minutes, hours, days, months, and years
End of enumeration elements list.
32-bit Counter with Single 32-bit Compare - - Backup
address_offset : 0x4F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
16-bit Counter with Two 16-bit Compares - - Backup
address_offset : 0x4F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
Clock/Calendar with Alarm - - Backup
address_offset : 0x4F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
32-bit Counter with Single 32-bit Compare - - Tamper Control
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IN0ACT : Tamper Input 0 Action
bits : 0 - 1 (2 bit)
Enumeration: IN0ACTSelect
0x0 : OFF
Off (Disabled)
0x1 : WAKE
Wake without timestamp
0x2 : CAPTURE
Capture timestamp
0x3 : ACTL
Compare IN0 to OUT
End of enumeration elements list.
IN1ACT : Tamper Input 1 Action
bits : 2 - 3 (2 bit)
Enumeration: IN1ACTSelect
0x0 : OFF
Off (Disabled)
0x1 : WAKE
Wake without timestamp
0x2 : CAPTURE
Capture timestamp
0x3 : ACTL
Compare IN1 to OUT
End of enumeration elements list.
IN2ACT : Tamper Input 2 Action
bits : 4 - 5 (2 bit)
Enumeration: IN2ACTSelect
0x0 : OFF
Off (Disabled)
0x1 : WAKE
Wake without timestamp
0x2 : CAPTURE
Capture timestamp
0x3 : ACTL
Compare IN2 to OUT
End of enumeration elements list.
IN3ACT : Tamper Input 3 Action
bits : 6 - 7 (2 bit)
Enumeration: IN3ACTSelect
0x0 : OFF
Off (Disabled)
0x1 : WAKE
Wake without timestamp
0x2 : CAPTURE
Capture timestamp
0x3 : ACTL
Compare IN3 to OUT
End of enumeration elements list.
IN4ACT : Tamper Input 4 Action
bits : 8 - 9 (2 bit)
Enumeration: IN4ACTSelect
0x0 : OFF
Off (Disabled)
0x1 : WAKE
Wake without timestamp
0x2 : CAPTURE
Capture timestamp
0x3 : ACTL
Compare IN4 to OUT
End of enumeration elements list.
TAMLVL0 : Tamper Level Select 0
bits : 16 - 16 (1 bit)
TAMLVL1 : Tamper Level Select 1
bits : 17 - 17 (1 bit)
TAMLVL2 : Tamper Level Select 2
bits : 18 - 18 (1 bit)
TAMLVL3 : Tamper Level Select 3
bits : 19 - 19 (1 bit)
TAMLVL4 : Tamper Level Select 4
bits : 20 - 20 (1 bit)
DEBNC0 : Debouncer Enable 0
bits : 24 - 24 (1 bit)
DEBNC1 : Debouncer Enable 1
bits : 25 - 25 (1 bit)
DEBNC2 : Debouncer Enable 2
bits : 26 - 26 (1 bit)
DEBNC3 : Debouncer Enable 3
bits : 27 - 27 (1 bit)
DEBNC4 : Debouncer Enable 4
bits : 28 - 28 (1 bit)
16-bit Counter with Two 16-bit Compares - - Tamper Control
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IN0ACT : Tamper Input 0 Action
bits : 0 - 1 (2 bit)
Enumeration: IN0ACTSelect
0x0 : OFF
Off (Disabled)
0x1 : WAKE
Wake without timestamp
0x2 : CAPTURE
Capture timestamp
0x3 : ACTL
Compare IN0 to OUT
End of enumeration elements list.
IN1ACT : Tamper Input 1 Action
bits : 2 - 3 (2 bit)
Enumeration: IN1ACTSelect
0x0 : OFF
Off (Disabled)
0x1 : WAKE
Wake without timestamp
0x2 : CAPTURE
Capture timestamp
0x3 : ACTL
Compare IN1 to OUT
End of enumeration elements list.
IN2ACT : Tamper Input 2 Action
bits : 4 - 5 (2 bit)
Enumeration: IN2ACTSelect
0x0 : OFF
Off (Disabled)
0x1 : WAKE
Wake without timestamp
0x2 : CAPTURE
Capture timestamp
0x3 : ACTL
Compare IN2 to OUT
End of enumeration elements list.
IN3ACT : Tamper Input 3 Action
bits : 6 - 7 (2 bit)
Enumeration: IN3ACTSelect
0x0 : OFF
Off (Disabled)
0x1 : WAKE
Wake without timestamp
0x2 : CAPTURE
Capture timestamp
0x3 : ACTL
Compare IN3 to OUT
End of enumeration elements list.
IN4ACT : Tamper Input 4 Action
bits : 8 - 9 (2 bit)
Enumeration: IN4ACTSelect
0x0 : OFF
Off (Disabled)
0x1 : WAKE
Wake without timestamp
0x2 : CAPTURE
Capture timestamp
0x3 : ACTL
Compare IN4 to OUT
End of enumeration elements list.
TAMLVL0 : Tamper Level Select 0
bits : 16 - 16 (1 bit)
TAMLVL1 : Tamper Level Select 1
bits : 17 - 17 (1 bit)
TAMLVL2 : Tamper Level Select 2
bits : 18 - 18 (1 bit)
TAMLVL3 : Tamper Level Select 3
bits : 19 - 19 (1 bit)
TAMLVL4 : Tamper Level Select 4
bits : 20 - 20 (1 bit)
DEBNC0 : Debouncer Enable 0
bits : 24 - 24 (1 bit)
DEBNC1 : Debouncer Enable 1
bits : 25 - 25 (1 bit)
DEBNC2 : Debouncer Enable 2
bits : 26 - 26 (1 bit)
DEBNC3 : Debouncer Enable 3
bits : 27 - 27 (1 bit)
DEBNC4 : Debouncer Enable 4
bits : 28 - 28 (1 bit)
Clock/Calendar with Alarm - - Tamper Control
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IN0ACT : Tamper Input 0 Action
bits : 0 - 1 (2 bit)
Enumeration: IN0ACTSelect
0x0 : OFF
Off (Disabled)
0x1 : WAKE
Wake without timestamp
0x2 : CAPTURE
Capture timestamp
0x3 : ACTL
Compare IN0 to OUT
End of enumeration elements list.
IN1ACT : Tamper Input 1 Action
bits : 2 - 3 (2 bit)
Enumeration: IN1ACTSelect
0x0 : OFF
Off (Disabled)
0x1 : WAKE
Wake without timestamp
0x2 : CAPTURE
Capture timestamp
0x3 : ACTL
Compare IN1 to OUT
End of enumeration elements list.
IN2ACT : Tamper Input 2 Action
bits : 4 - 5 (2 bit)
Enumeration: IN2ACTSelect
0x0 : OFF
Off (Disabled)
0x1 : WAKE
Wake without timestamp
0x2 : CAPTURE
Capture timestamp
0x3 : ACTL
Compare IN2 to OUT
End of enumeration elements list.
IN3ACT : Tamper Input 3 Action
bits : 6 - 7 (2 bit)
Enumeration: IN3ACTSelect
0x0 : OFF
Off (Disabled)
0x1 : WAKE
Wake without timestamp
0x2 : CAPTURE
Capture timestamp
0x3 : ACTL
Compare IN3 to OUT
End of enumeration elements list.
IN4ACT : Tamper Input 4 Action
bits : 8 - 9 (2 bit)
Enumeration: IN4ACTSelect
0x0 : OFF
Off (Disabled)
0x1 : WAKE
Wake without timestamp
0x2 : CAPTURE
Capture timestamp
0x3 : ACTL
Compare IN4 to OUT
End of enumeration elements list.
TAMLVL0 : Tamper Level Select 0
bits : 16 - 16 (1 bit)
TAMLVL1 : Tamper Level Select 1
bits : 17 - 17 (1 bit)
TAMLVL2 : Tamper Level Select 2
bits : 18 - 18 (1 bit)
TAMLVL3 : Tamper Level Select 3
bits : 19 - 19 (1 bit)
TAMLVL4 : Tamper Level Select 4
bits : 20 - 20 (1 bit)
DEBNC0 : Debouncer Enable 0
bits : 24 - 24 (1 bit)
DEBNC1 : Debouncer Enable 1
bits : 25 - 25 (1 bit)
DEBNC2 : Debouncer Enable 2
bits : 26 - 26 (1 bit)
DEBNC3 : Debouncer Enable 3
bits : 27 - 27 (1 bit)
DEBNC4 : Debouncer Enable 4
bits : 28 - 28 (1 bit)
Tamper Control
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IN0ACT : Tamper Input 0 Action
bits : 0 - 1 (2 bit)
Enumeration: IN0ACTSelect
0x0 : OFF
Off (Disabled)
0x1 : WAKE
Wake without timestamp
0x2 : CAPTURE
Capture timestamp
0x3 : ACTL
Compare IN0 to OUT
End of enumeration elements list.
IN1ACT : Tamper Input 1 Action
bits : 2 - 3 (2 bit)
Enumeration: IN1ACTSelect
0x0 : OFF
Off (Disabled)
0x1 : WAKE
Wake without timestamp
0x2 : CAPTURE
Capture timestamp
0x3 : ACTL
Compare IN1 to OUT
End of enumeration elements list.
IN2ACT : Tamper Input 2 Action
bits : 4 - 5 (2 bit)
Enumeration: IN2ACTSelect
0x0 : OFF
Off (Disabled)
0x1 : WAKE
Wake without timestamp
0x2 : CAPTURE
Capture timestamp
0x3 : ACTL
Compare IN2 to OUT
End of enumeration elements list.
IN3ACT : Tamper Input 3 Action
bits : 6 - 7 (2 bit)
Enumeration: IN3ACTSelect
0x0 : OFF
Off (Disabled)
0x1 : WAKE
Wake without timestamp
0x2 : CAPTURE
Capture timestamp
0x3 : ACTL
Compare IN3 to OUT
End of enumeration elements list.
IN4ACT : Tamper Input 4 Action
bits : 8 - 9 (2 bit)
Enumeration: IN4ACTSelect
0x0 : OFF
Off (Disabled)
0x1 : WAKE
Wake without timestamp
0x2 : CAPTURE
Capture timestamp
0x3 : ACTL
Compare IN4 to OUT
End of enumeration elements list.
TAMLVL0 : Tamper Level Select 0
bits : 16 - 16 (1 bit)
TAMLVL1 : Tamper Level Select 1
bits : 17 - 17 (1 bit)
TAMLVL2 : Tamper Level Select 2
bits : 18 - 18 (1 bit)
TAMLVL3 : Tamper Level Select 3
bits : 19 - 19 (1 bit)
TAMLVL4 : Tamper Level Select 4
bits : 20 - 20 (1 bit)
DEBNC0 : Debouncer Enable 0
bits : 24 - 24 (1 bit)
DEBNC1 : Debouncer Enable 1
bits : 25 - 25 (1 bit)
DEBNC2 : Debouncer Enable 2
bits : 26 - 26 (1 bit)
DEBNC3 : Debouncer Enable 3
bits : 27 - 27 (1 bit)
DEBNC4 : Debouncer Enable 4
bits : 28 - 28 (1 bit)
16-bit Counter with Two 16-bit Compares - - MODE1 Compare n Value
address_offset : 0x62 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMP : Compare Value
bits : 0 - 15 (16 bit)
32-bit Counter with Single 32-bit Compare - - MODE0 Timestamp
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
COUNT : Count Timestamp Value
bits : 0 - 31 (32 bit)
access : read-only
16-bit Counter with Two 16-bit Compares - - MODE1 Timestamp
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
COUNT : Count Timestamp Value
bits : 0 - 15 (16 bit)
access : read-only
Clock/Calendar with Alarm - - MODE2 Timestamp
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SECOND : Second Timestamp Value
bits : 0 - 5 (6 bit)
access : read-only
MINUTE : Minute Timestamp Value
bits : 6 - 11 (6 bit)
access : read-only
HOUR : Hour Timestamp Value
bits : 12 - 16 (5 bit)
access : read-only
DAY : Day Timestamp Value
bits : 17 - 21 (5 bit)
access : read-only
MONTH : Month Timestamp Value
bits : 22 - 25 (4 bit)
access : read-only
YEAR : Year Timestamp Value
bits : 26 - 31 (6 bit)
access : read-only
MODE2 Timestamp
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
COUNT : Count Timestamp Value
bits : 0 - 15 (16 bit)
access : read-only
SECOND : Second Timestamp Value
bits : 0 - 5 (6 bit)
access : read-only
MINUTE : Minute Timestamp Value
bits : 6 - 11 (6 bit)
access : read-only
HOUR : Hour Timestamp Value
bits : 12 - 16 (5 bit)
access : read-only
Enumeration: HOURSelect
0x00 : AM
AM when CLKREP in 12-hour
0x10 : PM
PM when CLKREP in 12-hour
End of enumeration elements list.
DAY : Day Timestamp Value
bits : 17 - 21 (5 bit)
access : read-only
MONTH : Month Timestamp Value
bits : 22 - 25 (4 bit)
access : read-only
YEAR : Year Timestamp Value
bits : 26 - 31 (6 bit)
access : read-only
32-bit Counter with Single 32-bit Compare - - Tamper ID
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TAMPID0 : Tamper Input 0 Detected
bits : 0 - 0 (1 bit)
TAMPID1 : Tamper Input 1 Detected
bits : 1 - 1 (1 bit)
TAMPID2 : Tamper Input 2 Detected
bits : 2 - 2 (1 bit)
TAMPID3 : Tamper Input 3 Detected
bits : 3 - 3 (1 bit)
TAMPID4 : Tamper Input 4 Detected
bits : 4 - 4 (1 bit)
TAMPEVT : Tamper Event Detected
bits : 31 - 31 (1 bit)
16-bit Counter with Two 16-bit Compares - - Tamper ID
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TAMPID0 : Tamper Input 0 Detected
bits : 0 - 0 (1 bit)
TAMPID1 : Tamper Input 1 Detected
bits : 1 - 1 (1 bit)
TAMPID2 : Tamper Input 2 Detected
bits : 2 - 2 (1 bit)
TAMPID3 : Tamper Input 3 Detected
bits : 3 - 3 (1 bit)
TAMPID4 : Tamper Input 4 Detected
bits : 4 - 4 (1 bit)
TAMPEVT : Tamper Event Detected
bits : 31 - 31 (1 bit)
Clock/Calendar with Alarm - - Tamper ID
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TAMPID0 : Tamper Input 0 Detected
bits : 0 - 0 (1 bit)
TAMPID1 : Tamper Input 1 Detected
bits : 1 - 1 (1 bit)
TAMPID2 : Tamper Input 2 Detected
bits : 2 - 2 (1 bit)
TAMPID3 : Tamper Input 3 Detected
bits : 3 - 3 (1 bit)
TAMPID4 : Tamper Input 4 Detected
bits : 4 - 4 (1 bit)
TAMPEVT : Tamper Event Detected
bits : 31 - 31 (1 bit)
Tamper ID
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TAMPID0 : Tamper Input 0 Detected
bits : 0 - 0 (1 bit)
TAMPID1 : Tamper Input 1 Detected
bits : 1 - 1 (1 bit)
TAMPID2 : Tamper Input 2 Detected
bits : 2 - 2 (1 bit)
TAMPID3 : Tamper Input 3 Detected
bits : 3 - 3 (1 bit)
TAMPID4 : Tamper Input 4 Detected
bits : 4 - 4 (1 bit)
TAMPEVT : Tamper Event Detected
bits : 31 - 31 (1 bit)
32-bit Counter with Single 32-bit Compare - - MODE0 Interrupt Enable Clear
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PER0 : Periodic Interval 0 Interrupt Enable
bits : 0 - 0 (1 bit)
access : write-only
PER1 : Periodic Interval 1 Interrupt Enable
bits : 1 - 1 (1 bit)
access : write-only
PER2 : Periodic Interval 2 Interrupt Enable
bits : 2 - 2 (1 bit)
access : write-only
PER3 : Periodic Interval 3 Interrupt Enable
bits : 3 - 3 (1 bit)
access : write-only
PER4 : Periodic Interval 4 Interrupt Enable
bits : 4 - 4 (1 bit)
access : write-only
PER5 : Periodic Interval 5 Interrupt Enable
bits : 5 - 5 (1 bit)
access : write-only
PER6 : Periodic Interval 6 Interrupt Enable
bits : 6 - 6 (1 bit)
access : write-only
PER7 : Periodic Interval 7 Interrupt Enable
bits : 7 - 7 (1 bit)
access : write-only
CMP0 : Compare 0 Interrupt Enable
bits : 8 - 8 (1 bit)
TAMPER : Tamper Enable
bits : 14 - 14 (1 bit)
OVF : Overflow Interrupt Enable
bits : 15 - 15 (1 bit)
16-bit Counter with Two 16-bit Compares - - MODE1 Interrupt Enable Clear
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PER0 : Periodic Interval 0 Interrupt Enable
bits : 0 - 0 (1 bit)
PER1 : Periodic Interval 1 Interrupt Enable
bits : 1 - 1 (1 bit)
PER2 : Periodic Interval 2 Interrupt Enable
bits : 2 - 2 (1 bit)
PER3 : Periodic Interval 3 Interrupt Enable
bits : 3 - 3 (1 bit)
PER4 : Periodic Interval 4 Interrupt Enable
bits : 4 - 4 (1 bit)
PER5 : Periodic Interval 5 Interrupt Enable
bits : 5 - 5 (1 bit)
PER6 : Periodic Interval 6 Interrupt Enable
bits : 6 - 6 (1 bit)
PER7 : Periodic Interval 7 Interrupt Enable
bits : 7 - 7 (1 bit)
CMP0 : Compare 0 Interrupt Enable
bits : 8 - 8 (1 bit)
CMP1 : Compare 1 Interrupt Enable
bits : 9 - 9 (1 bit)
TAMPER : Tamper Enable
bits : 14 - 14 (1 bit)
OVF : Overflow Interrupt Enable
bits : 15 - 15 (1 bit)
Clock/Calendar with Alarm - - MODE2 Interrupt Enable Clear
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PER0 : Periodic Interval 0 Interrupt Enable
bits : 0 - 0 (1 bit)
PER1 : Periodic Interval 1 Interrupt Enable
bits : 1 - 1 (1 bit)
PER2 : Periodic Interval 2 Interrupt Enable
bits : 2 - 2 (1 bit)
PER3 : Periodic Interval 3 Interrupt Enable
bits : 3 - 3 (1 bit)
PER4 : Periodic Interval 4 Interrupt Enable
bits : 4 - 4 (1 bit)
PER5 : Periodic Interval 5 Interrupt Enable
bits : 5 - 5 (1 bit)
PER6 : Periodic Interval 6 Interrupt Enable
bits : 6 - 6 (1 bit)
PER7 : Periodic Interval 7 Interrupt Enable
bits : 7 - 7 (1 bit)
ALARM0 : Alarm 0 Interrupt Enable
bits : 8 - 8 (1 bit)
TAMPER : Tamper Enable
bits : 14 - 14 (1 bit)
OVF : Overflow Interrupt Enable
bits : 15 - 15 (1 bit)
MODE2 Interrupt Enable Clear
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PER0 : Periodic Interval 0 Interrupt Enable
bits : 0 - 0 (1 bit)
access : write-only
PER1 : Periodic Interval 1 Interrupt Enable
bits : 1 - 1 (1 bit)
access : write-only
PER2 : Periodic Interval 2 Interrupt Enable
bits : 2 - 2 (1 bit)
access : write-only
PER3 : Periodic Interval 3 Interrupt Enable
bits : 3 - 3 (1 bit)
access : write-only
PER4 : Periodic Interval 4 Interrupt Enable
bits : 4 - 4 (1 bit)
access : write-only
PER5 : Periodic Interval 5 Interrupt Enable
bits : 5 - 5 (1 bit)
access : write-only
PER6 : Periodic Interval 6 Interrupt Enable
bits : 6 - 6 (1 bit)
access : write-only
PER7 : Periodic Interval 7 Interrupt Enable
bits : 7 - 7 (1 bit)
access : write-only
CMP0 : Compare 0 Interrupt Enable
bits : 8 - 8 (1 bit)
ALARM0 : Alarm 0 Interrupt Enable
bits : 8 - 8 (1 bit)
CMP1 : Compare 1 Interrupt Enable
bits : 9 - 9 (1 bit)
TAMPER : Tamper Enable
bits : 14 - 14 (1 bit)
OVF : Overflow Interrupt Enable
bits : 15 - 15 (1 bit)
32-bit Counter with Single 32-bit Compare - - General Purpose
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GP : General Purpose
bits : 0 - 31 (32 bit)
16-bit Counter with Two 16-bit Compares - - General Purpose
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GP : General Purpose
bits : 0 - 31 (32 bit)
Clock/Calendar with Alarm - - General Purpose
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GP : General Purpose
bits : 0 - 31 (32 bit)
Backup
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
Backup
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
Backup
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
Backup
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
Backup
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
Backup
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
Backup
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
Backup
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKUP : Backup
bits : 0 - 31 (32 bit)
32-bit Counter with Single 32-bit Compare - - MODE0 Interrupt Enable Set
address_offset : 0xA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PER0 : Periodic Interval 0 Interrupt Enable
bits : 0 - 0 (1 bit)
PER1 : Periodic Interval 1 Interrupt Enable
bits : 1 - 1 (1 bit)
PER2 : Periodic Interval 2 Interrupt Enable
bits : 2 - 2 (1 bit)
PER3 : Periodic Interval 3 Interrupt Enable
bits : 3 - 3 (1 bit)
PER4 : Periodic Interval 4 Interrupt Enable
bits : 4 - 4 (1 bit)
PER5 : Periodic Interval 5 Interrupt Enable
bits : 5 - 5 (1 bit)
PER6 : Periodic Interval 6 Interrupt Enable
bits : 6 - 6 (1 bit)
PER7 : Periodic Interval 7 Interrupt Enable
bits : 7 - 7 (1 bit)
CMP0 : Compare 0 Interrupt Enable
bits : 8 - 8 (1 bit)
TAMPER : Tamper Enable
bits : 14 - 14 (1 bit)
OVF : Overflow Interrupt Enable
bits : 15 - 15 (1 bit)
16-bit Counter with Two 16-bit Compares - - MODE1 Interrupt Enable Set
address_offset : 0xA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PER0 : Periodic Interval 0 Interrupt Enable
bits : 0 - 0 (1 bit)
PER1 : Periodic Interval 1 Interrupt Enable
bits : 1 - 1 (1 bit)
PER2 : Periodic Interval 2 Interrupt Enable
bits : 2 - 2 (1 bit)
PER3 : Periodic Interval 3 Interrupt Enable
bits : 3 - 3 (1 bit)
PER4 : Periodic Interval 4 Interrupt Enable
bits : 4 - 4 (1 bit)
PER5 : Periodic Interval 5 Interrupt Enable
bits : 5 - 5 (1 bit)
PER6 : Periodic Interval 6 Interrupt Enable
bits : 6 - 6 (1 bit)
PER7 : Periodic Interval 7 Interrupt Enable
bits : 7 - 7 (1 bit)
CMP0 : Compare 0 Interrupt Enable
bits : 8 - 8 (1 bit)
CMP1 : Compare 1 Interrupt Enable
bits : 9 - 9 (1 bit)
TAMPER : Tamper Enable
bits : 14 - 14 (1 bit)
OVF : Overflow Interrupt Enable
bits : 15 - 15 (1 bit)
Clock/Calendar with Alarm - - MODE2 Interrupt Enable Set
address_offset : 0xA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PER0 : Periodic Interval 0 Enable
bits : 0 - 0 (1 bit)
PER1 : Periodic Interval 1 Enable
bits : 1 - 1 (1 bit)
PER2 : Periodic Interval 2 Enable
bits : 2 - 2 (1 bit)
PER3 : Periodic Interval 3 Enable
bits : 3 - 3 (1 bit)
PER4 : Periodic Interval 4 Enable
bits : 4 - 4 (1 bit)
PER5 : Periodic Interval 5 Enable
bits : 5 - 5 (1 bit)
PER6 : Periodic Interval 6 Enable
bits : 6 - 6 (1 bit)
PER7 : Periodic Interval 7 Enable
bits : 7 - 7 (1 bit)
ALARM0 : Alarm 0 Interrupt Enable
bits : 8 - 8 (1 bit)
TAMPER : Tamper Enable
bits : 14 - 14 (1 bit)
OVF : Overflow Interrupt Enable
bits : 15 - 15 (1 bit)
MODE2 Interrupt Enable Set
address_offset : 0xA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PER0 : Periodic Interval 0 Enable
bits : 0 - 0 (1 bit)
PER1 : Periodic Interval 1 Enable
bits : 1 - 1 (1 bit)
PER2 : Periodic Interval 2 Enable
bits : 2 - 2 (1 bit)
PER3 : Periodic Interval 3 Enable
bits : 3 - 3 (1 bit)
PER4 : Periodic Interval 4 Enable
bits : 4 - 4 (1 bit)
PER5 : Periodic Interval 5 Enable
bits : 5 - 5 (1 bit)
PER6 : Periodic Interval 6 Enable
bits : 6 - 6 (1 bit)
PER7 : Periodic Interval 7 Enable
bits : 7 - 7 (1 bit)
CMP0 : Compare 0 Interrupt Enable
bits : 8 - 8 (1 bit)
ALARM0 : Alarm 0 Interrupt Enable
bits : 8 - 8 (1 bit)
CMP1 : Compare 1 Interrupt Enable
bits : 9 - 9 (1 bit)
TAMPER : Tamper Enable
bits : 14 - 14 (1 bit)
OVF : Overflow Interrupt Enable
bits : 15 - 15 (1 bit)
32-bit Counter with Single 32-bit Compare - - MODE0 Interrupt Flag Status and Clear
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PER0 : Periodic Interval 0
bits : 0 - 0 (1 bit)
PER1 : Periodic Interval 1
bits : 1 - 1 (1 bit)
PER2 : Periodic Interval 2
bits : 2 - 2 (1 bit)
PER3 : Periodic Interval 3
bits : 3 - 3 (1 bit)
PER4 : Periodic Interval 4
bits : 4 - 4 (1 bit)
PER5 : Periodic Interval 5
bits : 5 - 5 (1 bit)
PER6 : Periodic Interval 6
bits : 6 - 6 (1 bit)
PER7 : Periodic Interval 7
bits : 7 - 7 (1 bit)
CMP0 : Compare 0
bits : 8 - 8 (1 bit)
TAMPER : Tamper
bits : 14 - 14 (1 bit)
OVF : Overflow
bits : 15 - 15 (1 bit)
16-bit Counter with Two 16-bit Compares - - MODE1 Interrupt Flag Status and Clear
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PER0 : Periodic Interval 0
bits : 0 - 0 (1 bit)
PER1 : Periodic Interval 1
bits : 1 - 1 (1 bit)
PER2 : Periodic Interval 2
bits : 2 - 2 (1 bit)
PER3 : Periodic Interval 3
bits : 3 - 3 (1 bit)
PER4 : Periodic Interval 4
bits : 4 - 4 (1 bit)
PER5 : Periodic Interval 5
bits : 5 - 5 (1 bit)
PER6 : Periodic Interval 6
bits : 6 - 6 (1 bit)
PER7 : Periodic Interval 7
bits : 7 - 7 (1 bit)
CMP0 : Compare 0
bits : 8 - 8 (1 bit)
CMP1 : Compare 1
bits : 9 - 9 (1 bit)
TAMPER : Tamper
bits : 14 - 14 (1 bit)
OVF : Overflow
bits : 15 - 15 (1 bit)
Clock/Calendar with Alarm - - MODE2 Interrupt Flag Status and Clear
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PER0 : Periodic Interval 0
bits : 0 - 0 (1 bit)
PER1 : Periodic Interval 1
bits : 1 - 1 (1 bit)
PER2 : Periodic Interval 2
bits : 2 - 2 (1 bit)
PER3 : Periodic Interval 3
bits : 3 - 3 (1 bit)
PER4 : Periodic Interval 4
bits : 4 - 4 (1 bit)
PER5 : Periodic Interval 5
bits : 5 - 5 (1 bit)
PER6 : Periodic Interval 6
bits : 6 - 6 (1 bit)
PER7 : Periodic Interval 7
bits : 7 - 7 (1 bit)
ALARM0 : Alarm 0
bits : 8 - 8 (1 bit)
TAMPER : Tamper
bits : 14 - 14 (1 bit)
OVF : Overflow
bits : 15 - 15 (1 bit)
MODE2 Interrupt Flag Status and Clear
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PER0 : Periodic Interval 0
bits : 0 - 0 (1 bit)
PER1 : Periodic Interval 1
bits : 1 - 1 (1 bit)
PER2 : Periodic Interval 2
bits : 2 - 2 (1 bit)
PER3 : Periodic Interval 3
bits : 3 - 3 (1 bit)
PER4 : Periodic Interval 4
bits : 4 - 4 (1 bit)
PER5 : Periodic Interval 5
bits : 5 - 5 (1 bit)
PER6 : Periodic Interval 6
bits : 6 - 6 (1 bit)
PER7 : Periodic Interval 7
bits : 7 - 7 (1 bit)
CMP0 : Compare 0
bits : 8 - 8 (1 bit)
ALARM0 : Alarm 0
bits : 8 - 8 (1 bit)
CMP1 : Compare 1
bits : 9 - 9 (1 bit)
TAMPER : Tamper
bits : 14 - 14 (1 bit)
OVF : Overflow
bits : 15 - 15 (1 bit)
32-bit Counter with Single 32-bit Compare - - General Purpose
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GP : General Purpose
bits : 0 - 31 (32 bit)
16-bit Counter with Two 16-bit Compares - - General Purpose
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GP : General Purpose
bits : 0 - 31 (32 bit)
Clock/Calendar with Alarm - - General Purpose
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GP : General Purpose
bits : 0 - 31 (32 bit)
32-bit Counter with Single 32-bit Compare - - Debug Control
address_offset : 0xE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DBGRUN : Run During Debug
bits : 0 - 0 (1 bit)
16-bit Counter with Two 16-bit Compares - - Debug Control
address_offset : 0xE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DBGRUN : Run During Debug
bits : 0 - 0 (1 bit)
Clock/Calendar with Alarm - - Debug Control
address_offset : 0xE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DBGRUN : Run During Debug
bits : 0 - 0 (1 bit)
Debug Control
address_offset : 0xE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DBGRUN : Run During Debug
bits : 0 - 0 (1 bit)
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