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CLK_GATING

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x10 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x4 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x20 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x14 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x24 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CKEN0

CKEN1

MRST1

CKEN2

MRST2

MRST0


CKEN0

Peripheral Function Clock Control Register 0
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKEN0 CKEN0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MFSCK0 MFSCK1 MFSCK2 MFSCK3 MFSCK4 MFSCK5 MFSCK6 MFSCK7 MFSCK8 MFSCK9 MFSCK10 MFSCK11 MFSCK12 MFSCK13 MFSCK14 MFSCK15 ADCCK0 ADCCK1 ADCCK2 ADCCK3 DMACK EXBCK GIOCK

MFSCK0 : Settings for operation clock supply and gating to multi-function serial interface ch.0
bits : 0 - -1 (0 bit)
access : read-write

MFSCK1 : Settings for operation clock supply and gating to multi-function serial interface ch.1
bits : 1 - 0 (0 bit)
access : read-write

MFSCK2 : Settings for operation clock supply and gating to multi-function serial interface ch.2
bits : 2 - 1 (0 bit)
access : read-write

MFSCK3 : Settings for operation clock supply and gating to multi-function serial interface ch.3
bits : 3 - 2 (0 bit)
access : read-write

MFSCK4 : Settings for operation clock supply and gating to multi-function serial interface ch.4
bits : 4 - 3 (0 bit)
access : read-write

MFSCK5 : Settings for operation clock supply and gating to multi-function serial interface ch.5
bits : 5 - 4 (0 bit)
access : read-write

MFSCK6 : Settings for operation clock supply and gating to multi-function serial interface ch.6
bits : 6 - 5 (0 bit)
access : read-write

MFSCK7 : Settings for operation clock supply and gating to multi-function serial interface ch.7
bits : 7 - 6 (0 bit)
access : read-write

MFSCK8 : Settings for operation clock supply and gating to multi-function serial interface ch.8
bits : 8 - 7 (0 bit)
access : read-write

MFSCK9 : Settings for operation clock supply and gating to multi-function serial interface ch.9
bits : 9 - 8 (0 bit)
access : read-write

MFSCK10 : Settings for operation clock supply and gating to multi-function serial interface ch.10
bits : 10 - 9 (0 bit)
access : read-write

MFSCK11 : Settings for operation clock supply and gating to multi-function serial interface ch.11
bits : 11 - 10 (0 bit)
access : read-write

MFSCK12 : Settings for operation clock supply and gating to multi-function serial interface ch.12
bits : 12 - 11 (0 bit)
access : read-write

MFSCK13 : Settings for operation clock supply and gating to multi-function serial interface ch.13
bits : 13 - 12 (0 bit)
access : read-write

MFSCK14 : Settings for operation clock supply and gating to multi-function serial interface ch.14
bits : 14 - 13 (0 bit)
access : read-write

MFSCK15 : Settings for operation clock supply and gating to multi-function serial interface ch.15
bits : 15 - 14 (0 bit)
access : read-write

ADCCK0 : Settings for operation clock supplying and gating to A/D converter unit 0
bits : 16 - 15 (0 bit)
access : read-write

ADCCK1 : Settings for operation clock supplying and gating to A/D converter unit 1
bits : 17 - 16 (0 bit)
access : read-write

ADCCK2 : Settings for operation clock supplying and gating to A/D converter unit 2
bits : 18 - 17 (0 bit)
access : read-write

ADCCK3 : Settings for operation clock supplying and gating to A/D converter unit 3
bits : 19 - 18 (0 bit)
access : read-write

DMACK : Supplying and gating settings of DMAC operation clock
bits : 24 - 23 (0 bit)
access : read-write

EXBCK : Settings for operation clock supplying and gating of external bus interface function
bits : 26 - 25 (0 bit)
access : read-write

GIOCK : Settings for operation clock supplying and gating to GPIO function
bits : 28 - 27 (0 bit)
access : read-write


CKEN1

Peripheral Function Clock Control Register 1
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKEN1 CKEN1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BTMCK0 BTMCK1 BTMCK2 BTMCK3 MFTCK0 MFTCK1 MFTCK2 MFTCK3 QDUCK0 QDUCK1 QDUCK2 QDUCK3

BTMCK0 : Settings operation clock supply and gating to base timer 0/1/2/3
bits : 0 - -1 (0 bit)
access : read-write

BTMCK1 : Settings operation clock supply and gating to base timer 4/5/6/7
bits : 1 - 0 (0 bit)
access : read-write

BTMCK2 : Settings operation clock supply and gating to base timer 8/9/10/11
bits : 2 - 1 (0 bit)
access : read-write

BTMCK3 : Settings operation clock supply and gating to base timer 12/13/14/15
bits : 3 - 2 (0 bit)
access : read-write

MFTCK0 : Settings for operation clock supply and gating of multi-function timer 0 and PPG 0/2/4/6
bits : 8 - 7 (0 bit)
access : read-write

MFTCK1 : Settings for operation clock supply and gating of multi-function timer 1 and PPG 8/10/12/14
bits : 9 - 8 (0 bit)
access : read-write

MFTCK2 : Settings for operation clock supply and gating of multi-function timer 2 and PPG 16/18/20/22
bits : 10 - 9 (0 bit)
access : read-write

MFTCK3 : Settings for operation clock supply and gating of multi-function timer 3 and PPG 24/26/28/30
bits : 11 - 10 (0 bit)
access : read-write

QDUCK0 : Reset control of quad counter unit 0
bits : 16 - 15 (0 bit)
access : read-write

QDUCK1 : Reset control of quad counter unit 1
bits : 17 - 16 (0 bit)
access : read-write

QDUCK2 : Reset control of quad counter unit 2
bits : 18 - 17 (0 bit)
access : read-write

QDUCK3 : Reset control of quad counter unit 3
bits : 19 - 18 (0 bit)
access : read-write


MRST1

Peripheral Function Reset Control Register 1
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MRST1 MRST1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BTMRST0 BTMRST1 BTMRST2 BTMRST3 MFTRST0 MFTRST1 MFTRST2 MFTRST3 QDURST0 QDURST1 QDURST2 QDURST3

BTMRST0 : Reset control of base timer 0/1/2/3
bits : 0 - -1 (0 bit)
access : read-write

BTMRST1 : Reset control of base timer 4/5/6/7
bits : 1 - 0 (0 bit)
access : read-write

BTMRST2 : Reset control of base timer 8/9/10/11
bits : 2 - 1 (0 bit)
access : read-write

BTMRST3 : Reset control of base timer 12/13/14/15
bits : 3 - 2 (0 bit)
access : read-write

MFTRST0 : Control of multi-function timer 0 and PPG 0/2/4/6 reset control
bits : 8 - 7 (0 bit)
access : read-write

MFTRST1 : Control of multi-function timer 1 and PPG 8/10/12/14 reset control
bits : 9 - 8 (0 bit)
access : read-write

MFTRST2 : Control of multi-function timer 2 and PPG 16/18/20/22 reset control
bits : 10 - 9 (0 bit)
access : read-write

MFTRST3 : Control of multi-function timer 3 and PPG 24/26/28/30 reset control
bits : 11 - 10 (0 bit)
access : read-write

QDURST0 : Reset control of quad counter unit 0
bits : 16 - 15 (0 bit)
access : read-write

QDURST1 : Reset control of quad counter unit 1
bits : 17 - 16 (0 bit)
access : read-write

QDURST2 : Reset control of quad counter unit 2
bits : 18 - 17 (0 bit)
access : read-write

QDURST3 : Reset control of quad counter unit 3
bits : 19 - 18 (0 bit)
access : read-write


CKEN2

Peripheral Function Clock Control Register 2
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKEN2 CKEN2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USBCK0 USBCK1 CANCK0 CANCK1 CANCK2 SDCCK I2SCK0 I2SCK1 PCRCCK CECCK0 CECCK1 QSPICK

USBCK0 : Settings for operation clock supply and gating of USB(function/host) ch.0
bits : 0 - -1 (0 bit)
access : read-write

USBCK1 : Settings for operation clock supply and gating of USB(function/host) ch.1
bits : 1 - 0 (0 bit)
access : read-write

CANCK0 : Settings for clock supply and gating to CAN controller ch.0
bits : 4 - 3 (0 bit)
access : read-write

CANCK1 : Settings for clock supply and gating to CAN controller ch.1
bits : 5 - 4 (0 bit)
access : read-write

CANCK2 : Settings for operation clock supply and gating to SD card interface
bits : 6 - 5 (0 bit)
access : read-write

SDCCK : Settings for operation clock supply and gating to SD card interface
bits : 8 - 7 (0 bit)
access : read-write

I2SCK0 : 16
bits : 16 - 15 (0 bit)
access : read-write

I2SCK1 : 17
bits : 17 - 16 (0 bit)
access : read-write

PCRCCK : 20
bits : 20 - 19 (0 bit)
access : read-write

CECCK0 : 24
bits : 24 - 23 (0 bit)
access : read-write

CECCK1 : 25
bits : 25 - 24 (0 bit)
access : read-write

QSPICK : 28
bits : 28 - 27 (0 bit)
access : read-write


MRST2

Peripheral Function Reset Control Register 2
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MRST2 MRST2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USBRST0 USBRST1 CANRST0 CANRST1 CANRST2 SDCRST I2SRST0 I2SRST1 PCRCRST CECRST0 CECRST1 QSPIRST

USBRST0 : Reset control of USB (function/host) ch.0
bits : 0 - -1 (0 bit)
access : read-write

USBRST1 : Reset control of USB (function/host) ch.1
bits : 1 - 0 (0 bit)
access : read-write

CANRST0 : Reset control of CAN controller ch.0
bits : 4 - 3 (0 bit)
access : read-write

CANRST1 : Reset control of CAN controller ch.1
bits : 5 - 4 (0 bit)
access : read-write

CANRST2 : Reset control of SD card interface
bits : 6 - 5 (0 bit)
access : read-write

SDCRST : Reset control of SD card interface
bits : 8 - 7 (0 bit)
access : read-write

I2SRST0 : 16
bits : 16 - 15 (0 bit)
access : read-write

I2SRST1 : 17
bits : 17 - 16 (0 bit)
access : read-write

PCRCRST : 20
bits : 20 - 19 (0 bit)
access : read-write

CECRST0 : 24
bits : 24 - 23 (0 bit)
access : read-write

CECRST1 : 25
bits : 25 - 24 (0 bit)
access : read-write

QSPIRST : 28
bits : 28 - 27 (0 bit)
access : read-write


MRST0

Peripheral Function Reset Control Register 0
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MRST0 MRST0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MFSRST0 MFSRST1 MFSRST2 MFSRST3 MFSRST4 MFSRST5 MFSRST6 MFSRST7 MFSRST8 MFSRST9 MFSRST10 MFSRST11 MFSRST12 MFSRST13 MFSRST14 MFSRST15 ADCRST0 ADCRST1 ADCRST2 ADCRST3 DMARST EXBRST

MFSRST0 : Control of software reset of multi-function serial interface ch.0
bits : 0 - -1 (0 bit)
access : read-write

MFSRST1 : Control of software reset of multi-function serial interface ch.1
bits : 1 - 0 (0 bit)
access : read-write

MFSRST2 : Control of software reset of multi-function serial interface ch.2
bits : 2 - 1 (0 bit)
access : read-write

MFSRST3 : Control of software reset of multi-function serial interface ch.3
bits : 3 - 2 (0 bit)
access : read-write

MFSRST4 : Control of software reset of multi-function serial interface ch.4
bits : 4 - 3 (0 bit)
access : read-write

MFSRST5 : Control of software reset of multi-function serial interface ch.5
bits : 5 - 4 (0 bit)
access : read-write

MFSRST6 : Control of software reset of multi-function serial interface ch.6
bits : 6 - 5 (0 bit)
access : read-write

MFSRST7 : Control of software reset of multi-function serial interface ch.7
bits : 7 - 6 (0 bit)
access : read-write

MFSRST8 : Control of software reset of multi-function serial interface ch.8
bits : 8 - 7 (0 bit)
access : read-write

MFSRST9 : Control of software reset of multi-function serial interface ch.9
bits : 9 - 8 (0 bit)
access : read-write

MFSRST10 : Control of software reset of multi-function serial interface ch.10
bits : 10 - 9 (0 bit)
access : read-write

MFSRST11 : Control of software reset of multi-function serial interface ch.11
bits : 11 - 10 (0 bit)
access : read-write

MFSRST12 : Control of software reset of multi-function serial interface ch.12
bits : 12 - 11 (0 bit)
access : read-write

MFSRST13 : Control of software reset of multi-function serial interface ch.13
bits : 13 - 12 (0 bit)
access : read-write

MFSRST14 : Control of software reset of multi-function serial interface ch.14
bits : 14 - 13 (0 bit)
access : read-write

MFSRST15 : Control of software reset of multi-function serial interface ch.15
bits : 15 - 14 (0 bit)
access : read-write

ADCRST0 : Reset control of A/D converter unit 0
bits : 16 - 15 (0 bit)
access : read-write

ADCRST1 : Reset control of A/D converter unit 1
bits : 17 - 16 (0 bit)
access : read-write

ADCRST2 : Reset control of A/D converter unit 2
bits : 18 - 17 (0 bit)
access : read-write

ADCRST3 : Reset control of A/D converter unit 3
bits : 19 - 18 (0 bit)
access : read-write

DMARST : Reset control of DMAC
bits : 24 - 23 (0 bit)
access : read-write

EXBRST : Reset control for external bus interface
bits : 26 - 25 (0 bit)
access : read-write



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