\n
address_offset : 0x100 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x110 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x104 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x108 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x10C Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
SDRAM Mode Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDON : SDRAM ON
bits : 0 - -1 (0 bit)
access : read-write
PDON : Power Down ON
bits : 1 - 0 (0 bit)
access : read-write
ROFF : Refresh OFF
bits : 2 - 1 (0 bit)
access : read-write
CASEL : Column Address Select
bits : 4 - 4 (1 bit)
access : read-write
RASEL : Row Address Select
bits : 8 - 10 (3 bit)
access : read-write
BASEL : Bank Address Select
bits : 12 - 14 (3 bit)
access : read-write
MSDCLKOFF : MSDCLK OFF
bits : 16 - 15 (0 bit)
access : read-write
Refresh Timer Register
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REFC : Refresh Count
bits : 0 - 14 (15 bit)
access : read-write
NREF : Number of Refresh
bits : 16 - 22 (7 bit)
access : read-write
PREF : Pre-Refresh
bits : 24 - 23 (0 bit)
access : read-write
Power Down Count Register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PDC : Power Down Count
bits : 0 - 14 (15 bit)
access : read-write
SDRAM Timing Register
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CL : CAS Latency
bits : 0 - 0 (1 bit)
access : read-write
TRC : RAS Cycle time
bits : 4 - 6 (3 bit)
access : read-write
TRP : RAS Precharge time
bits : 8 - 10 (3 bit)
access : read-write
TRCD : RAS-CAS Delay
bits : 12 - 14 (3 bit)
access : read-write
TRAS : RAS active time
bits : 16 - 18 (3 bit)
access : read-write
TREFC : Refresh Cycle time
bits : 20 - 22 (3 bit)
access : read-write
TDPL : Data-in to Precharge Lead Time
bits : 24 - 24 (1 bit)
access : read-write
BOFF : Buffer readout bit
bits : 31 - 30 (0 bit)
access : read-write
SDRAM Command Register
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDAD : SDRAM ADress
bits : 0 - 14 (15 bit)
access : read-write
SDWE : SDRAM Write Enable
bits : 16 - 15 (0 bit)
access : read-write
SDCAS : SDRAM CAS
bits : 17 - 16 (0 bit)
access : read-write
SDRAS : SDRAM RAS
bits : 18 - 17 (0 bit)
access : read-write
SDCS : SDRAM Chip Select
bits : 19 - 18 (0 bit)
access : read-write
SDCKE : SDRAM CKE
bits : 20 - 19 (0 bit)
access : read-write
PEND : Pend
bits : 31 - 30 (0 bit)
access : read-only
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