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EXTI

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x10 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0xC Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x4 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x8 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x14 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x18 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x1C Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

Registers

ENIR

ELVR1

NMIRR

NMICL

ELVR2

EIRR

EICL

ELVR


ENIR

External Interrupt Enable Register [BHW]
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENIR ENIR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EN0 EN1 EN2 EN3 EN4 EN5 EN6 EN7 EN8 EN9 EN10 EN11 EN12 EN13 EN14 EN15 EN16 EN17 EN18 EN19 EN20 EN21 EN22 EN23 EN24 EN25 EN26 EN27 EN28 EN29 EN30 EN31

EN0 : External interrupt Ch.0 enable bit
bits : 0 - -1 (0 bit)
access : read-write

EN1 : External interrupt Ch.1 enable bit
bits : 1 - 0 (0 bit)
access : read-write

EN2 : External interrupt Ch.2 enable bit
bits : 2 - 1 (0 bit)
access : read-write

EN3 : External interrupt Ch.3 enable bit
bits : 3 - 2 (0 bit)
access : read-write

EN4 : External interrupt Ch.4 enable bit
bits : 4 - 3 (0 bit)
access : read-write

EN5 : External interrupt Ch.5 enable bit
bits : 5 - 4 (0 bit)
access : read-write

EN6 : External interrupt Ch.6 enable bit
bits : 6 - 5 (0 bit)
access : read-write

EN7 : External interrupt Ch.7 enable bit
bits : 7 - 6 (0 bit)
access : read-write

EN8 : External interrupt Ch.8 enable bit
bits : 8 - 7 (0 bit)
access : read-write

EN9 : External interrupt Ch.9 enable bit
bits : 9 - 8 (0 bit)
access : read-write

EN10 : External interrupt Ch.10 enable bit
bits : 10 - 9 (0 bit)
access : read-write

EN11 : External interrupt Ch.11 enable bit
bits : 11 - 10 (0 bit)
access : read-write

EN12 : External interrupt Ch.12 enable bit
bits : 12 - 11 (0 bit)
access : read-write

EN13 : External interrupt Ch.13 enable bit
bits : 13 - 12 (0 bit)
access : read-write

EN14 : External interrupt Ch.14 enable bit
bits : 14 - 13 (0 bit)
access : read-write

EN15 : External interrupt Ch.15 enable bit
bits : 15 - 14 (0 bit)
access : read-write

EN16 : External interrupt Ch.16 enable bit
bits : 16 - 15 (0 bit)
access : read-write

EN17 : External interrupt Ch.17 enable bit
bits : 17 - 16 (0 bit)
access : read-write

EN18 : External interrupt Ch.18 enable bit
bits : 18 - 17 (0 bit)
access : read-write

EN19 : External interrupt Ch.19 enable bit
bits : 19 - 18 (0 bit)
access : read-write

EN20 : External interrupt Ch.20 enable bit
bits : 20 - 19 (0 bit)
access : read-write

EN21 : External interrupt Ch.21 enable bit
bits : 21 - 20 (0 bit)
access : read-write

EN22 : External interrupt Ch.22 enable bit
bits : 22 - 21 (0 bit)
access : read-write

EN23 : External interrupt Ch.23 enable bit
bits : 23 - 22 (0 bit)
access : read-write

EN24 : External interrupt Ch.24 enable bit
bits : 24 - 23 (0 bit)
access : read-write

EN25 : External interrupt Ch.25 enable bit
bits : 25 - 24 (0 bit)
access : read-write

EN26 : External interrupt Ch.26 enable bit
bits : 26 - 25 (0 bit)
access : read-write

EN27 : External interrupt Ch.27 enable bit
bits : 27 - 26 (0 bit)
access : read-write

EN28 : External interrupt Ch.28 enable bit
bits : 28 - 27 (0 bit)
access : read-write

EN29 : External interrupt Ch.29 enable bit
bits : 29 - 28 (0 bit)
access : read-write

EN30 : External interrupt Ch.30 enable bit
bits : 30 - 29 (0 bit)
access : read-write

EN31 : External interrupt Ch.31 enable bit
bits : 31 - 30 (0 bit)
access : read-write


ELVR1

External Interrupt Factor Level Register 1 [BHW]
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ELVR1 ELVR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LA16 LB16 LA17 LB17 LA18 LB18 LA19 LB19 LA20 LB20 LA21 LB21 LA22 LB22 LA23 LB23 LA24 LB24 LA25 LB25 LA26 LB26 LA27 LB27 LA28 LB28 LA29 LB29 LA30 LB30 LA31 LB31

LA16 : External interrupt request detection level selection bit for INT16
bits : 0 - -1 (0 bit)
access : read-write

LB16 : External interrupt request detection level selection bit for INT16
bits : 1 - 0 (0 bit)
access : read-write

LA17 : External interrupt request detection level selection bit for INT17
bits : 2 - 1 (0 bit)
access : read-write

LB17 : External interrupt request detection level selection bit for INT17
bits : 3 - 2 (0 bit)
access : read-write

LA18 : External interrupt request detection level selection bit for INT18
bits : 4 - 3 (0 bit)
access : read-write

LB18 : External interrupt request detection level selection bit for INT18
bits : 5 - 4 (0 bit)
access : read-write

LA19 : External interrupt request detection level selection bit for INT19
bits : 6 - 5 (0 bit)
access : read-write

LB19 : External interrupt request detection level selection bit for INT19
bits : 7 - 6 (0 bit)
access : read-write

LA20 : External interrupt request detection level selection bit for INT20
bits : 8 - 7 (0 bit)
access : read-write

LB20 : External interrupt request detection level selection bit for INT20
bits : 9 - 8 (0 bit)
access : read-write

LA21 : External interrupt request detection level selection bit for INT21
bits : 10 - 9 (0 bit)
access : read-write

LB21 : External interrupt request detection level selection bit for INT21
bits : 11 - 10 (0 bit)
access : read-write

LA22 : External interrupt request detection level selection bit for INT22
bits : 12 - 11 (0 bit)
access : read-write

LB22 : External interrupt request detection level selection bit for INT22
bits : 13 - 12 (0 bit)
access : read-write

LA23 : External interrupt request detection level selection bit for INT23
bits : 14 - 13 (0 bit)
access : read-write

LB23 : External interrupt request detection level selection bit for INT23
bits : 15 - 14 (0 bit)
access : read-write

LA24 : External interrupt request detection level selection bit for INT24
bits : 16 - 15 (0 bit)
access : read-write

LB24 : External interrupt request detection level selection bit for INT24
bits : 17 - 16 (0 bit)
access : read-write

LA25 : External interrupt request detection level selection bit for INT25
bits : 18 - 17 (0 bit)
access : read-write

LB25 : External interrupt request detection level selection bit for INT25
bits : 19 - 18 (0 bit)
access : read-write

LA26 : External interrupt request detection level selection bit for INT26
bits : 20 - 19 (0 bit)
access : read-write

LB26 : External interrupt request detection level selection bit for INT26
bits : 21 - 20 (0 bit)
access : read-write

LA27 : External interrupt request detection level selection bit for INT27
bits : 22 - 21 (0 bit)
access : read-write

LB27 : External interrupt request detection level selection bit for INT27
bits : 23 - 22 (0 bit)
access : read-write

LA28 : External interrupt request detection level selection bit for INT28
bits : 24 - 23 (0 bit)
access : read-write

LB28 : External interrupt request detection level selection bit for INT28
bits : 25 - 24 (0 bit)
access : read-write

LA29 : External interrupt request detection level selection bit for INT29
bits : 26 - 25 (0 bit)
access : read-write

LB29 : External interrupt request detection level selection bit for INT29
bits : 27 - 26 (0 bit)
access : read-write

LA30 : External interrupt request detection level selection bit for INT30
bits : 28 - 27 (0 bit)
access : read-write

LB30 : External interrupt request detection level selection bit for INT30
bits : 29 - 28 (0 bit)
access : read-write

LA31 : External interrupt request detection level selection bit for INT31
bits : 30 - 29 (0 bit)
access : read-write

LB31 : External interrupt request detection level selection bit for INT31
bits : 31 - 30 (0 bit)
access : read-write


NMIRR

Non Maskable Interrupt Factor Register [BHW]
address_offset : 0x14 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

NMIRR NMIRR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NR

NR : NMI interrupt request detection bit
bits : 0 - -1 (0 bit)
access : read-only


NMICL

Non Maskable Interrupt Factor Clear Register [BHW]
address_offset : 0x18 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NMICL NMICL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NCL

NCL : NMI interrupt factor clear bit
bits : 0 - -1 (0 bit)
access : read-write


ELVR2

External Interrupt Factor Level Register 2 [BHW]
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ELVR2 ELVR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LC0 LC1 LC2 LC3 LC4 LC5 LC6 LC7 LC8 LC9 LC10 LC11 LC12 LC13 LC14 LC15 LC16 LC17 LC18 LC19 LC20 LC21 LC22 LC23 LC24 LC25 LC26 LC27 LC28 LC29 LC30 LC31

LC0 : External interrupt request detection level selection bit for INT0
bits : 0 - -1 (0 bit)
access : read-write

LC1 : External interrupt request detection level selection bit for INT1
bits : 1 - 0 (0 bit)
access : read-write

LC2 : External interrupt request detection level selection bit for INT2
bits : 2 - 1 (0 bit)
access : read-write

LC3 : External interrupt request detection level selection bit for INT3
bits : 3 - 2 (0 bit)
access : read-write

LC4 : External interrupt request detection level selection bit for INT4
bits : 4 - 3 (0 bit)
access : read-write

LC5 : External interrupt request detection level selection bit for INT5
bits : 5 - 4 (0 bit)
access : read-write

LC6 : External interrupt request detection level selection bit for INT6
bits : 6 - 5 (0 bit)
access : read-write

LC7 : External interrupt request detection level selection bit for INT7
bits : 7 - 6 (0 bit)
access : read-write

LC8 : External interrupt request detection level selection bit for INT8
bits : 8 - 7 (0 bit)
access : read-write

LC9 : External interrupt request detection level selection bit for INT9
bits : 9 - 8 (0 bit)
access : read-write

LC10 : External interrupt request detection level selection bit for INT10
bits : 10 - 9 (0 bit)
access : read-write

LC11 : External interrupt request detection level selection bit for INT11
bits : 11 - 10 (0 bit)
access : read-write

LC12 : External interrupt request detection level selection bit for INT12
bits : 12 - 11 (0 bit)
access : read-write

LC13 : External interrupt request detection level selection bit for INT13
bits : 13 - 12 (0 bit)
access : read-write

LC14 : External interrupt request detection level selection bit for INT14
bits : 14 - 13 (0 bit)
access : read-write

LC15 : External interrupt request detection level selection bit for INT15
bits : 15 - 14 (0 bit)
access : read-write

LC16 : External interrupt request detection level selection bit for INT16
bits : 16 - 15 (0 bit)
access : read-write

LC17 : External interrupt request detection level selection bit for INT17
bits : 17 - 16 (0 bit)
access : read-write

LC18 : External interrupt request detection level selection bit for INT18
bits : 18 - 17 (0 bit)
access : read-write

LC19 : External interrupt request detection level selection bit for INT19
bits : 19 - 18 (0 bit)
access : read-write

LC20 : External interrupt request detection level selection bit for INT20
bits : 20 - 19 (0 bit)
access : read-write

LC21 : External interrupt request detection level selection bit for INT21
bits : 21 - 20 (0 bit)
access : read-write

LC22 : External interrupt request detection level selection bit for INT22
bits : 22 - 21 (0 bit)
access : read-write

LC23 : External interrupt request detection level selection bit for INT23
bits : 23 - 22 (0 bit)
access : read-write

LC24 : External interrupt request detection level selection bit for INT24
bits : 24 - 23 (0 bit)
access : read-write

LC25 : External interrupt request detection level selection bit for INT25
bits : 25 - 24 (0 bit)
access : read-write

LC26 : External interrupt request detection level selection bit for INT26
bits : 26 - 25 (0 bit)
access : read-write

LC27 : External interrupt request detection level selection bit for INT27
bits : 27 - 26 (0 bit)
access : read-write

LC28 : External interrupt request detection level selection bit for INT28
bits : 28 - 27 (0 bit)
access : read-write

LC29 : External interrupt request detection level selection bit for INT29
bits : 29 - 28 (0 bit)
access : read-write

LC30 : External interrupt request detection level selection bit for INT30
bits : 30 - 29 (0 bit)
access : read-write

LC31 : External interrupt request detection level selection bit for INT31
bits : 31 - 30 (0 bit)
access : read-write


EIRR

External Interrupt Factor Register [BHW]
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EIRR EIRR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ER0 ER1 ER2 ER3 ER4 ER5 ER6 ER7 ER8 ER9 ER10 ER11 ER12 ER13 ER14 ER15 ER16 ER17 ER18 ER19 ER20 ER21 ER22 ER23 ER24 ER25 ER26 ER27 ER28 ER29 ER30 ER31

ER0 : External interrupt Ch.0 request detection bit
bits : 0 - -1 (0 bit)
access : read-only

ER1 : External interrupt Ch.1 request detection bit
bits : 1 - 0 (0 bit)
access : read-only

ER2 : External interrupt Ch.2 request detection bit
bits : 2 - 1 (0 bit)
access : read-only

ER3 : External interrupt Ch.3 request detection bit
bits : 3 - 2 (0 bit)
access : read-only

ER4 : External interrupt Ch.4 request detection bit
bits : 4 - 3 (0 bit)
access : read-only

ER5 : External interrupt Ch.5 request detection bit
bits : 5 - 4 (0 bit)
access : read-only

ER6 : External interrupt Ch.6 request detection bit
bits : 6 - 5 (0 bit)
access : read-only

ER7 : External interrupt Ch.7 request detection bit
bits : 7 - 6 (0 bit)
access : read-only

ER8 : External interrupt Ch.8 request detection bit
bits : 8 - 7 (0 bit)
access : read-only

ER9 : External interrupt Ch.9 request detection bit
bits : 9 - 8 (0 bit)
access : read-only

ER10 : External interrupt Ch.10 request detection bit
bits : 10 - 9 (0 bit)
access : read-only

ER11 : External interrupt Ch.11 request detection bit
bits : 11 - 10 (0 bit)
access : read-only

ER12 : External interrupt Ch.12 request detection bit
bits : 12 - 11 (0 bit)
access : read-only

ER13 : External interrupt Ch.13 request detection bit
bits : 13 - 12 (0 bit)
access : read-only

ER14 : External interrupt Ch.14 request detection bit
bits : 14 - 13 (0 bit)
access : read-only

ER15 : External interrupt Ch.15 request detection bit
bits : 15 - 14 (0 bit)
access : read-only

ER16 : External interrupt Ch.16 request detection bit
bits : 16 - 15 (0 bit)
access : read-only

ER17 : External interrupt Ch.17 request detection bit
bits : 17 - 16 (0 bit)
access : read-only

ER18 : External interrupt Ch.18 request detection bit
bits : 18 - 17 (0 bit)
access : read-only

ER19 : External interrupt Ch.19 request detection bit
bits : 19 - 18 (0 bit)
access : read-only

ER20 : External interrupt Ch.20 request detection bit
bits : 20 - 19 (0 bit)
access : read-only

ER21 : External interrupt Ch.21 request detection bit
bits : 21 - 20 (0 bit)
access : read-only

ER22 : External interrupt Ch.22 request detection bit
bits : 22 - 21 (0 bit)
access : read-only

ER23 : External interrupt Ch.23 request detection bit
bits : 23 - 22 (0 bit)
access : read-only

ER24 : External interrupt Ch.24 request detection bit
bits : 24 - 23 (0 bit)
access : read-only

ER25 : External interrupt Ch.25 request detection bit
bits : 25 - 24 (0 bit)
access : read-only

ER26 : External interrupt Ch.26 request detection bit
bits : 26 - 25 (0 bit)
access : read-only

ER27 : External interrupt Ch.27 request detection bit
bits : 27 - 26 (0 bit)
access : read-only

ER28 : External interrupt Ch.28 request detection bit
bits : 28 - 27 (0 bit)
access : read-only

ER29 : External interrupt Ch.29 request detection bit
bits : 29 - 28 (0 bit)
access : read-only

ER30 : External interrupt Ch.30 request detection bit
bits : 30 - 29 (0 bit)
access : read-only

ER31 : External interrupt Ch.31 request detection bit
bits : 31 - 30 (0 bit)
access : read-only


EICL

External Interrupt Factor Clear Register [BHW]
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EICL EICL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ECL0 ECL1 ECL2 ECL3 ECL4 ECL5 ECL6 ECL7 ECL8 ECL9 ECL10 ECL11 ECL12 ECL13 ECL14 ECL15 ECL16 ECL17 ECL18 ECL19 ECL20 ECL21 ECL22 ECL23 ECL24 ECL25 ECL26 ECL27 ECL28 ECL29 ECL30 ECL31

ECL0 : External interrupt Ch.0 factor clear bit
bits : 0 - -1 (0 bit)
access : read-write

ECL1 : External interrupt Ch.1 factor clear bit
bits : 1 - 0 (0 bit)
access : read-write

ECL2 : External interrupt Ch.2 factor clear bit
bits : 2 - 1 (0 bit)
access : read-write

ECL3 : External interrupt Ch.3 factor clear bit
bits : 3 - 2 (0 bit)
access : read-write

ECL4 : External interrupt Ch.4 factor clear bit
bits : 4 - 3 (0 bit)
access : read-write

ECL5 : External interrupt Ch.5 factor clear bit
bits : 5 - 4 (0 bit)
access : read-write

ECL6 : External interrupt Ch.6 factor clear bit
bits : 6 - 5 (0 bit)
access : read-write

ECL7 : External interrupt Ch.7 factor clear bit
bits : 7 - 6 (0 bit)
access : read-write

ECL8 : External interrupt Ch.8 factor clear bit
bits : 8 - 7 (0 bit)
access : read-write

ECL9 : External interrupt Ch.9 factor clear bit
bits : 9 - 8 (0 bit)
access : read-write

ECL10 : External interrupt Ch.10 factor clear bit
bits : 10 - 9 (0 bit)
access : read-write

ECL11 : External interrupt Ch.11 factor clear bit
bits : 11 - 10 (0 bit)
access : read-write

ECL12 : External interrupt Ch.12 factor clear bit
bits : 12 - 11 (0 bit)
access : read-write

ECL13 : External interrupt Ch.13 factor clear bit
bits : 13 - 12 (0 bit)
access : read-write

ECL14 : External interrupt Ch.14 factor clear bit
bits : 14 - 13 (0 bit)
access : read-write

ECL15 : External interrupt Ch.15 factor clear bit
bits : 15 - 14 (0 bit)
access : read-write

ECL16 : External interrupt Ch.16 factor clear bit
bits : 16 - 15 (0 bit)
access : read-write

ECL17 : External interrupt Ch.17 factor clear bit
bits : 17 - 16 (0 bit)
access : read-write

ECL18 : External interrupt Ch.18 factor clear bit
bits : 18 - 17 (0 bit)
access : read-write

ECL19 : External interrupt Ch.19 factor clear bit
bits : 19 - 18 (0 bit)
access : read-write

ECL20 : External interrupt Ch.20 factor clear bit
bits : 20 - 19 (0 bit)
access : read-write

ECL21 : External interrupt Ch.21 factor clear bit
bits : 21 - 20 (0 bit)
access : read-write

ECL22 : External interrupt Ch.22 factor clear bit
bits : 22 - 21 (0 bit)
access : read-write

ECL23 : External interrupt Ch.23 factor clear bit
bits : 23 - 22 (0 bit)
access : read-write

ECL24 : External interrupt Ch.24 factor clear bit
bits : 24 - 23 (0 bit)
access : read-write

ECL25 : External interrupt Ch.25 factor clear bit
bits : 25 - 24 (0 bit)
access : read-write

ECL26 : External interrupt Ch.26 factor clear bit
bits : 26 - 25 (0 bit)
access : read-write

ECL27 : External interrupt Ch.27 factor clear bit
bits : 27 - 26 (0 bit)
access : read-write

ECL28 : External interrupt Ch.28 factor clear bit
bits : 28 - 27 (0 bit)
access : read-write

ECL29 : External interrupt Ch.29 factor clear bit
bits : 29 - 28 (0 bit)
access : read-write

ECL30 : External interrupt Ch.30 factor clear bit
bits : 30 - 29 (0 bit)
access : read-write

ECL31 : External interrupt Ch.31 factor clear bit
bits : 31 - 30 (0 bit)
access : read-write


ELVR

External Interrupt Factor Level Register [BHW]
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ELVR ELVR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LA0 LB0 LA1 LB1 LA2 LB2 LA3 LB3 LA4 LB4 LA5 LB5 LA6 LB6 LA7 LB7 LA8 LB8 LA9 LB9 LA10 LB10 LA11 LB11 LA12 LB12 LA13 LB13 LA14 LB14 LA15 LB15

LA0 : External interrupt request detection level selection bit for INT0
bits : 0 - -1 (0 bit)
access : read-write

LB0 : External interrupt request detection level selection bit for INT0
bits : 1 - 0 (0 bit)
access : read-write

LA1 : External interrupt request detection level selection bit for INT1
bits : 2 - 1 (0 bit)
access : read-write

LB1 : External interrupt request detection level selection bit for INT1
bits : 3 - 2 (0 bit)
access : read-write

LA2 : External interrupt request detection level selection bit for INT2
bits : 4 - 3 (0 bit)
access : read-write

LB2 : External interrupt request detection level selection bit for INT2
bits : 5 - 4 (0 bit)
access : read-write

LA3 : External interrupt request detection level selection bit for INT3
bits : 6 - 5 (0 bit)
access : read-write

LB3 : External interrupt request detection level selection bit for INT3
bits : 7 - 6 (0 bit)
access : read-write

LA4 : External interrupt request detection level selection bit for INT4
bits : 8 - 7 (0 bit)
access : read-write

LB4 : External interrupt request detection level selection bit for INT4
bits : 9 - 8 (0 bit)
access : read-write

LA5 : External interrupt request detection level selection bit for INT5
bits : 10 - 9 (0 bit)
access : read-write

LB5 : External interrupt request detection level selection bit for INT5
bits : 11 - 10 (0 bit)
access : read-write

LA6 : External interrupt request detection level selection bit for INT6
bits : 12 - 11 (0 bit)
access : read-write

LB6 : External interrupt request detection level selection bit for INT6
bits : 13 - 12 (0 bit)
access : read-write

LA7 : External interrupt request detection level selection bit for INT7
bits : 14 - 13 (0 bit)
access : read-write

LB7 : External interrupt request detection level selection bit for INT7
bits : 15 - 14 (0 bit)
access : read-write

LA8 : External interrupt request detection level selection bit for INT8
bits : 16 - 15 (0 bit)
access : read-write

LB8 : External interrupt request detection level selection bit for INT8
bits : 17 - 16 (0 bit)
access : read-write

LA9 : External interrupt request detection level selection bit for INT9
bits : 18 - 17 (0 bit)
access : read-write

LB9 : External interrupt request detection level selection bit for INT9
bits : 19 - 18 (0 bit)
access : read-write

LA10 : External interrupt request detection level selection bit for INT10
bits : 20 - 19 (0 bit)
access : read-write

LB10 : External interrupt request detection level selection bit for INT10
bits : 21 - 20 (0 bit)
access : read-write

LA11 : External interrupt request detection level selection bit for INT11
bits : 22 - 21 (0 bit)
access : read-write

LB11 : External interrupt request detection level selection bit for INT11
bits : 23 - 22 (0 bit)
access : read-write

LA12 : External interrupt request detection level selection bit for INT12
bits : 24 - 23 (0 bit)
access : read-write

LB12 : External interrupt request detection level selection bit for INT12
bits : 25 - 24 (0 bit)
access : read-write

LA13 : External interrupt request detection level selection bit for INT13
bits : 26 - 25 (0 bit)
access : read-write

LB13 : External interrupt request detection level selection bit for INT13
bits : 27 - 26 (0 bit)
access : read-write

LA14 : External interrupt request detection level selection bit for INT14
bits : 28 - 27 (0 bit)
access : read-write

LB14 : External interrupt request detection level selection bit for INT14
bits : 29 - 28 (0 bit)
access : read-write

LA15 : External interrupt request detection level selection bit for INT15
bits : 30 - 29 (0 bit)
access : read-write

LB15 : External interrupt request detection level selection bit for INT15
bits : 31 - 30 (0 bit)
access : read-write



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