\n
address_offset : 0x2100 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2104 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2108 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x210C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2110 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2114 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2118 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x211C Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2120 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2124 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2128 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x212C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2130 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2134 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2138 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x213C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2140 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2144 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2148 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x214C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2150 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2154 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2158 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x215C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2160 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2164 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2168 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x216C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2170 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2174 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
Host Control Register [BHW]
address_offset : 0x2100 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HOST : host mode bit
bits : 0 - -1 (0 bit)
access : read-write
URST : bus reset bit
bits : 1 - 0 (0 bit)
access : read-write
SOFIRE : SOF interrupt enable bit
bits : 2 - 1 (0 bit)
access : read-write
DIRE : device disconnection detection interrupt enable bit
bits : 3 - 2 (0 bit)
access : read-write
CNNIRE : device connection detection interrupt enable bit
bits : 4 - 3 (0 bit)
access : read-write
CMPIRE : token completion interrupt enable bit
bits : 5 - 4 (0 bit)
access : read-write
URIRE : bus reset interrupt enable bit
bits : 6 - 5 (0 bit)
access : read-write
RWKIRE : resume interrupt enable bit
bits : 7 - 6 (0 bit)
access : read-write
RETRY : retry enable bit
bits : 8 - 7 (0 bit)
access : read-write
CANCEL : token cancellation enable bit
bits : 9 - 8 (0 bit)
access : read-write
SOFSTEP : SOF interrupt occurrence selection bit
bits : 10 - 9 (0 bit)
access : read-write
Host Interrupt Register [BHW]
address_offset : 0x2104 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SOFIRQ : SOF starting flag
bits : 0 - -1 (0 bit)
access : read-write
DIRQ : device disconnection detection flag
bits : 1 - 0 (0 bit)
access : read-write
CNNIRQ : device connection detection flag
bits : 2 - 1 (0 bit)
access : read-write
CMPIRQ : token completion flag
bits : 3 - 2 (0 bit)
access : read-write
URIRQ : bus reset end flag
bits : 4 - 3 (0 bit)
access : read-write
RWKIRQ : remote Wake-up end flag
bits : 5 - 4 (0 bit)
access : read-write
TCAN : token cancellation flag
bits : 7 - 6 (0 bit)
access : read-write
Host Error Status Register [BHW]
address_offset : 0x2105 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HS : handshake status flags
bits : 0 - 0 (1 bit)
access : read-write
STUFF : stuffing error flag
bits : 2 - 1 (0 bit)
access : read-write
TGERR : toggle error flag
bits : 3 - 2 (0 bit)
access : read-write
CRC : CRC error flag
bits : 4 - 3 (0 bit)
access : read-write
TOUT : timeout flag
bits : 5 - 4 (0 bit)
access : read-write
RERR : receive error flag
bits : 6 - 5 (0 bit)
access : read-write
LSTSOF : lost SOF flag
bits : 7 - 6 (0 bit)
access : read-write
Host Status Register [BHW]
address_offset : 0x2108 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSTAT : connection status flag
bits : 0 - -1 (0 bit)
access : read-only
TMODE : transmission mode flag
bits : 1 - 0 (0 bit)
access : read-only
SUSP : suspend setting bit
bits : 2 - 1 (0 bit)
access : read-write
SOFBUSY : SOF busy flag
bits : 3 - 2 (0 bit)
access : read-write
CLKSEL : USB operation clock selection bit
bits : 4 - 3 (0 bit)
access : read-write
ALIVE : specify the keep-alive function in the low-speed mode
bits : 5 - 4 (0 bit)
access : read-write
SOF Interrupt Frame Compare Register [BHW]
address_offset : 0x2109 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FRAMECOMP : frame compare data
bits : 0 - 6 (7 bit)
access : read-write
Retry Timer Setup Register [BHW]
address_offset : 0x210C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RTIMER : retry timer setting
bits : 0 - 14 (15 bit)
access : read-write
Retry Timer Setup Register 2 [BHW]
address_offset : 0x2110 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RTIMER2 : retry timer setting 2
bits : 0 - 0 (1 bit)
access : read-write
Host Address Register [BHW]
address_offset : 0x2111 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADDRESS : Host Address
bits : 0 - 5 (6 bit)
access : read-write
EOF Setup Register [BHW]
address_offset : 0x2114 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HEOF : End Frame
bits : 0 - 12 (13 bit)
access : read-write
Frame Setup Register [BHW]
address_offset : 0x2118 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FRAME : Frame Setup
bits : 0 - 9 (10 bit)
access : read-write
Host Token Endpoint Register [BHW]
address_offset : 0x211C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENDPT : endpoint bits
bits : 0 - 2 (3 bit)
access : read-write
TKNEN : token enable bits
bits : 4 - 5 (2 bit)
access : read-write
TGGL : toggle bit
bits : 7 - 6 (0 bit)
access : read-write
UDC Control Register [BHW]
address_offset : 0x2120 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PWC : Power Control bit
bits : 0 - -1 (0 bit)
access : read-write
RFBK : Data Toggle Mode Select bit
bits : 1 - 0 (0 bit)
access : read-write
STALCLREN : Endpoint 1 to 5 STAL bit Clear Select bit
bits : 3 - 2 (0 bit)
access : read-write
USTP : USB Operating Clock Stop bit
bits : 4 - 3 (0 bit)
access : read-write
HCONX : Host Connection bit
bits : 5 - 4 (0 bit)
access : read-write
RESUM : Resume Setting bit
bits : 6 - 5 (0 bit)
access : read-write
RST : Function Reset bit
bits : 7 - 6 (0 bit)
access : read-write
EP0 Control Register [HW]
address_offset : 0x2124 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PKS : Packet Size Endpoint 0 Setting bits
bits : 0 - 5 (6 bit)
access : read-write
STAL : Endpoint 0 Stall Setting bit
bits : 9 - 8 (0 bit)
access : read-write
EP1 Control Register [HW]
address_offset : 0x2128 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PKS : Packet Size Setting bits
bits : 0 - 7 (8 bit)
access : read-write
STAL : Endpoint Stall Setting bit
bits : 9 - 8 (0 bit)
access : read-write
NULE : Null Automatic Transfer Enable bit
bits : 10 - 9 (0 bit)
access : read-write
DMAE : DMA Automatic Transfer Enable bit
bits : 11 - 10 (0 bit)
access : read-write
DIR : Endpoint Transfer Direction Select bit
bits : 12 - 11 (0 bit)
access : read-write
TYPE : Endpoint Transfer Type Select bits
bits : 13 - 13 (1 bit)
access : read-write
EPEN : Endpoint Enable bit
bits : 15 - 14 (0 bit)
access : read-write
EP2 Control Register [HW]
address_offset : 0x212C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PKS : Packet Size Setting bits
bits : 0 - 5 (6 bit)
access : read-write
STAL : Endpoint Stall Setting bit
bits : 9 - 8 (0 bit)
access : read-write
NULE : Null Automatic Transfer Enable bit
bits : 10 - 9 (0 bit)
access : read-write
DMAE : DMA Automatic Transfer Enable bit
bits : 11 - 10 (0 bit)
access : read-write
DIR : Endpoint Transfer Direction Select bit
bits : 12 - 11 (0 bit)
access : read-write
TYPE : Endpoint Transfer Type Select bits
bits : 13 - 13 (1 bit)
access : read-write
EPEN : Endpoint Enable bit
bits : 15 - 14 (0 bit)
access : read-write
EP3 Control Register [HW]
address_offset : 0x2130 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EP4 Control Register [HW]
address_offset : 0x2134 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EP5 Control Register [HW]
address_offset : 0x2138 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Time Stamp Register [HW]
address_offset : 0x213C Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
TMSP : Time Stamp bits
bits : 0 - 9 (10 bit)
access : read-only
UDC Status Register [BHW]
address_offset : 0x2140 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CONF : Configuration Detection bit
bits : 0 - -1 (0 bit)
access : read-write
SETP : Setup Stage Detection bit
bits : 1 - 0 (0 bit)
access : read-write
WKUP : Wake-up Detection bit
bits : 2 - 1 (0 bit)
access : read-write
BRST : Bus Reset Detection bit
bits : 3 - 2 (0 bit)
access : read-write
SOF : SOF Detection bit
bits : 4 - 3 (0 bit)
access : read-write
SUSP : Suspend detection bit
bits : 5 - 4 (0 bit)
access : read-write
UDC Interrupt Enable Register [BHW]
address_offset : 0x2141 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CONFIE : Configuration Interrupt Enable bit
bits : 0 - -1 (0 bit)
access : read-write
CONFN : Configuration Number Indication bit
bits : 1 - 0 (0 bit)
access : read-only
WKUPIE : Wake-up Interrupt Enable bit
bits : 2 - 1 (0 bit)
access : read-write
BRSTIE : Bus Reset Enable bit
bits : 3 - 2 (0 bit)
access : read-write
SOFIE : SOF Reception Interrupt Enable bit
bits : 4 - 3 (0 bit)
access : read-write
SUSPIE : Suspend Interrupt Enable bit
bits : 5 - 4 (0 bit)
access : read-write
EP0I Status Register [HW]
address_offset : 0x2144 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DRQI : Send/Receive Data Interrupt Request bit
bits : 10 - 9 (0 bit)
access : read-write
DRQIIE : Send Data Interrupt Enable bit
bits : 14 - 13 (0 bit)
access : read-write
BFINI : Send Buffer Initialization bit
bits : 15 - 14 (0 bit)
access : read-write
EP0O Status Register [HW]
address_offset : 0x2148 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SIZE : Packet Size Indication bit
bits : 0 - 5 (6 bit)
access : read-only
SPK : Short Packet Interrupt Request bit
bits : 9 - 8 (0 bit)
access : read-write
DRQO : Receive Data Interrupt Request bit
bits : 10 - 9 (0 bit)
access : read-write
SPKIE : Short Packet Interrupt Enable bit
bits : 13 - 12 (0 bit)
access : read-write
DRQOIE : Receive Data Interrupt Enable bit
bits : 14 - 13 (0 bit)
access : read-write
BFINI : Receive Buffer Initialization bit
bits : 15 - 14 (0 bit)
access : read-write
EP1 Status Register [HW]
address_offset : 0x214C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SIZE : packet SIZE
bits : 0 - 7 (8 bit)
access : read-only
SPK : Short Packet Interrupt Request bit
bits : 9 - 8 (0 bit)
access : read-write
DRQ : Packet Transfer Interrupt Request bit
bits : 10 - 9 (0 bit)
access : read-write
BUSY : Busy Flag bit
bits : 11 - 10 (0 bit)
access : read-only
SPKIE : Short Packet Interrupt Enable bit
bits : 13 - 12 (0 bit)
access : read-write
DRQIE : Packet Transfer Interrupt Enable bit
bits : 14 - 13 (0 bit)
access : read-write
BFINI : Send/Receive Buffer Initialization bit
bits : 15 - 14 (0 bit)
access : read-write
EP2 Status Register [HW]
address_offset : 0x2150 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SIZE : packet SIZE
bits : 0 - 5 (6 bit)
access : read-only
SPK : Short Packet Interrupt Request bit
bits : 9 - 8 (0 bit)
access : read-write
DRQ : Packet Transfer Interrupt Request bit
bits : 10 - 9 (0 bit)
access : read-write
BUSY : Busy Flag bit
bits : 11 - 10 (0 bit)
access : read-only
SPKIE : Short Packet Interrupt Enable bit
bits : 13 - 12 (0 bit)
access : read-write
DRQIE : Packet Transfer Interrupt Enable bit
bits : 14 - 13 (0 bit)
access : read-write
BFINI : Send/Receive Buffer Initialization bit
bits : 15 - 14 (0 bit)
access : read-write
EP3 Status Register [HW]
address_offset : 0x2154 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EP4 Status Register [HW]
address_offset : 0x2158 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EP5 Status Register [HW]
address_offset : 0x215C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EP0 Data Register [BHW]
address_offset : 0x2160 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BFDT : Endpoint Send/Receive Buffer Data
bits : 0 - 14 (15 bit)
access : read-write
EP1 Data Register [BHW]
address_offset : 0x2164 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EP2 Data Register [BHW]
address_offset : 0x2168 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EP3 Data Register [BHW]
address_offset : 0x216C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EP4 Data Register [BHW]
address_offset : 0x2170 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EP5 Data Register [BHW]
address_offset : 0x2174 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
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