\n
address_offset : 0x0 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x500 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x580 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x200 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x300 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x400 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x100 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x124 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x600 Bytes (0x0)
size : 0x6C byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x684 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x68C Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x700 Bytes (0x0)
size : 0x80 byte (0x0)
mem_usage : registers
protection : not protected
Port Function Setting Register 0 [BHW]
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PFR0
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PFR0
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PFR0
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PFR0
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PFR0
bits : 4 - 3 (0 bit)
access : read-write
P8 : Bit8 of PFR0
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PFR0
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PFR0
bits : 10 - 9 (0 bit)
access : read-write
Port Function Setting Register 4 [BHW]
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PFR4
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PFR4
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PFR4
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PFR4
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PFR4
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PFR4
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PFR4
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PFR4
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PFR4
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PFR4
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PFR4
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PFR4
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PFR4
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PFR4
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PFR4
bits : 14 - 13 (0 bit)
access : read-write
Pull-up Setting Register 0 [BHW]
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PCR0
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PCR0
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PCR0
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PCR0
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PCR0
bits : 4 - 3 (0 bit)
access : read-write
P8 : Bit8 of PCR0
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PCR0
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PCR0
bits : 10 - 9 (0 bit)
access : read-write
Pull-up Setting Register 1 [BHW]
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PCR1
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PCR1
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PCR1
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PCR1
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PCR1
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PCR1
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PCR1
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PCR1
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PCR1
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PCR1
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PCR1
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PCR1
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PCR1
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PCR1
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PCR1
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PCR1
bits : 15 - 14 (0 bit)
access : read-write
Pull-up Setting Register 2 [BHW]
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PCR2
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PCR2
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PCR2
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PCR2
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PCR2
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PCR2
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PCR2
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PCR2
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PCR2
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PCR2
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PCR2
bits : 10 - 9 (0 bit)
access : read-write
Pull-up Setting Register 3 [BHW]
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PCR3
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PCR3
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PCR3
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PCR3
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PCR3
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PCR3
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PCR3
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PCR3
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PCR3
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PCR3
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PCR3
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PCR3
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PCR3
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PCR3
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PCR3
bits : 14 - 13 (0 bit)
access : read-write
Pull-up Setting Register 4 [BHW]
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PCR4
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PCR4
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PCR4
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PCR4
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PCR4
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PCR4
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PCR4
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PCR4
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PCR4
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PCR4
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PCR4
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PCR4
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PCR4
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PCR4
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PCR4
bits : 14 - 13 (0 bit)
access : read-write
Pull-up Setting Register 5 [BHW]
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PCR5
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PCR5
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PCR5
bits : 2 - 1 (0 bit)
access : read-write
PD : Bit13 of PCR5
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PCR5
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PCR5
bits : 15 - 14 (0 bit)
access : read-write
Pull-up Setting Register 6 [BHW]
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PCR6
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PCR6
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PCR6
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PCR6
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PCR6
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PCR6
bits : 5 - 4 (0 bit)
access : read-write
PE : Bit14 of PCR6
bits : 14 - 13 (0 bit)
access : read-write
Pull-up Setting Register 7 [BHW]
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PCR7
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PCR7
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PCR7
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PCR7
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PCR7
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PCR7
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PCR7
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PCR7
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PCR7
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PCR7
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PCR7
bits : 10 - 9 (0 bit)
access : read-write
Pull-up Setting Register 9 [BHW]
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PCR9
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PCR9
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PCR9
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PCR9
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PCR9
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PCR9
bits : 5 - 4 (0 bit)
access : read-write
Pull-up Setting Register A [BHW]
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PCRA
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PCRA
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PCRA
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PCRA
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PCRA
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PCRA
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PCRA
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PCRA
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PCRA
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PCRA
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PCRA
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PCRA
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PCRA
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PCRA
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PCRA
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PCRA
bits : 15 - 14 (0 bit)
access : read-write
Pull-up Setting Register B [BHW]
address_offset : 0x12C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PCRB
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PCRB
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PCRB
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PCRB
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PCRB
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PCRB
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PCRB
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PCRB
bits : 7 - 6 (0 bit)
access : read-write
Pull-up Setting Register C [BHW]
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PCRC
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PCRC
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PCRC
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PCRC
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PCRC
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PCRC
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PCRC
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PCRC
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PCRC
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PCRC
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PCRC
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PCRC
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PCRC
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PCRC
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PCRC
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PCRC
bits : 15 - 14 (0 bit)
access : read-write
Pull-up Setting Register D [BHW]
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PCRD
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PCRD
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PCRD
bits : 2 - 1 (0 bit)
access : read-write
Pull-up Setting Register E [BHW]
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PCRE
bits : 0 - -1 (0 bit)
access : read-write
P2 : Bit2 of PCRE
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PCRE
bits : 3 - 2 (0 bit)
access : read-write
Pull-up Setting Register F [BHW]
address_offset : 0x13C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PCRF
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PCRF
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PCRF
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PCRF
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PCRF
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PCRF
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PCRF
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PCRF
bits : 7 - 6 (0 bit)
access : read-write
Port Function Setting Register 5 [BHW]
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PFR5
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PFR5
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PFR5
bits : 2 - 1 (0 bit)
access : read-write
PD : Bit13 of PFR5
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PFR5
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PFR5
bits : 15 - 14 (0 bit)
access : read-write
Port Function Setting Register 6 [BHW]
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PFR6
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PFR6
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PFR6
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PFR6
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PFR6
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PFR6
bits : 5 - 4 (0 bit)
access : read-write
PE : Bit14 of PFR6
bits : 14 - 13 (0 bit)
access : read-write
Port Function Setting Register 7 [BHW]
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PFR7
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PFR7
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PFR7
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PFR7
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PFR7
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PFR7
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PFR7
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PFR7
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PFR7
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PFR7
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PFR7
bits : 10 - 9 (0 bit)
access : read-write
Port Function Setting Register 8 [BHW]
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PFR8
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PFR8
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PFR8
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PFR8
bits : 3 - 2 (0 bit)
access : read-write
Port input/output Direction Setting Register 0 [BHW]
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of DDR0
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of DDR0
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of DDR0
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of DDR0
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of DDR0
bits : 4 - 3 (0 bit)
access : read-write
P8 : Bit8 of DDR0
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of DDR0
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of DDR0
bits : 10 - 9 (0 bit)
access : read-write
Port input/output Direction Setting Register 1 [BHW]
address_offset : 0x204 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of DDR1
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of DDR1
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of DDR1
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of DDR1
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of DDR1
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of DDR1
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of DDR1
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of DDR1
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of DDR1
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of DDR1
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of DDR1
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of DDR1
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of DDR1
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of DDR1
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of DDR1
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of DDR1
bits : 15 - 14 (0 bit)
access : read-write
Port input/output Direction Setting Register 2 [BHW]
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of DDR2
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of DDR2
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of DDR2
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of DDR2
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of DDR2
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of DDR2
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of DDR2
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of DDR2
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of DDR2
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of DDR2
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of DDR2
bits : 10 - 9 (0 bit)
access : read-write
Port input/output Direction Setting Register 3 [BHW]
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of DDR3
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of DDR3
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of DDR3
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of DDR3
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of DDR3
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of DDR3
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of DDR3
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of DDR3
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of DDR3
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of DDR3
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of DDR3
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of DDR3
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of DDR3
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of DDR3
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of DDR3
bits : 14 - 13 (0 bit)
access : read-write
Port input/output Direction Setting Register 4 [BHW]
address_offset : 0x210 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of DDR4
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of DDR4
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of DDR4
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of DDR4
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of DDR4
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of DDR4
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of DDR4
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of DDR4
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of DDR4
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of DDR4
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of DDR4
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of DDR4
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of DDR4
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of DDR4
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of DDR4
bits : 14 - 13 (0 bit)
access : read-write
Port input/output Direction Setting Register 5 [BHW]
address_offset : 0x214 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of DDR5
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of DDR5
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of DDR5
bits : 2 - 1 (0 bit)
access : read-write
PD : Bit13 of DDR5
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of DDR5
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of DDR5
bits : 15 - 14 (0 bit)
access : read-write
Port input/output Direction Setting Register 6 [BHW]
address_offset : 0x218 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of DDR6
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of DDR6
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of DDR6
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of DDR6
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of DDR6
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of DDR6
bits : 5 - 4 (0 bit)
access : read-write
PE : Bit14 of DDR6
bits : 14 - 13 (0 bit)
access : read-write
Port input/output Direction Setting Register 7 [BHW]
address_offset : 0x21C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of DDR7
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of DDR7
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of DDR7
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of DDR7
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of DDR7
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of DDR7
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of DDR7
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of DDR7
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of DDR7
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of DDR7
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of DDR7
bits : 10 - 9 (0 bit)
access : read-write
Port input/output Direction Setting Register 8 [BHW]
address_offset : 0x220 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of DDR8
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of DDR8
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of DDR8
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of DDR8
bits : 3 - 2 (0 bit)
access : read-write
Port input/output Direction Setting Register 9 [BHW]
address_offset : 0x224 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of DDR9
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of DDR9
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of DDR9
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of DDR9
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of DDR9
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of DDR9
bits : 5 - 4 (0 bit)
access : read-write
Port input/output Direction Setting Register A [BHW]
address_offset : 0x228 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of DDRA
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of DDRA
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of DDRA
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of DDRA
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of DDRA
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of DDRA
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of DDRA
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of DDRA
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of DDRA
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of DDRA
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of DDRA
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of DDRA
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of DDRA
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of DDRA
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of DDRA
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of DDRA
bits : 15 - 14 (0 bit)
access : read-write
Port input/output Direction Setting Register B [BHW]
address_offset : 0x22C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of DDRB
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of DDRB
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of DDRB
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of DDRB
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of DDRB
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of DDRB
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of DDRB
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of DDRB
bits : 7 - 6 (0 bit)
access : read-write
Port input/output Direction Setting Register C [BHW]
address_offset : 0x230 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of DDRC
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of DDRC
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of DDRC
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of DDRC
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of DDRC
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of DDRC
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of DDRC
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of DDRC
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of DDRC
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of DDRC
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of DDRC
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of DDRC
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of DDRC
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of DDRC
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of DDRC
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of DDRC
bits : 15 - 14 (0 bit)
access : read-write
Port input/output Direction Setting Register D [BHW]
address_offset : 0x234 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of DDRD
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of DDRD
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of DDRD
bits : 2 - 1 (0 bit)
access : read-write
Port input/output Direction Setting Register E [BHW]
address_offset : 0x238 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of DDRE
bits : 0 - -1 (0 bit)
access : read-write
P2 : Bit2 of DDRE
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of DDRE
bits : 3 - 2 (0 bit)
access : read-write
Port input/output Direction Setting Register F [BHW]
address_offset : 0x23C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of DDRF
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of DDRF
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of DDRF
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of DDRF
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of DDRF
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of DDRF
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of DDRF
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of DDRF
bits : 7 - 6 (0 bit)
access : read-write
Port Function Setting Register 9 [BHW]
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PFR9
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PFR9
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PFR9
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PFR9
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PFR9
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PFR9
bits : 5 - 4 (0 bit)
access : read-write
Port Function Setting Register A [BHW]
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PFRA
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PFRA
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PFRA
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PFRA
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PFRA
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PFRA
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PFRA
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PFRA
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PFRA
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PFRA
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PFRA
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PFRA
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PFRA
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PFRA
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PFRA
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PFRA
bits : 15 - 14 (0 bit)
access : read-write
Port Function Setting Register B [BHW]
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PFRB
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PFRB
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PFRB
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PFRB
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PFRB
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PFRB
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PFRB
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PFRB
bits : 7 - 6 (0 bit)
access : read-write
Port Function Setting Register C [BHW]
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PFRC
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PFRC
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PFRC
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PFRC
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PFRC
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PFRC
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PFRC
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PFRC
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PFRC
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PFRC
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PFRC
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PFRC
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PFRC
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PFRC
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PFRC
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PFRC
bits : 15 - 14 (0 bit)
access : read-write
Port Input Data Register 0 [BHW]
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDIR0
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDIR0
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDIR0
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDIR0
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDIR0
bits : 4 - 3 (0 bit)
access : read-write
P8 : Bit8 of PDIR0
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDIR0
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDIR0
bits : 10 - 9 (0 bit)
access : read-write
Port Input Data Register 1 [BHW]
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDIR1
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDIR1
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDIR1
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDIR1
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDIR1
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDIR1
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDIR1
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDIR1
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDIR1
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDIR1
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDIR1
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PDIR1
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PDIR1
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PDIR1
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PDIR1
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PDIR1
bits : 15 - 14 (0 bit)
access : read-write
Port Input Data Register 2 [BHW]
address_offset : 0x308 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDIR2
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDIR2
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDIR2
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDIR2
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDIR2
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDIR2
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDIR2
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDIR2
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDIR2
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDIR2
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDIR2
bits : 10 - 9 (0 bit)
access : read-write
Port Input Data Register 3 [BHW]
address_offset : 0x30C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDIR3
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDIR3
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDIR3
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDIR3
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDIR3
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDIR3
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDIR3
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDIR3
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDIR3
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDIR3
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDIR3
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PDIR3
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PDIR3
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PDIR3
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PDIR3
bits : 14 - 13 (0 bit)
access : read-write
Port Input Data Register 4 [BHW]
address_offset : 0x310 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDIR4
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDIR4
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDIR4
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDIR4
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDIR4
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDIR4
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDIR4
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDIR4
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDIR4
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDIR4
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDIR4
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PDIR4
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PDIR4
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PDIR4
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PDIR4
bits : 14 - 13 (0 bit)
access : read-write
Port Input Data Register 5 [BHW]
address_offset : 0x314 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDIR5
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDIR5
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDIR5
bits : 2 - 1 (0 bit)
access : read-write
PD : Bit13 of PDIR5
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PDIR5
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PDIR5
bits : 15 - 14 (0 bit)
access : read-write
Port Input Data Register 6 [BHW]
address_offset : 0x318 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDIR6
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDIR6
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDIR6
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDIR6
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDIR6
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDIR6
bits : 5 - 4 (0 bit)
access : read-write
PE : Bit14 of PDIR6
bits : 14 - 13 (0 bit)
access : read-write
Port Input Data Register 7 [BHW]
address_offset : 0x31C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDIR7
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDIR7
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDIR7
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDIR7
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDIR7
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDIR7
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDIR7
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDIR7
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDIR7
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDIR7
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDIR7
bits : 10 - 9 (0 bit)
access : read-write
Port Input Data Register 8 [BHW]
address_offset : 0x320 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDIR8
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDIR8
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDIR8
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDIR8
bits : 3 - 2 (0 bit)
access : read-write
Port Input Data Register 9 [BHW]
address_offset : 0x324 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDIR9
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDIR9
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDIR9
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDIR9
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDIR9
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDIR9
bits : 5 - 4 (0 bit)
access : read-write
Port Input Data Register A [BHW]
address_offset : 0x328 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDIRA
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDIRA
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDIRA
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDIRA
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDIRA
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDIRA
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDIRA
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDIRA
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDIRA
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDIRA
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDIRA
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PDIRA
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PDIRA
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PDIRA
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PDIRA
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PDIRA
bits : 15 - 14 (0 bit)
access : read-write
Port Input Data Register B [BHW]
address_offset : 0x32C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDIRB
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDIRB
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDIRB
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDIRB
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDIRB
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDIRB
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDIRB
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDIRB
bits : 7 - 6 (0 bit)
access : read-write
Port Input Data Register C [BHW]
address_offset : 0x330 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDIRC
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDIRC
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDIRC
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDIRC
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDIRC
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDIRC
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDIRC
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDIRC
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDIRC
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDIRC
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDIRC
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PDIRC
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PDIRC
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PDIRC
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PDIRC
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PDIRC
bits : 15 - 14 (0 bit)
access : read-write
Port Input Data Register D [BHW]
address_offset : 0x334 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDIRD
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDIRD
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDIRD
bits : 2 - 1 (0 bit)
access : read-write
Port Input Data Register E [BHW]
address_offset : 0x338 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDIRE
bits : 0 - -1 (0 bit)
access : read-write
P2 : Bit2 of PDIRE
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDIRE
bits : 3 - 2 (0 bit)
access : read-write
Port Input Data Register F [BHW]
address_offset : 0x33C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDIRF
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDIRF
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDIRF
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDIRF
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDIRF
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDIRF
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDIRF
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDIRF
bits : 7 - 6 (0 bit)
access : read-write
Port Function Setting Register D [BHW]
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PFRD
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PFRD
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PFRD
bits : 2 - 1 (0 bit)
access : read-write
Port Function Setting Register E [BHW]
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PFRE
bits : 0 - -1 (0 bit)
access : read-write
P2 : Bit2 of PFRE
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PFRE
bits : 3 - 2 (0 bit)
access : read-write
Port Function Setting Register F [BHW]
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PFRF
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PFRF
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PFRF
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PFRF
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PFRF
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PFRF
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PFRF
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PFRF
bits : 7 - 6 (0 bit)
access : read-write
Port Function Setting Register 1 [BHW]
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PFR1
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PFR1
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PFR1
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PFR1
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PFR1
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PFR1
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PFR1
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PFR1
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PFR1
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PFR1
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PFR1
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PFR1
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PFR1
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PFR1
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PFR1
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PFR1
bits : 15 - 14 (0 bit)
access : read-write
Port Output Data Register 0 [BHW]
address_offset : 0x400 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDOR0
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDOR0
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDOR0
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDOR0
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDOR0
bits : 4 - 3 (0 bit)
access : read-write
P8 : Bit8 of PDOR0
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDOR0
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDOR0
bits : 10 - 9 (0 bit)
access : read-write
Port Output Data Register 1 [BHW]
address_offset : 0x404 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDOR1
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDOR1
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDOR1
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDOR1
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDOR1
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDOR1
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDOR1
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDOR1
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDOR1
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDOR1
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDOR1
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PDOR1
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PDOR1
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PDOR1
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PDOR1
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PDOR1
bits : 15 - 14 (0 bit)
access : read-write
Port Output Data Register 2 [BHW]
address_offset : 0x408 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDOR2
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDOR2
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDOR2
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDOR2
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDOR2
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDOR2
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDOR2
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDOR2
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDOR2
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDOR2
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDOR2
bits : 10 - 9 (0 bit)
access : read-write
Port Output Data Register 3 [BHW]
address_offset : 0x40C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDOR3
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDOR3
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDOR3
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDOR3
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDOR3
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDOR3
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDOR3
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDOR3
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDOR3
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDOR3
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDOR3
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PDOR3
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PDOR3
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PDOR3
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PDOR3
bits : 14 - 13 (0 bit)
access : read-write
Port Output Data Register 4 [BHW]
address_offset : 0x410 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDOR4
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDOR4
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDOR4
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDOR4
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDOR4
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDOR4
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDOR4
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDOR4
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDOR4
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDOR4
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDOR4
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PDOR4
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PDOR4
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PDOR4
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PDOR4
bits : 14 - 13 (0 bit)
access : read-write
Port Output Data Register 5 [BHW]
address_offset : 0x414 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDOR5
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDOR5
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDOR5
bits : 2 - 1 (0 bit)
access : read-write
PD : Bit13 of PDOR5
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PDOR5
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PDOR5
bits : 15 - 14 (0 bit)
access : read-write
Port Output Data Register 6 [BHW]
address_offset : 0x418 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDOR6
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDOR6
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDOR6
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDOR6
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDOR6
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDOR6
bits : 5 - 4 (0 bit)
access : read-write
PE : Bit14 of PDOR6
bits : 14 - 13 (0 bit)
access : read-write
Port Output Data Register 7 [BHW]
address_offset : 0x41C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDOR7
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDOR7
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDOR7
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDOR7
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDOR7
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDOR7
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDOR7
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDOR7
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDOR7
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDOR7
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDOR7
bits : 10 - 9 (0 bit)
access : read-write
Port Output Data Register 8 [BHW]
address_offset : 0x420 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDOR8
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDOR8
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDOR8
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDOR8
bits : 3 - 2 (0 bit)
access : read-write
Port Output Data Register 9 [BHW]
address_offset : 0x424 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDOR9
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDOR9
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDOR9
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDOR9
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDOR9
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDOR9
bits : 5 - 4 (0 bit)
access : read-write
Port Output Data Register A [BHW]
address_offset : 0x428 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDORA
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDORA
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDORA
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDORA
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDORA
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDORA
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDORA
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDORA
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDORA
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDORA
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDORA
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PDORA
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PDORA
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PDORA
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PDORA
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PDORA
bits : 15 - 14 (0 bit)
access : read-write
Port Output Data Register B [BHW]
address_offset : 0x42C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDORB
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDORB
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDORB
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDORB
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDORB
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDORB
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDORB
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDORB
bits : 7 - 6 (0 bit)
access : read-write
Port Output Data Register C [BHW]
address_offset : 0x430 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDORC
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDORC
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDORC
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDORC
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDORC
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDORC
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDORC
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDORC
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDORC
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDORC
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDORC
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PDORC
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PDORC
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PDORC
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PDORC
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PDORC
bits : 15 - 14 (0 bit)
access : read-write
Port Output Data Register D [BHW]
address_offset : 0x434 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDORD
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDORD
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDORD
bits : 2 - 1 (0 bit)
access : read-write
Port Output Data Register E [BHW]
address_offset : 0x438 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDORE
bits : 0 - -1 (0 bit)
access : read-write
P2 : Bit2 of PDORE
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDORE
bits : 3 - 2 (0 bit)
access : read-write
Port Output Data Register F [BHW]
address_offset : 0x43C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDORF
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDORF
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDORF
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDORF
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDORF
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDORF
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDORF
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDORF
bits : 7 - 6 (0 bit)
access : read-write
Analog Input Setting Register [BHW]
address_offset : 0x500 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AN00 : Analog Input Ch.0 Setting Register
bits : 0 - -1 (0 bit)
access : read-write
AN01 : Analog Input Ch.1 Setting Register
bits : 1 - 0 (0 bit)
access : read-write
AN02 : Analog Input Ch.2 Setting Register
bits : 2 - 1 (0 bit)
access : read-write
AN03 : Analog Input Ch.3 Setting Register
bits : 3 - 2 (0 bit)
access : read-write
AN04 : Analog Input Ch.4 Setting Register
bits : 4 - 3 (0 bit)
access : read-write
AN05 : Analog Input Ch.5 Setting Register
bits : 5 - 4 (0 bit)
access : read-write
AN06 : Analog Input Ch.6 Setting Register
bits : 6 - 5 (0 bit)
access : read-write
AN07 : Analog Input Ch.7 Setting Register
bits : 7 - 6 (0 bit)
access : read-write
AN08 : Analog Input Ch.8 Setting Register
bits : 8 - 7 (0 bit)
access : read-write
AN09 : Analog Input Ch.9 Setting Register
bits : 9 - 8 (0 bit)
access : read-write
AN10 : Analog Input Ch.10 Setting Register
bits : 10 - 9 (0 bit)
access : read-write
AN11 : Analog Input Ch.11 Setting Register
bits : 11 - 10 (0 bit)
access : read-write
AN12 : Analog Input Ch.12 Setting Register
bits : 12 - 11 (0 bit)
access : read-write
AN13 : Analog Input Ch.13 Setting Register
bits : 13 - 12 (0 bit)
access : read-write
AN14 : Analog Input Ch.14 Setting Register
bits : 14 - 13 (0 bit)
access : read-write
AN15 : Analog Input Ch.15 Setting Register
bits : 15 - 14 (0 bit)
access : read-write
AN16 : Analog Input Ch.16 Setting Register
bits : 16 - 15 (0 bit)
access : read-write
AN17 : Analog Input Ch.17 Setting Register
bits : 17 - 16 (0 bit)
access : read-write
AN18 : Analog Input Ch.18 Setting Register
bits : 18 - 17 (0 bit)
access : read-write
AN19 : Analog Input Ch.19 Setting Register
bits : 19 - 18 (0 bit)
access : read-write
AN20 : Analog Input Ch.20 Setting Register
bits : 20 - 19 (0 bit)
access : read-write
AN21 : Analog Input Ch.21 Setting Register
bits : 21 - 20 (0 bit)
access : read-write
AN22 : Analog Input Ch.22 Setting Register
bits : 22 - 21 (0 bit)
access : read-write
AN23 : Analog Input Ch.23 Setting Register
bits : 23 - 22 (0 bit)
access : read-write
AN24 : Analog Input Ch.24 Setting Register
bits : 24 - 23 (0 bit)
access : read-write
AN25 : Analog Input Ch.25 Setting Register
bits : 25 - 24 (0 bit)
access : read-write
AN26 : Analog Input Ch.26 Setting Register
bits : 26 - 25 (0 bit)
access : read-write
AN27 : Analog Input Ch.27 Setting Register
bits : 27 - 26 (0 bit)
access : read-write
AN28 : Analog Input Ch.28 Setting Register
bits : 28 - 27 (0 bit)
access : read-write
AN29 : Analog Input Ch.29 Setting Register
bits : 29 - 28 (0 bit)
access : read-write
AN30 : Analog Input Ch.30 Setting Register
bits : 30 - 29 (0 bit)
access : read-write
AN31 : Analog Input Ch.31 Setting Register
bits : 31 - 30 (0 bit)
access : read-write
Special Port Setting Register [BHW]
address_offset : 0x580 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SUBXC : Sub Clock (Oscillation) Pin Setting Register
bits : 0 - 0 (1 bit)
access : read-write
MAINXC : Main Clock (Oscillation) Pin Setting bits
bits : 2 - 2 (1 bit)
access : read-write
USB0C : USB (ch.0) Pin Setting bit
bits : 4 - 3 (0 bit)
access : read-write
USB1C : USB (ch.1) Pin Setting bit
bits : 5 - 4 (0 bit)
access : read-write
Extended Pin Function Setting Register 00 [BHW]
address_offset : 0x600 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NMIS : NMIX Function Select bit
bits : 0 - -1 (0 bit)
access : read-write
CROUTE : Internal high-speed CR Oscillation Output Function Select bit
bits : 1 - 1 (1 bit)
access : read-write
RTCCOE : RTC clock output select bit
bits : 4 - 4 (1 bit)
access : read-write
SUBOUTE : Sub clock divide output function select bit
bits : 6 - 6 (1 bit)
access : read-write
USBP0E : USB ch.0 Function Select bit 1
bits : 9 - 8 (0 bit)
access : read-write
USBP1E : USB ch.1 Function Select bit 1
bits : 13 - 12 (0 bit)
access : read-write
JTAGEN0B : JTAG Function Select bit 0
bits : 16 - 15 (0 bit)
access : read-write
JTAGEN1S : JTAG Function Select bit 1
bits : 17 - 16 (0 bit)
access : read-write
TRC0E : TRACED Function Select bit 0
bits : 24 - 23 (0 bit)
access : read-write
TRC1E : TRACED Function Select bit 1
bits : 25 - 24 (0 bit)
access : read-write
TRC2E : TRACED Function Select bit 2
bits : 26 - 25 (0 bit)
access : read-write
TRC3E : TRACED Function Select bit 3
bits : 27 - 26 (0 bit)
access : read-write
Extended Pin Function Setting Register 01 [BHW]
address_offset : 0x604 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RTO00E : RTO00 Output Select bits
bits : 0 - 0 (1 bit)
access : read-write
RTO01E : RTO01 Output Select bits
bits : 2 - 2 (1 bit)
access : read-write
RTO02E : RTO02 Output Select bits
bits : 4 - 4 (1 bit)
access : read-write
RTO03E : RTO03 Output Select bits
bits : 6 - 6 (1 bit)
access : read-write
RTO04E : RTO04 Output Select bits
bits : 8 - 8 (1 bit)
access : read-write
RTO05E : RTO05 Output Select bits
bits : 10 - 10 (1 bit)
access : read-write
DTTI0C : DTTIX0 Function Select bit
bits : 12 - 11 (0 bit)
access : read-write
DTTI0S : DTTIX0 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write
FRCK0S : FRCK0 Input Select bits
bits : 18 - 18 (1 bit)
access : read-write
IC00S : IC00 Input Select bits
bits : 20 - 21 (2 bit)
access : read-write
IC01S : IC01 Input Select bits
bits : 23 - 24 (2 bit)
access : read-write
IC02S : IC02 Input Select bits
bits : 26 - 27 (2 bit)
access : read-write
IC03S : IC03 Input Select bits
bits : 29 - 30 (2 bit)
access : read-write
Extended Pin Function Setting Register 02 [BHW]
address_offset : 0x608 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RTO10E : RTO10 Output Select bits
bits : 0 - 0 (1 bit)
access : read-write
RTO11E : RTO11 Output Select bits
bits : 2 - 2 (1 bit)
access : read-write
RTO12E : RTO12 Output Select bits
bits : 4 - 4 (1 bit)
access : read-write
RTO13E : RTO13 Output Select bits
bits : 6 - 6 (1 bit)
access : read-write
RTO14E : RTO14 Output Select bits
bits : 8 - 8 (1 bit)
access : read-write
RTO15E : RTO15 Output Select bits
bits : 10 - 10 (1 bit)
access : read-write
DTTI1C : DTTIX1 Function Select bit
bits : 12 - 11 (0 bit)
access : read-write
DTTI1S : DTTIX1 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write
FRCK1S : FRCK1 Input Select bits
bits : 18 - 18 (1 bit)
access : read-write
IC10S : IC13 Input Select bits
bits : 20 - 21 (2 bit)
access : read-write
IC11S : IC13 Input Select bits
bits : 23 - 24 (2 bit)
access : read-write
IC12S : IC13 Input Select bits
bits : 26 - 27 (2 bit)
access : read-write
IC13S : IC13 Input Select bits
bits : 29 - 30 (2 bit)
access : read-write
Extended Pin Function Setting Register 03 [BHW]
address_offset : 0x60C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RTO20E : RTO20 Output Select bits
bits : 0 - 0 (1 bit)
access : read-write
RTO21E : RTO21 Output Select bits
bits : 2 - 2 (1 bit)
access : read-write
RTO22E : RTO22 Output Select bits
bits : 4 - 4 (1 bit)
access : read-write
RTO23E : RTO23 Output Select bits
bits : 6 - 6 (1 bit)
access : read-write
RTO24E : RTO24 Output Select bits
bits : 8 - 8 (1 bit)
access : read-write
RTO25E : RTO25 Output Select bits
bits : 10 - 10 (1 bit)
access : read-write
DTTI2C : DTTIX2 Function Select bit
bits : 12 - 11 (0 bit)
access : read-write
DTTI2S : DTTIX2 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write
FRCK2S : FRCK2 Input Select bits
bits : 18 - 18 (1 bit)
access : read-write
IC20S : IC23 Input Select bits
bits : 20 - 21 (2 bit)
access : read-write
IC21S : IC23 Input Select bits
bits : 23 - 24 (2 bit)
access : read-write
IC22S : IC23 Input Select bits
bits : 26 - 27 (2 bit)
access : read-write
IC23S : IC23 Input Select bits
bits : 29 - 30 (2 bit)
access : read-write
Extended Pin Function Setting Register 04 [BHW]
address_offset : 0x610 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIOA0E : TIOA0 Output Select bits
bits : 2 - 2 (1 bit)
access : read-write
TIOB0S : TIOB0 Input Select bits
bits : 4 - 5 (2 bit)
access : read-write
TIOA1S : TIOA1 Input Select bits
bits : 8 - 8 (1 bit)
access : read-write
TIOA1E : TIOA1 Output Select bits
bits : 10 - 10 (1 bit)
access : read-write
TIOB1S : TIOB1 Input Select bits
bits : 12 - 12 (1 bit)
access : read-write
TIOA2E : TIOA2 Output Select bits
bits : 18 - 18 (1 bit)
access : read-write
TIOB2S : TIOB2 Input Select bits
bits : 20 - 20 (1 bit)
access : read-write
TIOA3S : TIOA3 Input Select bits
bits : 24 - 24 (1 bit)
access : read-write
TIOA3E : TIOA3 Output Select bits
bits : 26 - 26 (1 bit)
access : read-write
TIOB3S : TIOB3 Input Select bits
bits : 28 - 28 (1 bit)
access : read-write
Extended Pin Function Setting Register 05 [BHW]
address_offset : 0x614 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIOA4E : TIOA4 Output Select bits
bits : 2 - 2 (1 bit)
access : read-write
TIOB4S : TIOB4 Input Select bits
bits : 4 - 4 (1 bit)
access : read-write
TIOA5S : TIOA5 Input Select bits
bits : 8 - 8 (1 bit)
access : read-write
TIOA5E : TIOA5 Output Select bits
bits : 10 - 10 (1 bit)
access : read-write
TIOB5S : TIOB5 Input Select bits
bits : 12 - 12 (1 bit)
access : read-write
TIOA6E : TIOA6 Output Select bits
bits : 18 - 18 (1 bit)
access : read-write
TIOB6S : TIOB6 Input Select bits
bits : 20 - 20 (1 bit)
access : read-write
TIOA7S : TIOA7 Input Select bits
bits : 24 - 24 (1 bit)
access : read-write
TIOA7E : TIOA7 Output Select bits
bits : 26 - 26 (1 bit)
access : read-write
TIOB7S : TIOB7 Input Select bits
bits : 28 - 28 (1 bit)
access : read-write
Extended Pin Function Setting Register 06 [BHW]
address_offset : 0x618 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EINT00S : External Interrupt 00 Input Select bits
bits : 0 - 0 (1 bit)
access : read-write
EINT01S : External Interrupt 01 Input Select bits
bits : 2 - 2 (1 bit)
access : read-write
EINT02S : External Interrupt 02 Input Select bits
bits : 4 - 4 (1 bit)
access : read-write
EINT03S : External Interrupt 03 Input Select bits
bits : 6 - 6 (1 bit)
access : read-write
EINT04S : External Interrupt 04 Input Select bits
bits : 8 - 8 (1 bit)
access : read-write
EINT05S : External Interrupt 05 Input Select bits
bits : 10 - 10 (1 bit)
access : read-write
EINT06S : External Interrupt 06 Input Select bits
bits : 12 - 12 (1 bit)
access : read-write
EINT07S : External Interrupt 07 Input Select bits
bits : 14 - 14 (1 bit)
access : read-write
EINT08S : External Interrupt 08 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write
EINT09S : External Interrupt 09 Input Select bits
bits : 18 - 18 (1 bit)
access : read-write
EINT10S : External Interrupt 10 Input Select bits
bits : 20 - 20 (1 bit)
access : read-write
EINT11S : External Interrupt 11 Input Select bits
bits : 22 - 22 (1 bit)
access : read-write
EINT12S : External Interrupt 12 Input Select bits
bits : 24 - 24 (1 bit)
access : read-write
EINT13S : External Interrupt 13 Input Select bits
bits : 26 - 26 (1 bit)
access : read-write
EINT14S : External Interrupt 14 Input Select bits
bits : 28 - 28 (1 bit)
access : read-write
EINT15S : External Interrupt 15 Input Select bits
bits : 30 - 30 (1 bit)
access : read-write
Extended Pin Function Setting Register 07 [BHW]
address_offset : 0x61C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SIN0S : SIN0 Input Select bits
bits : 4 - 4 (1 bit)
access : read-write
SOT0B : SOT0 Input/Output Select bits
bits : 6 - 6 (1 bit)
access : read-write
SCK0B : SCK0 Input/Output Select bits
bits : 8 - 8 (1 bit)
access : read-write
SIN1S : SIN1 Input Select bits
bits : 10 - 10 (1 bit)
access : read-write
SOT1B : SOT1 Input/Output Select bits
bits : 12 - 12 (1 bit)
access : read-write
SCK1B : SCK1 Input/Output Select bits
bits : 14 - 14 (1 bit)
access : read-write
SIN2S : SIN2 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write
SOT2B : SOT2 Input/Output Select bits
bits : 18 - 18 (1 bit)
access : read-write
SCK2B : SCK2 Input/Output Select bits
bits : 20 - 20 (1 bit)
access : read-write
SIN3S : SIN3 Input Select bits
bits : 22 - 22 (1 bit)
access : read-write
SOT3B : SOT3 Input/Output Select bits
bits : 24 - 24 (1 bit)
access : read-write
SCK3B : SCK3 Input/Output Select bits
bits : 26 - 26 (1 bit)
access : read-write
Extended Pin Function Setting Register 08 [BHW]
address_offset : 0x620 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RTS4E : RTS4 Input/Output Select bits
bits : 0 - 0 (1 bit)
access : read-write
CTS4S : CTS4 Input/Output Select bits
bits : 2 - 2 (1 bit)
access : read-write
SIN4S : SIN4 Input Select bits
bits : 4 - 4 (1 bit)
access : read-write
SOT4B : SOT4 Input/Output Select bits
bits : 6 - 6 (1 bit)
access : read-write
SCK4B : SCK4 Input/Output Select bits
bits : 8 - 8 (1 bit)
access : read-write
SIN5S : SIN5 Input Select bits
bits : 10 - 10 (1 bit)
access : read-write
SOT5B : SOT5 Input/Output Select bits
bits : 12 - 12 (1 bit)
access : read-write
SCK5B : SCK5 Input/Output Select bits
bits : 14 - 14 (1 bit)
access : read-write
SIN6S : SIN6 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write
SOT6B : SOT6 Input/Output Select bits
bits : 18 - 18 (1 bit)
access : read-write
SCK6B : SCK6 Input/Output Select bits
bits : 20 - 20 (1 bit)
access : read-write
SIN7S : SIN7 Input Select bits
bits : 22 - 22 (1 bit)
access : read-write
SOT7B : SOT7 Input/Output Select bits
bits : 24 - 24 (1 bit)
access : read-write
SCK7B : SCK7 Input/Output Select bits
bits : 26 - 26 (1 bit)
access : read-write
RTS5E : RTS5 Input/Output Select bits
bits : 28 - 28 (1 bit)
access : read-write
CTS5S : CTS5 Input/Output Select bits
bits : 30 - 30 (1 bit)
access : read-write
Extended Pin Function Setting Register 09 [BHW]
address_offset : 0x624 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QAIN0S : QAIN0S Input Select bits
bits : 0 - 0 (1 bit)
access : read-write
QBIN0S : QBIN0S Input Select bits
bits : 2 - 2 (1 bit)
access : read-write
QZIN0S : QZIN0S Input Select bits
bits : 4 - 4 (1 bit)
access : read-write
QAIN1S : QAIN1S Input Select bits
bits : 6 - 6 (1 bit)
access : read-write
QBIN1S : QBIN1S Input Select bits
bits : 8 - 8 (1 bit)
access : read-write
QZIN1S : QZIN1S Input Select bits
bits : 10 - 10 (1 bit)
access : read-write
ADTRG0S : ADTRG0 Input Select bits
bits : 12 - 14 (3 bit)
access : read-write
ADTRG1S : ADTRG1 Input Select bits
bits : 16 - 18 (3 bit)
access : read-write
ADTRG2S : ADTRG2 Input Select bits
bits : 20 - 22 (3 bit)
access : read-write
CRX0S : CRX0S Input Select bits
bits : 24 - 24 (1 bit)
access : read-write
CTX0E : CTX0E Output Select bits
bits : 26 - 26 (1 bit)
access : read-write
CRX1S : CRX1S Input Select bits
bits : 28 - 28 (1 bit)
access : read-write
CTX1E : CTX1E Output Select bits
bits : 30 - 30 (1 bit)
access : read-write
Extended Pin Function Setting Register 10 [BHW]
address_offset : 0x628 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UEDEFB : UEDEFB Input/Output Select bit
bits : 0 - -1 (0 bit)
access : read-write
UEDTHB : UEDTHB Input/Output Select bit
bits : 1 - 0 (0 bit)
access : read-write
UECLKE : UECLKE Output Select bit
bits : 2 - 1 (0 bit)
access : read-write
UEWEXE : UEWEXE Output Select bit
bits : 3 - 2 (0 bit)
access : read-write
UEDQME : UEDQME Output Select bit
bits : 4 - 3 (0 bit)
access : read-write
UEOEXE : UEOEXE Output Select bit
bits : 5 - 4 (0 bit)
access : read-write
UEFLSE : UEFLSE Output Select bit
bits : 6 - 5 (0 bit)
access : read-write
UECS1E : UECS1E Output Select bit
bits : 7 - 6 (0 bit)
access : read-write
UECS2E : UECS2E Output Select bit
bits : 8 - 7 (0 bit)
access : read-write
UECS3E : UECS3E Output Select bit
bits : 9 - 8 (0 bit)
access : read-write
UECS4E : UECS4E Output Select bit
bits : 10 - 9 (0 bit)
access : read-write
UECS5E : UECS5E Output Select bit
bits : 11 - 10 (0 bit)
access : read-write
UECS6E : UECS6E Output Select bit
bits : 12 - 11 (0 bit)
access : read-write
UECS7E : UECS7E Output Select bit
bits : 13 - 12 (0 bit)
access : read-write
UEAOOE : UEAOOE Output Select bit
bits : 14 - 13 (0 bit)
access : read-write
UEA08E : UEA08E Output Select bit
bits : 15 - 14 (0 bit)
access : read-write
UEA09E : UEA09E Output Select bit
bits : 16 - 15 (0 bit)
access : read-write
UEA10E : UEA10E Output Select bit
bits : 17 - 16 (0 bit)
access : read-write
UEA11E : UEA11E Output Select bit
bits : 18 - 17 (0 bit)
access : read-write
UEA12E : UEA12E Output Select bit
bits : 19 - 18 (0 bit)
access : read-write
UEA13E : UEA13E Output Select bit
bits : 20 - 19 (0 bit)
access : read-write
UEA14E : UEA14E Output Select bit
bits : 21 - 20 (0 bit)
access : read-write
UEA15E : UEA15E Output Select bit
bits : 22 - 21 (0 bit)
access : read-write
UEA16E : UEA16E Output Select bit
bits : 23 - 22 (0 bit)
access : read-write
UEA17E : UEA17E Output Select bit
bits : 24 - 23 (0 bit)
access : read-write
UEA18E : UEA18E Output Select bit
bits : 25 - 24 (0 bit)
access : read-write
UEA19E : UEA19E Output Select bit
bits : 26 - 25 (0 bit)
access : read-write
UEA20E : UEA20E Output Select bit
bits : 27 - 26 (0 bit)
access : read-write
UEA21E : UEA21E Output Select bit
bits : 28 - 27 (0 bit)
access : read-write
UEA22E : UEA22E Output Select bit
bits : 29 - 28 (0 bit)
access : read-write
UEA23E : UEA23E Output Select bit
bits : 30 - 29 (0 bit)
access : read-write
UEA24E : UEA24E Output Select bit
bits : 31 - 30 (0 bit)
access : read-write
Extended Pin Function Setting Register 11 [BHW]
address_offset : 0x62C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UEALEE : UEALEE Output Select bit
bits : 0 - -1 (0 bit)
access : read-write
UECS0E : UECS0E Output Select bit
bits : 1 - 0 (0 bit)
access : read-write
UEA01E : UEA01E Output Select bit
bits : 2 - 1 (0 bit)
access : read-write
UEA02E : UEA02E Output Select bit
bits : 3 - 2 (0 bit)
access : read-write
UEA03E : UEA03E Output Select bit
bits : 4 - 3 (0 bit)
access : read-write
UEA04E : UEA04E Output Select bit
bits : 5 - 4 (0 bit)
access : read-write
UEA05E : UEA05E Output Select bit
bits : 6 - 5 (0 bit)
access : read-write
UEA06E : UEA06E Output Select bit
bits : 7 - 6 (0 bit)
access : read-write
UEA07E : UEA07E Output Select bit
bits : 8 - 7 (0 bit)
access : read-write
UED00B : UED00B Input/Output Select bit
bits : 9 - 8 (0 bit)
access : read-write
UED01B : UED01B Input/Output Select bit
bits : 10 - 9 (0 bit)
access : read-write
UED02B : UED02B Input/Output Select bit
bits : 11 - 10 (0 bit)
access : read-write
UED03B : UED03B Input/Output Select bit
bits : 12 - 11 (0 bit)
access : read-write
UED04B : UED04B Input/Output Select bit
bits : 13 - 12 (0 bit)
access : read-write
UED05B : UED05B Input/Output Select bit
bits : 14 - 13 (0 bit)
access : read-write
UED06B : UED06B Input/Output Select bit
bits : 15 - 14 (0 bit)
access : read-write
UED07B : UED07B Input/Output Select bit
bits : 16 - 15 (0 bit)
access : read-write
UED08B : UED08B Input/Output Select bit
bits : 17 - 16 (0 bit)
access : read-write
UED09B : UED09B Input/Output Select bit
bits : 18 - 17 (0 bit)
access : read-write
UED10B : UED10B Input/Output Select bit
bits : 19 - 18 (0 bit)
access : read-write
UED11B : UED11B Input/Output Select bit
bits : 20 - 19 (0 bit)
access : read-write
UED12B : UED12B Input/Output Select bit
bits : 21 - 20 (0 bit)
access : read-write
UED13B : UED13B Input/Output Select bit
bits : 22 - 21 (0 bit)
access : read-write
UED14B : UED14B Input/Output Select bit
bits : 23 - 22 (0 bit)
access : read-write
UED15B : UED15B Input/Output Select bit
bits : 24 - 23 (0 bit)
access : read-write
UERLC : UERLC relocation select bit
bits : 25 - 24 (0 bit)
access : read-write
Extended Pin Function Setting Register 12 [BHW]
address_offset : 0x630 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIOA8E : TIOA8 Output Select bits
bits : 2 - 2 (1 bit)
access : read-write
TIOB8S : TIOB8 Input Select bits
bits : 4 - 4 (1 bit)
access : read-write
TIOA9S : TIOA9 Input Select bits
bits : 8 - 8 (1 bit)
access : read-write
TIOA9E : TIOA9 Output Select bits
bits : 10 - 10 (1 bit)
access : read-write
TIOB9S : TIOB9 Input Select bits
bits : 12 - 12 (1 bit)
access : read-write
TIOA10E : TIOA10 Output Select bits
bits : 18 - 18 (1 bit)
access : read-write
TIOB10S : TIOB10 Input Select bits
bits : 20 - 20 (1 bit)
access : read-write
TIOA11S : TIOA11 Input Select bits
bits : 24 - 24 (1 bit)
access : read-write
TIOA11E : TIOA11 Output Select bits
bits : 26 - 26 (1 bit)
access : read-write
TIOB11S : TIOB11 Input Select bits
bits : 28 - 28 (1 bit)
access : read-write
Extended Pin Function Setting Register 13 [BHW]
address_offset : 0x634 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIOA12E : TIOA12 Output Select bits
bits : 2 - 2 (1 bit)
access : read-write
TIOB12S : TIOB12 Input Select bits
bits : 4 - 4 (1 bit)
access : read-write
TIOA13S : TIOA13 Input Select bits
bits : 8 - 8 (1 bit)
access : read-write
TIOA13E : TIOA13 Output Select bits
bits : 10 - 10 (1 bit)
access : read-write
TIOB13S : TIOB13 Input Select bits
bits : 12 - 12 (1 bit)
access : read-write
TIOA14E : TIOA14 Output Select bits
bits : 18 - 18 (1 bit)
access : read-write
TIOB14S : TIOB14 Input Select bits
bits : 20 - 20 (1 bit)
access : read-write
TIOA15S : TIOA15 Input Select bits
bits : 24 - 24 (1 bit)
access : read-write
TIOA15E : TIOA15 Output Select bits
bits : 26 - 26 (1 bit)
access : read-write
TIOB15S : TIOB15 Input Select bits
bits : 28 - 28 (1 bit)
access : read-write
Extended Pin Function Setting Register 14 [BHW]
address_offset : 0x638 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QAIN2S : QDU-ch.2 AIN Input Pin bits
bits : 0 - 0 (1 bit)
access : read-write
QBIN2S : QDU-ch.2 BIN Input Pin bits
bits : 2 - 2 (1 bit)
access : read-write
QZIN2S : QDU-ch.2 ZIN Input Pin bits
bits : 4 - 4 (1 bit)
access : read-write
E_TD0E : E_TX00/E_TX01 Output Select bit
bits : 18 - 17 (0 bit)
access : read-write
E_TD1E : E_TX02_TX10/E_TX03_TX11 Output Select bit
bits : 19 - 18 (0 bit)
access : read-write
E_TE0E : E_TXEN0 Output Select bit
bits : 20 - 19 (0 bit)
access : read-write
E_TE1E : E_TXER0_TXEN1 Output Select bit
bits : 21 - 20 (0 bit)
access : read-write
E_MC0E : E_MDC0 Output Select bit
bits : 22 - 21 (0 bit)
access : read-write
E_MC1B : E_MDC1 I/O Select bit
bits : 23 - 22 (0 bit)
access : read-write
E_MD0B : E_MDO0 I/O Select bit
bits : 24 - 23 (0 bit)
access : read-write
E_MD1B : E_MDO1 I/O Select bit
bits : 25 - 24 (0 bit)
access : read-write
E_CKE : E_COUT Output Select bit
bits : 26 - 25 (0 bit)
access : read-write
E_PSE : PPS0_PPS1 Output Select bit for Ethernet-MAC
bits : 27 - 26 (0 bit)
access : read-write
E_SPLC : Input cutoff Select bit in Standby of input Pin for Ethernet-MAC
bits : 28 - 28 (1 bit)
access : read-write
Extended Pin Function Setting Register 15 [BHW]
address_offset : 0x63C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EINT16S : External Interrupt 16 Input Select bits
bits : 0 - 0 (1 bit)
access : read-write
EINT17S : External Interrupt 17 Input Select bits
bits : 2 - 2 (1 bit)
access : read-write
EINT18S : External Interrupt 18 Input Select bits
bits : 4 - 4 (1 bit)
access : read-write
EINT19S : External Interrupt 19 Input Select bits
bits : 6 - 6 (1 bit)
access : read-write
EINT20S : External Interrupt 20 Input Select bits
bits : 8 - 8 (1 bit)
access : read-write
EINT21S : External Interrupt 21 Input Select bits
bits : 10 - 10 (1 bit)
access : read-write
EINT22S : External Interrupt 22 Input Select bits
bits : 12 - 12 (1 bit)
access : read-write
EINT23S : External Interrupt 23 Input Select bits
bits : 14 - 14 (1 bit)
access : read-write
EINT24S : External Interrupt 24 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write
EINT25S : External Interrupt 25 Input Select bits
bits : 18 - 18 (1 bit)
access : read-write
EINT26S : External Interrupt 26 Input Select bits
bits : 20 - 20 (1 bit)
access : read-write
EINT27S : External Interrupt 27 Input Select bits
bits : 22 - 22 (1 bit)
access : read-write
EINT28S : External Interrupt 28 Input Select bits
bits : 24 - 24 (1 bit)
access : read-write
EINT29S : External Interrupt 29 Input Select bits
bits : 26 - 26 (1 bit)
access : read-write
EINT30S : External Interrupt 30 Input Select bits
bits : 28 - 28 (1 bit)
access : read-write
EINT31S : External Interrupt 31 Input Select bits
bits : 30 - 30 (1 bit)
access : read-write
Extended Pin Function Setting Register 16 [BHW]
address_offset : 0x640 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SCS6B : SCS6 Select bits
bits : 0 - 0 (1 bit)
access : read-write
SCS7B : SCS7 Input/Output Select bits
bits : 2 - 2 (1 bit)
access : read-write
SIN8S : SIN8 Input Select bits
bits : 4 - 4 (1 bit)
access : read-write
SOT8B : SOT8 Input/Output Select bits
bits : 6 - 6 (1 bit)
access : read-write
SCK8B : SCK8 Input/Output Select bits
bits : 8 - 8 (1 bit)
access : read-write
SIN9S : SIN9 Input Select bits
bits : 10 - 10 (1 bit)
access : read-write
SOT9B : SOT9 Input/Output Select bits
bits : 12 - 12 (1 bit)
access : read-write
SCK9B : SCK9 Input/Output Select bits
bits : 14 - 14 (1 bit)
access : read-write
SIN10S : SIN10 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write
SOT10B : SOT10 Input/Output Select bits
bits : 18 - 18 (1 bit)
access : read-write
SCK10B : SCK10 Input/Output Select bits
bits : 20 - 20 (1 bit)
access : read-write
SIN11S : SIN11 Input Select bits
bits : 22 - 22 (1 bit)
access : read-write
SOT11B : SOT11 Input/Output Select bits
bits : 24 - 24 (1 bit)
access : read-write
SCK11B : SCK11 Input/Output Select bits
bits : 26 - 26 (1 bit)
access : read-write
SFMPAC : MFS ch.A I2C FastMode+ Select bit
bits : 28 - 27 (0 bit)
access : read-write
SFMPBC : MFS ch.B I2C FastMode+ Select bit
bits : 29 - 28 (0 bit)
access : read-write
Extended Pin Function Setting Register 17 [BHW]
address_offset : 0x644 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SIN12S : SIN12 Input Select bits
bits : 4 - 4 (1 bit)
access : read-write
SOT12B : SOT12 Input/Output Select bits
bits : 6 - 6 (1 bit)
access : read-write
SCK12B : SCK12 Input/Output Select bits
bits : 8 - 8 (1 bit)
access : read-write
SIN13S : SIN13 Input Select bits
bits : 10 - 10 (1 bit)
access : read-write
SOT13B : SOT13 Input/Output Select bits
bits : 12 - 12 (1 bit)
access : read-write
SCK13B : SCK13 Input/Output Select bits
bits : 14 - 14 (1 bit)
access : read-write
SIN14S : SIN14 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write
SOT14B : SOT14 Input/Output Select bits
bits : 18 - 18 (1 bit)
access : read-write
SCK14B : SCK14 Input/Output Select bits
bits : 20 - 20 (1 bit)
access : read-write
SIN15S : SIN15 Input Select bits
bits : 22 - 22 (1 bit)
access : read-write
SOT15B : SOT15 Input/Output Select bits
bits : 24 - 24 (1 bit)
access : read-write
SCK15B : SCK15 Input/Output Select bits
bits : 26 - 26 (1 bit)
access : read-write
Extended Pin Function Setting Register 18 [BHW]
address_offset : 0x648 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QAIN3S : QDU-ch3 AIN input select bits
bits : 4 - 4 (1 bit)
access : read-write
QBIN3S : QDU-ch3 BIN input select bits
bits : 6 - 6 (1 bit)
access : read-write
QZIN3S : QDU-ch3 ZIN input select bits
bits : 8 - 8 (1 bit)
access : read-write
SDCLKE : S_CLK output select bits
bits : 14 - 14 (1 bit)
access : read-write
SDCMDB : S_CMD input/output select bits
bits : 16 - 16 (1 bit)
access : read-write
SDDATA0B : SDDATA0 input/output select bits
bits : 18 - 18 (1 bit)
access : read-write
SDDATA1B : SDDATA1 input/output select bits
bits : 20 - 20 (1 bit)
access : read-write
SDDATA2B : SDDATA2 input/output select bits
bits : 22 - 22 (1 bit)
access : read-write
SDDATA3B : SDDATA3 input/output select bits
bits : 24 - 24 (1 bit)
access : read-write
SDCDS : S_CD input select bits
bits : 26 - 26 (1 bit)
access : read-write
SDWPS : S_WP input select bits
bits : 28 - 28 (1 bit)
access : read-write
Extended Pin Function Setting Register 19 [BHW]
address_offset : 0x64C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Extended Pin Function Setting Register 20 [BHW]
address_offset : 0x650 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UESMCKE : UESMCKE output select bit
bits : 0 - -1 (0 bit)
access : read-write
UESMCEE : UESMCEE output select bit
bits : 1 - 0 (0 bit)
access : read-write
UERASE : UERASE output select bit
bits : 2 - 1 (0 bit)
access : read-write
UECASE : UECASE output select bit
bits : 3 - 2 (0 bit)
access : read-write
UEDWEXE : UEDWEXE output select bit
bits : 4 - 3 (0 bit)
access : read-write
UECSXE : UECSXE output select bit
bits : 5 - 4 (0 bit)
access : read-write
UEDQM2E : UEDQM2E output select bit
bits : 6 - 5 (0 bit)
access : read-write
UEDQM3E : UEDQM3E output select bit
bits : 7 - 6 (0 bit)
access : read-write
UEDTHHB : UEDTHHB input/output select bit
bits : 8 - 7 (0 bit)
access : read-write
UED16B : UED16B input/output select bit
bits : 9 - 8 (0 bit)
access : read-write
UED17B : UED17B input/output select bit
bits : 10 - 9 (0 bit)
access : read-write
UED18B : UED18B input/output select bit
bits : 11 - 10 (0 bit)
access : read-write
UED19B : UED19B input/output select bit
bits : 12 - 11 (0 bit)
access : read-write
UED20B : UED20B input/output select bit
bits : 13 - 12 (0 bit)
access : read-write
UED21B : UED21B input/output select bit
bits : 14 - 13 (0 bit)
access : read-write
UED22B : UED22B input/output select bit
bits : 15 - 14 (0 bit)
access : read-write
UED23B : UED23B input/output select bit
bits : 16 - 15 (0 bit)
access : read-write
UED24B : UED24B input/output select bit
bits : 17 - 16 (0 bit)
access : read-write
UED25B : UED25B input/output select bit
bits : 18 - 17 (0 bit)
access : read-write
UED26B : UED26B input/output select bit
bits : 19 - 18 (0 bit)
access : read-write
UED27B : UED27B input/output select bit
bits : 20 - 19 (0 bit)
access : read-write
UED28B : UED28B input/output select bit
bits : 21 - 20 (0 bit)
access : read-write
UED29B : UED29B input/output select bit
bits : 22 - 21 (0 bit)
access : read-write
UED30B : UED30B input/output select bit
bits : 23 - 22 (0 bit)
access : read-write
UED31B : UED31B input/output select bit
bits : 24 - 23 (0 bit)
access : read-write
Extended Pin Function Setting Register 21 [BHW]
address_offset : 0x654 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Extended Pin Function Setting Register 22 [BHW]
address_offset : 0x658 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Extended Pin Function Setting Register 23 [BHW]
address_offset : 0x65C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SCS60E : SCS60 Input Select bits
bits : 0 - 0 (1 bit)
access : read-write
SCS61E : SCS61 Input Select bits
bits : 2 - 2 (1 bit)
access : read-write
SCS62E : SCS62 Input Select bits
bits : 4 - 4 (1 bit)
access : read-write
SCS63E : SCS63 Input Select bits
bits : 6 - 6 (1 bit)
access : read-write
SCS70E : SCS70 Input Select bits
bits : 8 - 8 (1 bit)
access : read-write
SCS71E : SCS71 Input Select bits
bits : 10 - 10 (1 bit)
access : read-write
SCS72E : SCS72 Input Select bits
bits : 12 - 12 (1 bit)
access : read-write
SCS73E : SCS73 Input Select bits
bits : 14 - 14 (1 bit)
access : read-write
Extended Pin Function Setting Register 24 [BHW]
address_offset : 0x660 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
I2SM4_MCLK0S : I2SMCLK0 Input Select bits
bits : 0 - 0 (1 bit)
access : read-write
I2SM4_MCLK0E : I2SMCLK0 Output Select bits
bits : 2 - 2 (1 bit)
access : read-write
I2SM4_SCK0B : I2SCK0 Input/Output Select bits
bits : 4 - 4 (1 bit)
access : read-write
I2SM4_WS0B : I2SWS0 Input/Output Select bits
bits : 6 - 6 (1 bit)
access : read-write
I2SM4_SDI0S : I2SDI0 Input Select bits
bits : 8 - 8 (1 bit)
access : read-write
I2SM4_SDO0E : I2SDO0 Output Select bits
bits : 10 - 10 (1 bit)
access : read-write
I2SM4_MCLK1S : I2SMCLK1 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write
I2SM4_MCLK1E : I2SMCLK1 Output Select bits
bits : 18 - 18 (1 bit)
access : read-write
I2SM4_SCK1B : I2SCK1 Input/Output Select bits
bits : 20 - 20 (1 bit)
access : read-write
I2SM4_WS1B : I2SWS1 Input/Output Select bits
bits : 22 - 22 (1 bit)
access : read-write
I2SM4_SDI1S : I2SDI1 Input Select bits
bits : 24 - 24 (1 bit)
access : read-write
I2SM4_SDO1E : I2SDO1 Output Select bits
bits : 26 - 26 (1 bit)
access : read-write
Extended Pin Function Setting Register 25 [BHW]
address_offset : 0x664 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCRX2S : RX2 Input Select bits
bits : 0 - 0 (1 bit)
access : read-write
MCTX2E : TX2 Output Select bits
bits : 2 - 2 (1 bit)
access : read-write
Extended Pin Function Setting Register 26 [BHW]
address_offset : 0x668 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Q_SCKB : Q_SCK Input Select bits
bits : 0 - 0 (1 bit)
access : read-write
Q_CS0E : Q_CS0 Input Select bits
bits : 2 - 2 (1 bit)
access : read-write
Q_CS1E : Q_CS1 Input Select bits
bits : 4 - 4 (1 bit)
access : read-write
Q_CS2E : Q_CS2 Input Select bits
bits : 6 - 6 (1 bit)
access : read-write
Q_CS3E : Q_CS3 Input Select bits
bits : 8 - 8 (1 bit)
access : read-write
Q_IO0B : Q_IO0 Input Select bits
bits : 10 - 10 (1 bit)
access : read-write
Q_IO1B : Q_IO1 Input Select bits
bits : 12 - 12 (1 bit)
access : read-write
Q_IO2B : Q_IO2 Input Select bits
bits : 14 - 14 (1 bit)
access : read-write
Q_IO3B : Q_IO3 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write
Extended Pin Function Setting Regster 33 [BHW]
address_offset : 0x684 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CIN0S : IC0_CIN Input Select bits
bits : 0 - 0 (1 bit)
access : read-write
DATA0B : IC0_DATA Input/Output Select bits
bits : 2 - 2 (1 bit)
access : read-write
RST0E : IC0_RST Output Select bits
bits : 4 - 4 (1 bit)
access : read-write
VPEN0E : IC0_VPEN Output Select bits
bits : 6 - 6 (1 bit)
access : read-write
VCC0E : IC0_VCC Output Select bits
bits : 8 - 8 (1 bit)
access : read-write
CLK0E : IC0_CLK Output Select bits
bits : 10 - 10 (1 bit)
access : read-write
CIN1S : IC1_CIN Input Select bits
bits : 16 - 16 (1 bit)
access : read-write
DATA1B : IC1_DATA Input/Output Select bits
bits : 18 - 18 (1 bit)
access : read-write
RST1E : IC1_RST Output Select bits
bits : 20 - 20 (1 bit)
access : read-write
VPEN1E : IC1_VPEN Output Select bits
bits : 22 - 22 (1 bit)
access : read-write
VCC1E : IC1_VCC Output Select bits
bits : 24 - 24 (1 bit)
access : read-write
CLK1E : IC1_CLK Oputput Select bits
bits : 26 - 26 (1 bit)
access : read-write
Extended Pin Function Setting Regster 35 [BHW]
address_offset : 0x68C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCK1S : MI2SMCK1 Input Select bits
bits : 16 - 16 (1 bit)
access : read-write
MCK1E : MI2SMCK1 Output Select bits
bits : 18 - 18 (1 bit)
access : read-write
SCK1B : MI2SCK1 Output Select bits
bits : 20 - 20 (1 bit)
access : read-write
WS1B : MI2SWS1 Output Select bits
bits : 22 - 22 (1 bit)
access : read-write
SDI1S : MI2SDI1 Input Select bits
bits : 24 - 24 (1 bit)
access : read-write
SDO1E : MI2SDO1 Output Select bits
bits : 26 - 26 (1 bit)
access : read-write
Port Pseudo Open Drain Setting Register 0 [BHW]
address_offset : 0x700 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PZR0
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PZR0
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PZR0
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PZR0
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PZR0
bits : 4 - 3 (0 bit)
access : read-write
P8 : Bit8 of PZR0
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PZR0
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PZR0
bits : 10 - 9 (0 bit)
access : read-write
Port Pseudo Open Drain Setting Register 1 [BHW]
address_offset : 0x704 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PZR1
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PZR1
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PZR1
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PZR1
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PZR1
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PZR1
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PZR1
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PZR1
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PZR1
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PZR1
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PZR1
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PZR1
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PZR1
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PZR1
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PZR1
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PZR1
bits : 15 - 14 (0 bit)
access : read-write
Port Pseudo Open Drain Setting Register 2 [BHW]
address_offset : 0x708 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PZR2
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PZR2
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PZR2
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PZR2
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PZR2
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PZR2
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PZR2
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PZR2
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PZR2
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PZR2
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PZR2
bits : 10 - 9 (0 bit)
access : read-write
Port Pseudo Open Drain Setting Register 3 [BHW]
address_offset : 0x70C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PZR3
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PZR3
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PZR3
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PZR3
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PZR3
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PZR3
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PZR3
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PZR3
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PZR3
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PZR3
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PZR3
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PZR3
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PZR3
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PZR3
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PZR3
bits : 14 - 13 (0 bit)
access : read-write
Port Pseudo Open Drain Setting Register 4 [BHW]
address_offset : 0x710 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PZR4
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PZR4
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PZR4
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PZR4
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PZR4
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PZR4
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PZR4
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PZR4
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PZR4
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PZR4
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PZR4
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PZR4
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PZR4
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PZR4
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PZR4
bits : 14 - 13 (0 bit)
access : read-write
Port Pseudo Open Drain Setting Register 5 [BHW]
address_offset : 0x714 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PZR5
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PZR5
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PZR5
bits : 2 - 1 (0 bit)
access : read-write
PD : Bit13 of PZR5
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PZR5
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PZR5
bits : 15 - 14 (0 bit)
access : read-write
Port Pseudo Open Drain Setting Register 6 [BHW]
address_offset : 0x718 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PZR6
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PZR6
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PZR6
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PZR6
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PZR6
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PZR6
bits : 5 - 4 (0 bit)
access : read-write
PE : Bit14 of PZR6
bits : 14 - 13 (0 bit)
access : read-write
Port Pseudo Open Drain Setting Register 7 [BHW]
address_offset : 0x71C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PZR7
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PZR7
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PZR7
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PZR7
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PZR7
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PZR7
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PZR7
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PZR7
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PZR7
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PZR7
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PZR7
bits : 10 - 9 (0 bit)
access : read-write
Port Pseudo Open Drain Setting Register 8 [BHW]
address_offset : 0x720 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PZR8
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PZR8
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PZR8
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PZR8
bits : 3 - 2 (0 bit)
access : read-write
Port Pseudo Open Drain Setting Register 9 [BHW]
address_offset : 0x724 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PZR9
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PZR9
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PZR9
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PZR9
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PZR9
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PZR9
bits : 5 - 4 (0 bit)
access : read-write
Port Pseudo Open Drain Setting Register A [BHW]
address_offset : 0x728 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PZRA
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PZRA
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PZRA
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PZRA
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PZRA
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PZRA
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PZRA
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PZRA
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PZRA
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PZRA
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PZRA
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PZRA
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PZRA
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PZRA
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PZRA
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PZRA
bits : 15 - 14 (0 bit)
access : read-write
Port Pseudo Open Drain Setting Register B [BHW]
address_offset : 0x72C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PZRB
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PZRB
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PZRB
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PZRB
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PZRB
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PZRB
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PZRB
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PZRB
bits : 7 - 6 (0 bit)
access : read-write
Port Pseudo Open Drain Setting Register C [BHW]
address_offset : 0x730 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PZRC
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PZRC
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PZRC
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PZRC
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PZRC
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PZRC
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PZRC
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PZRC
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PZRC
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PZRC
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PZRC
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PZRC
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PZRC
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PZRC
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PZRC
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PZRC
bits : 15 - 14 (0 bit)
access : read-write
Port Pseudo Open Drain Setting Register D [BHW]
address_offset : 0x734 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PZRD
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PZRD
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PZRD
bits : 2 - 1 (0 bit)
access : read-write
Port Pseudo Open Drain Setting Register E [BHW]
address_offset : 0x738 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PZRE
bits : 0 - -1 (0 bit)
access : read-write
P2 : Bit2 of PZRE
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PZRE
bits : 3 - 2 (0 bit)
access : read-write
Port Pseudo Open Drain Setting Register F [BHW]
address_offset : 0x73C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PZRF
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PZRF
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PZRF
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PZRF
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PZRF
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PZRF
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PZRF
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PZRF
bits : 7 - 6 (0 bit)
access : read-write
Port Driver capability Select Register 0 [BHW]
address_offset : 0x740 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDSR0
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDSR0
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDSR0
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDSR0
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDSR0
bits : 4 - 3 (0 bit)
access : read-write
P8 : Bit8 of PDSR0
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDSR0
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDSR0
bits : 10 - 9 (0 bit)
access : read-write
Port Driver capability Select Register 1 [BHW]
address_offset : 0x744 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDSR1
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDSR1
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDSR1
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDSR1
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDSR1
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDSR1
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDSR1
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDSR1
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDSR1
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDSR1
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDSR1
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PDSR1
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PDSR1
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PDSR1
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PDSR1
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PDSR1
bits : 15 - 14 (0 bit)
access : read-write
Port Driver capability Select Register 2 [BHW]
address_offset : 0x748 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDSR2
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDSR2
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDSR2
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDSR2
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDSR2
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDSR2
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDSR2
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDSR2
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDSR2
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDSR2
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDSR2
bits : 10 - 9 (0 bit)
access : read-write
Port Driver capability Select Register 3 [BHW]
address_offset : 0x74C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDSR3
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDSR3
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDSR3
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDSR3
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDSR3
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDSR3
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDSR3
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDSR3
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDSR3
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDSR3
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDSR3
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PDSR3
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PDSR3
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PDSR3
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PDSR3
bits : 14 - 13 (0 bit)
access : read-write
Port Driver capability Select Register 4 [BHW]
address_offset : 0x750 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDSR4
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDSR4
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDSR4
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDSR4
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDSR4
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDSR4
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDSR4
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDSR4
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDSR4
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDSR4
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDSR4
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PDSR4
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PDSR4
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PDSR4
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PDSR4
bits : 14 - 13 (0 bit)
access : read-write
Port Driver capability Select Register 5 [BHW]
address_offset : 0x754 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDSR5
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDSR5
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDSR5
bits : 2 - 1 (0 bit)
access : read-write
PD : Bit13 of PDSR5
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PDSR5
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PDSR5
bits : 15 - 14 (0 bit)
access : read-write
Port Driver capability Select Register 6 [BHW]
address_offset : 0x758 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDSR6
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDSR6
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDSR6
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDSR6
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDSR6
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDSR6
bits : 5 - 4 (0 bit)
access : read-write
PE : Bit14 of PDSR6
bits : 14 - 13 (0 bit)
access : read-write
Port Driver capability Select Register 7 [BHW]
address_offset : 0x75C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDSR7
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDSR7
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDSR7
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDSR7
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDSR7
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDSR7
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDSR7
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDSR7
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDSR7
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDSR7
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDSR7
bits : 10 - 9 (0 bit)
access : read-write
Port Driver capability Select Register 8 [BHW]
address_offset : 0x760 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDSR8
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDSR8
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDSR8
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDSR8
bits : 3 - 2 (0 bit)
access : read-write
Port Driver capability Select Register 9 [BHW]
address_offset : 0x764 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDSR9
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDSR9
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDSR9
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDSR9
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDSR9
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDSR9
bits : 5 - 4 (0 bit)
access : read-write
Port Driver capability Select Register A [BHW]
address_offset : 0x768 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDSRA
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDSRA
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDSRA
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDSRA
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDSRA
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDSRA
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDSRA
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDSRA
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDSRA
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDSRA
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDSRA
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PDSRA
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PDSRA
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PDSRA
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PDSRA
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PDSRA
bits : 15 - 14 (0 bit)
access : read-write
Port Driver capability Select Register B [BHW]
address_offset : 0x76C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDSRB
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDSRB
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDSRB
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDSRB
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDSRB
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDSRB
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDSRB
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDSRB
bits : 7 - 6 (0 bit)
access : read-write
Port Driver capability Select Register C [BHW]
address_offset : 0x770 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDSRC
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDSRC
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDSRC
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDSRC
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDSRC
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDSRC
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDSRC
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDSRC
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PDSRC
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PDSRC
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PDSRC
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PDSRC
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PDSRC
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PDSRC
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PDSRC
bits : 14 - 13 (0 bit)
access : read-write
PF : Bit15 of PDSRC
bits : 15 - 14 (0 bit)
access : read-write
Port Driver capability Select Register D [BHW]
address_offset : 0x774 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDSRD
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDSRD
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDSRD
bits : 2 - 1 (0 bit)
access : read-write
Port Driver capability Select Register E [BHW]
address_offset : 0x778 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDSRE
bits : 0 - -1 (0 bit)
access : read-write
P2 : Bit2 of PDSRE
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDSRE
bits : 3 - 2 (0 bit)
access : read-write
Port Driver capability Select Register F [BHW]
address_offset : 0x77C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PDSRF
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PDSRF
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PDSRF
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PDSRF
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PDSRF
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PDSRF
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PDSRF
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PDSRF
bits : 7 - 6 (0 bit)
access : read-write
Port Function Setting Register 2 [BHW]
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PFR2
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PFR2
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PFR2
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PFR2
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PFR2
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PFR2
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PFR2
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PFR2
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PFR2
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PFR2
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PFR2
bits : 10 - 9 (0 bit)
access : read-write
Port Function Setting Register 3 [BHW]
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0 : Bit0 of PFR3
bits : 0 - -1 (0 bit)
access : read-write
P1 : Bit1 of PFR3
bits : 1 - 0 (0 bit)
access : read-write
P2 : Bit2 of PFR3
bits : 2 - 1 (0 bit)
access : read-write
P3 : Bit3 of PFR3
bits : 3 - 2 (0 bit)
access : read-write
P4 : Bit4 of PFR3
bits : 4 - 3 (0 bit)
access : read-write
P5 : Bit5 of PFR3
bits : 5 - 4 (0 bit)
access : read-write
P6 : Bit6 of PFR3
bits : 6 - 5 (0 bit)
access : read-write
P7 : Bit7 of PFR3
bits : 7 - 6 (0 bit)
access : read-write
P8 : Bit8 of PFR3
bits : 8 - 7 (0 bit)
access : read-write
P9 : Bit9 of PFR3
bits : 9 - 8 (0 bit)
access : read-write
PA : Bit10 of PFR3
bits : 10 - 9 (0 bit)
access : read-write
PB : Bit11 of PFR3
bits : 11 - 10 (0 bit)
access : read-write
PC : Bit12 of PFR3
bits : 12 - 11 (0 bit)
access : read-write
PD : Bit13 of PFR3
bits : 13 - 12 (0 bit)
access : read-write
PE : Bit14 of PFR3
bits : 14 - 13 (0 bit)
access : read-write
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