Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection : not protected
PWM Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : no description available
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
PWM disabled
#1 : 1
PWM enabled
End of enumeration elements list.
REPEAT : no description available
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
#00 : 00
Use each sample once
#01 : 01
Use each sample twice
#10 : 10
Use each sample four times
#11 : 11
Use each sample eight times
End of enumeration elements list.
SWR : no description available
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
PWM is out of reset
#1 : 1
PWM is undergoing reset
End of enumeration elements list.
PRESCALER : no description available
bits : 4 - 15 (12 bit)
access : read-write
Enumeration:
#0 : 0
Divide by 1
#1 : 1
Divide by 2
#111111111111 : 111111111111
Divide by 4096
End of enumeration elements list.
CLKSRC : no description available
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
#00 : 00
Clock is off
#01 : 01
ipg_clk
#10 : 10
ipg_clk_highfreq
#11 : 11
ipg_clk_32k
End of enumeration elements list.
POUTC : no description available
bits : 18 - 19 (2 bit)
access : read-write
Enumeration:
#00 : 00
Output pin is set at rollover and cleared at comparison
#01 : 01
Output pin is cleared at rollover and set at comparison
#10 : 10
PWM output is disconnected
#11 : 11
PWM output is disconnected
End of enumeration elements list.
HCTR : no description available
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
#0 : 0
Half word swapping does not take place
#1 : 1
Half words from write data bus are swapped
End of enumeration elements list.
BCTR : no description available
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
#0 : 0
byte ordering remains the same
#1 : 1
byte ordering is reversed
End of enumeration elements list.
DBGEN : no description available
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
#0 : 0
Inactive in debug mode
#1 : 1
Active in debug mode
End of enumeration elements list.
WAITEN : no description available
bits : 23 - 23 (1 bit)
access : read-write
Enumeration:
#0 : 0
Inactive in wait mode
#1 : 1
Active in wait mode
End of enumeration elements list.
DOZEN : no description available
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Inactive in doze mode
#1 : 1
Active in doze mode
End of enumeration elements list.
STOPEN : no description available
bits : 25 - 25 (1 bit)
access : read-write
Enumeration:
#0 : 0
Inactive in stop mode
#1 : 1
Active in stop mode
End of enumeration elements list.
FWM : no description available
bits : 26 - 27 (2 bit)
access : read-write
Enumeration:
#00 : 00
FIFO empty flag is set when there are more than or equal to 1 empty slots in FIFO
#01 : 01
FIFO empty flag is set when there are more than or equal to 2 empty slots in FIFO
#10 : 10
FIFO empty flag is set when there are more than or equal to 3 empty slots in FIFO
#11 : 11
FIFO empty flag is set when there are more than or equal to 4 empty slots in FIFO
End of enumeration elements list.
PWM Period Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PERIOD : no description available
bits : 0 - 15 (16 bit)
access : read-write
PWM Counter Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
COUNT : no description available
bits : 0 - 15 (16 bit)
access : read-only
PWM Status Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIFOAV : no description available
bits : 0 - 2 (3 bit)
access : read-only
Enumeration:
#000 : 000
No data available
#001 : 001
1 word of data in FIFO
#010 : 010
2 words of data in FIFO
#011 : 011
3 words of data in FIFO
#100 : 100
4 words of data in FIFO
#101 : 101
unused
#110 : 110
unused
#111 : 111
unused
End of enumeration elements list.
FE : no description available
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Data level is above water mark
#1 : 1
When the data level falls below the mark set by FWM field
End of enumeration elements list.
ROV : no description available
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Roll-over event not occurred
#1 : 1
Roll-over event occurred
End of enumeration elements list.
CMP : no description available
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Compare event not occurred
#1 : 1
Compare event occurred
End of enumeration elements list.
FWE : no description available
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
FIFO write error not occurred
#1 : 1
FIFO write error occurred
End of enumeration elements list.
PWM Interrupt Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIE : no description available
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
FIFO Empty interrupt disabled
#1 : 1
FIFO Empty interrupt enabled
End of enumeration elements list.
RIE : no description available
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Roll-over interrupt not enabled
#1 : 1
Roll-over Interrupt enabled
End of enumeration elements list.
CIE : no description available
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Compare Interrupt not enabled
#1 : 1
Compare Interrupt enabled
End of enumeration elements list.
PWM Sample Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SAMPLE : no description available
bits : 0 - 15 (16 bit)
access : read-write
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