Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0xBC byte (0x0)
mem_usage : registers
protection : not protected
UART Receiver Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RX_DATA : no description available
bits : 0 - 7 (8 bit)
access : read-only
PRERR : no description available
bits : 10 - 10 (1 bit)
access : read-only
Enumeration:
#0 : 0
= No parity error was detected for data in the RX_DATA field
#1 : 1
= A parity error was detected for data in the RX_DATA field
End of enumeration elements list.
BRK : no description available
bits : 11 - 11 (1 bit)
access : read-only
Enumeration:
#0 : 0
The current character is not a BREAK character
#1 : 1
The current character is a BREAK character
End of enumeration elements list.
FRMERR : no description available
bits : 12 - 12 (1 bit)
access : read-only
Enumeration:
#0 : 0
The current character has no framing error
#1 : 1
The current character has a framing error
End of enumeration elements list.
OVRRUN : no description available
bits : 13 - 13 (1 bit)
access : read-only
Enumeration:
#0 : 0
No RxFIFO overrun was detected
#1 : 1
A RxFIFO overrun was detected
End of enumeration elements list.
ERR : no description available
bits : 14 - 14 (1 bit)
access : read-only
Enumeration:
#0 : 0
No error status was detected
#1 : 1
An error status was detected
End of enumeration elements list.
CHARRDY : no description available
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Character in RX_DATA field and associated flags are invalid.
#1 : 1
Character in RX_DATA field and associated flags valid and ready for reading.
End of enumeration elements list.
UART Transmitter Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TX_DATA : no description available
bits : 0 - 7 (8 bit)
access : write-only
UART Control Register 1
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UARTEN : no description available
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable the UART
#1 : 1
Enable the UART
End of enumeration elements list.
DOZE : no description available
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
The UART is enabled when in DOZE state
#1 : 1
The UART is disabled when in DOZE state
End of enumeration elements list.
ATDMAEN : no description available
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable AGTIM DMA request
#1 : 1
Enable AGTIM DMA request
End of enumeration elements list.
TXDMAEN : no description available
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable transmit DMA request
#1 : 1
Enable transmit DMA request
End of enumeration elements list.
SNDBRK : no description available
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Do not send a BREAK character
#1 : 1
Send a BREAK character (continuous 0s)
End of enumeration elements list.
RTSDEN : no description available
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable RTSD interrupt
#1 : 1
Enable RTSD interrupt
End of enumeration elements list.
TXMPTYEN : no description available
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable the transmitter FIFO empty interrupt
#1 : 1
Enable the transmitter FIFO empty interrupt
End of enumeration elements list.
IREN : no description available
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable the IR interface
#1 : 1
Enable the IR interface
End of enumeration elements list.
RXDMAEN : no description available
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable DMA request
#1 : 1
Enable DMA request
End of enumeration elements list.
RRDYEN : no description available
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disables the RRDY interrupt
#1 : 1
Enables the RRDY interrupt
End of enumeration elements list.
ICD : no description available
bits : 10 - 11 (2 bit)
access : read-write
Enumeration:
#00 : 00
Idle for more than 4 frames
#01 : 01
Idle for more than 8 frames
#10 : 10
Idle for more than 16 frames
#11 : 11
Idle for more than 32 frames
End of enumeration elements list.
IDEN : no description available
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable the IDLE interrupt
#1 : 1
Enable the IDLE interrupt
End of enumeration elements list.
TRDYEN : no description available
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable the transmitter ready interrupt
#1 : 1
Enable the transmitter ready interrupt
End of enumeration elements list.
ADBR : no description available
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable automatic detection of baud rate
#1 : 1
Enable automatic detection of baud rate
End of enumeration elements list.
ADEN : no description available
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable the automatic baud rate detection interrupt
#1 : 1
Enable the automatic baud rate detection interrupt
End of enumeration elements list.
UART Control Register 2
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SRST : no description available
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Reset the transmit and receive state machines, all FIFOs and register USR1, USR2, UBIR, UBMR, UBRC , URXD, UTXD and UTS[6-3].
#1 : 1
No reset
End of enumeration elements list.
RXEN : no description available
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable the receiver
#1 : 1
Enable the receiver
End of enumeration elements list.
TXEN : no description available
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable the transmitter
#1 : 1
Enable the transmitter
End of enumeration elements list.
ATEN : no description available
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
AGTIM interrupt disabled
#1 : 1
AGTIM interrupt enabled
End of enumeration elements list.
RTSEN : no description available
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable request to send interrupt
#1 : 1
Enable request to send interrupt
End of enumeration elements list.
WS : no description available
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
7-bit transmit and receive character length (not including START, STOP or PARITY bits)
#1 : 1
8-bit transmit and receive character length (not including START, STOP or PARITY bits)
End of enumeration elements list.
STPB : no description available
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
The transmitter sends 1 stop bit. The receiver expects 1 or more stop bits.
#1 : 1
The transmitter sends 2 stop bits. The receiver expects 2 or more stop bits.
End of enumeration elements list.
PROE : no description available
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Even parity
#1 : 1
Odd parity
End of enumeration elements list.
PREN : no description available
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable parity generator and checker
#1 : 1
Enable parity generator and checker
End of enumeration elements list.
RTEC : no description available
bits : 9 - 10 (2 bit)
access : read-write
Enumeration:
#00 : 00
Trigger interrupt on a rising edge
#01 : 01
Trigger interrupt on a falling edge
End of enumeration elements list.
ESCEN : no description available
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable escape sequence detection
#1 : 1
Enable escape sequence detection
End of enumeration elements list.
CTS : no description available
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
The CTS_B pin is high (inactive)
#1 : 1
The CTS_B pin is low (active)
End of enumeration elements list.
CTSC : no description available
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
The CTS_B pin is controlled by the CTS bit
#1 : 1
The CTS_B pin is controlled by the receiver
End of enumeration elements list.
IRTS : no description available
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
#0 : 0
Transmit only when the RTS pin is asserted
#1 : 1
Ignore the RTS pin
End of enumeration elements list.
ESCI : no description available
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable the escape sequence interrupt
#1 : 1
Enable the escape sequence interrupt
End of enumeration elements list.
UART Control Register 3
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACIEN : no description available
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
ACST interrupt disabled
#1 : 1
ACST interrupt enabled
End of enumeration elements list.
INVT : no description available
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
TXD is not inverted
#1 : 1
TXD is inverted
End of enumeration elements list.
RXDMUXSEL : no description available
bits : 2 - 2 (1 bit)
access : read-write
DTRDEN : no description available
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable DTRD interrupt
#1 : 1
Enable DTRD interrupt
End of enumeration elements list.
AWAKEN : no description available
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable the AWAKE interrupt
#1 : 1
Enable the AWAKE interrupt
End of enumeration elements list.
AIRINTEN : no description available
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable the AIRINT interrupt
#1 : 1
Enable the AIRINT interrupt
End of enumeration elements list.
RXDSEN : no description available
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable the RXDS interrupt
#1 : 1
Enable the RXDS interrupt
End of enumeration elements list.
ADNIMP : no description available
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Autobaud detection new features selected
#1 : 1
Keep old autobaud detection mechanism
End of enumeration elements list.
RI : no description available
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
RI_B pin is logic zero (DCE mode)
#1 : 1
RI_B pin is logic one (DCE mode)
End of enumeration elements list.
DCD : no description available
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
DCD_B pin is logic zero (DCE mode)
#1 : 1
DCD_B pin is logic one (DCE mode)
End of enumeration elements list.
DSR : no description available
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
DSR/ DTR pin is logic zero
#1 : 1
DSR/ DTR pin is logic one
End of enumeration elements list.
FRAERREN : no description available
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable the frame error interrupt
#1 : 1
Enable the frame error interrupt
End of enumeration elements list.
PARERREN : no description available
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable the parity error interrupt
#1 : 1
Enable the parity error interrupt
End of enumeration elements list.
DTREN : no description available
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
Data Terminal Ready Interrupt Disabled
#1 : 1
Data Terminal Ready Interrupt Enabled
End of enumeration elements list.
DPEC : no description available
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
#00 : 00
interrupt generated on rising edge
#01 : 01
interrupt generated on falling edge
End of enumeration elements list.
UART Control Register 4
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DREN : no description available
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable RDR interrupt
#1 : 1
Enable RDR interrupt
End of enumeration elements list.
OREN : no description available
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable ORE interrupt
#1 : 1
Enable ORE interrupt
End of enumeration elements list.
BKEN : no description available
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable the BRCD interrupt
#1 : 1
Enable the BRCD interrupt
End of enumeration elements list.
TCEN : no description available
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable TXDC interrupt
#1 : 1
Enable TXDC interrupt
End of enumeration elements list.
LPBYP : no description available
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Low power features enabled
#1 : 1
Low power features disabled
End of enumeration elements list.
IRSC : no description available
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
The vote logic uses the sampling clock (16x baud rate) for normal operation
#1 : 1
The vote logic uses the UART reference clock
End of enumeration elements list.
IDDMAEN : no description available
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
DMA IDLE interrupt disabled
#1 : 1
DMA IDLE interrupt enabled
End of enumeration elements list.
WKEN : no description available
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable the WAKE interrupt
#1 : 1
Enable the WAKE interrupt
End of enumeration elements list.
ENIRI : no description available
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Serial infrared Interrupt disabled
#1 : 1
Serial infrared Interrupt enabled
End of enumeration elements list.
INVR : no description available
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
RXD input is not inverted
#1 : 1
RXD input is inverted
End of enumeration elements list.
CTSTL : no description available
bits : 10 - 15 (6 bit)
access : read-write
Enumeration:
#000000 : 000000
0 characters received
#000001 : 000001
1 characters in the RxFIFO
#100000 : 100000
32 characters in the RxFIFO (maximum)
End of enumeration elements list.
UART FIFO Control Register
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RXTL : no description available
bits : 0 - 5 (6 bit)
access : read-write
Enumeration:
#000000 : 000000
0 characters received
#000001 : 000001
RxFIFO has 1 character
#011111 : 011111
RxFIFO has 31 characters
#100000 : 100000
RxFIFO has 32 characters (maximum)
End of enumeration elements list.
DCEDTE : no description available
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
DCE mode selected
#1 : 1
DTE mode selected
End of enumeration elements list.
RFDIV : no description available
bits : 7 - 9 (3 bit)
access : read-write
Enumeration:
#000 : 000
Divide input clock by 6
#001 : 001
Divide input clock by 5
#010 : 010
Divide input clock by 4
#011 : 011
Divide input clock by 3
#100 : 100
Divide input clock by 2
#101 : 101
Divide input clock by 1
#110 : 110
Divide input clock by 7
End of enumeration elements list.
TXTL : no description available
bits : 10 - 15 (6 bit)
access : read-write
Enumeration:
#000010 : 000010
TxFIFO has 2 or fewer characters
#011111 : 011111
TxFIFO has 31 or fewer characters
#100000 : 100000
TxFIFO has 32 characters (maximum)
End of enumeration elements list.
UART Status Register 1
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SAD : no description available
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
No slave address detected
#1 : 1
Slave address detected
End of enumeration elements list.
AWAKE : no description available
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
No falling edge was detected on the RXD Serial pin
#1 : 1
A falling edge was detected on the RXD Serial pin
End of enumeration elements list.
AIRINT : no description available
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
No pulse was detected on the RXD IrDA pin
#1 : 1
A pulse was detected on the RXD IrDA pin
End of enumeration elements list.
RXDS : no description available
bits : 6 - 6 (1 bit)
access : read-only
Enumeration:
#0 : 0
Receive in progress
#1 : 1
Receiver is IDLE
End of enumeration elements list.
DTRD : no description available
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
DTR_B (DCE) or DSR_B (DTE) pin did not change state since last cleared
#1 : 1
DTR_B (DCE) or DSR_B (DTE) pin changed state (write 1 to clear)
End of enumeration elements list.
AGTIM : no description available
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
AGTIM is not active
#1 : 1
AGTIM is active (write 1 to clear)
End of enumeration elements list.
RRDY : no description available
bits : 9 - 9 (1 bit)
access : read-only
Enumeration:
#0 : 0
No character ready
#1 : 1
Character(s) ready (interrupt posted)
End of enumeration elements list.
FRAMERR : no description available
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
No frame error detected
#1 : 1
Frame error detected (write 1 to clear)
End of enumeration elements list.
ESCF : no description available
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
No escape sequence detected
#1 : 1
Escape sequence detected (write 1 to clear).
End of enumeration elements list.
RTSD : no description available
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
RTS_B pin did not change state since last cleared
#1 : 1
RTS_B pin changed state (write 1 to clear)
End of enumeration elements list.
TRDY : no description available
bits : 13 - 13 (1 bit)
access : read-only
Enumeration:
#0 : 0
The transmitter does not require data
#1 : 1
The transmitter requires data (interrupt posted)
End of enumeration elements list.
RTSS : no description available
bits : 14 - 14 (1 bit)
access : read-only
Enumeration:
#0 : 0
The RTS_B module input is high (inactive)
#1 : 1
The RTS_B module input is low (active)
End of enumeration elements list.
PARITYERR : no description available
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#0 : 0
No parity error detected
#1 : 1
Parity error detected (write 1 to clear)
End of enumeration elements list.
UART Status Register 2
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RDR : no description available
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
#0 : 0
No receive data ready
#1 : 1
Receive data ready
End of enumeration elements list.
ORE : no description available
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
No overrun error
#1 : 1
Overrun error (write 1 to clear)
End of enumeration elements list.
BRCD : no description available
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
No BREAK condition was detected
#1 : 1
A BREAK condition was detected (write 1 to clear)
End of enumeration elements list.
TXDC : no description available
bits : 3 - 3 (1 bit)
access : read-only
Enumeration:
#0 : 0
Transmit is incomplete
#1 : 1
Transmit is complete
End of enumeration elements list.
RTSF : no description available
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Programmed edge not detected on RTS_B
#1 : 1
Programmed edge detected on RTS_B (write 1 to clear)
End of enumeration elements list.
DCDIN : no description available
bits : 5 - 5 (1 bit)
access : read-only
Enumeration:
#0 : 0
Carrier signal Detected
#1 : 1
No Carrier signal Detected
End of enumeration elements list.
DCDDELT : no description available
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Data Carrier Detect input has not changed state
#1 : 1
Data Carrier Detect input has changed state (write 1 to clear)
End of enumeration elements list.
WAKE : no description available
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
start bit not detected
#1 : 1
start bit detected (write 1 to clear)
End of enumeration elements list.
IRINT : no description available
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
no edge detected
#1 : 1
valid edge detected (write 1 to clear)
End of enumeration elements list.
RIIN : no description available
bits : 9 - 9 (1 bit)
access : read-only
Enumeration:
#0 : 0
Ring Detected
#1 : 1
No Ring Detected
End of enumeration elements list.
RIDELT : no description available
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
Ring Indicator input has not changed state
#1 : 1
Ring Indicator input has changed state (write 1 to clear)
End of enumeration elements list.
ACST : no description available
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
Measurement of bit length not finished (in autobaud)
#1 : 1
Measurement of bit length finished (in autobaud). (write 1 to clear)
End of enumeration elements list.
IDLE : no description available
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
No idle condition detected
#1 : 1
Idle condition detected (write 1 to clear)
End of enumeration elements list.
DTRF : no description available
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
Programmed edge not detected on DTR/DSR
#1 : 1
Programmed edge detected on DTR/DSR (write 1 to clear)
End of enumeration elements list.
TXFE : no description available
bits : 14 - 14 (1 bit)
access : read-only
Enumeration:
#0 : 0
The transmit buffer (TxFIFO) is not empty
#1 : 1
The transmit buffer (TxFIFO) is empty
End of enumeration elements list.
ADET : no description available
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#0 : 0
ASCII "A" or "a" was not received
#1 : 1
ASCII "A" or "a" was received (write 1 to clear)
End of enumeration elements list.
UART Escape Character Register
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ESC_CHAR : no description available
bits : 0 - 7 (8 bit)
access : read-write
UART Escape Timer Register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM : no description available
bits : 0 - 11 (12 bit)
access : read-write
UART BRM Incremental Register
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INC : no description available
bits : 0 - 15 (16 bit)
access : read-write
UART BRM Modulator Register
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MOD : no description available
bits : 0 - 15 (16 bit)
access : read-write
UART Baud Rate Count Register
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
BCNT : no description available
bits : 0 - 15 (16 bit)
access : read-only
UART One Millisecond Register
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ONEMS : no description available
bits : 0 - 23 (24 bit)
access : read-write
UART Test Register
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SOFTRST : no description available
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Software reset inactive
#1 : 1
Software reset active
End of enumeration elements list.
RXFULL : no description available
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
The RxFIFO is not full
#1 : 1
The RxFIFO is full
End of enumeration elements list.
TXFULL : no description available
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
The TxFIFO is not full
#1 : 1
The TxFIFO is full
End of enumeration elements list.
RXEMPTY : no description available
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
The RxFIFO is not empty
#1 : 1
The RxFIFO is empty
End of enumeration elements list.
TXEMPTY : no description available
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
The TxFIFO is not empty
#1 : 1
The TxFIFO is empty
End of enumeration elements list.
RXDBG : no description available
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
rx fifo read pointer does not increment
#1 : 1
rx_fifo read pointer increments as normal
End of enumeration elements list.
LOOPIR : no description available
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
No IR loop
#1 : 1
Connect IR transmitter to IR receiver
End of enumeration elements list.
DBGEN : no description available
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
UART will go into debug mode when debug_req is HIGH
#1 : 1
UART will not go into debug mode even if debug_req is HIGH
End of enumeration elements list.
LOOP : no description available
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
Normal receiver operation
#1 : 1
Internally connect the transmitter output to the receiver input
End of enumeration elements list.
FRCPERR : no description available
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
Generate normal parity
#1 : 1
Generate inverted parity (error)
End of enumeration elements list.
UART RS-485 Mode Control Register
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MDEN : no description available
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Normal RS-232 or IrDA mode, see for detail.
#1 : 1
Enable RS-485 mode, see for detail
End of enumeration elements list.
SLAM : no description available
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Select Normal Address Detect mode
#1 : 1
Select Automatic Address Detect mode
End of enumeration elements list.
TXB8 : no description available
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
0 will be transmitted as the RS485 9th data bit
#1 : 1
1 will be transmitted as the RS485 9th data bit
End of enumeration elements list.
SADEN : no description available
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable RS-485 Slave Address Detected Interrupt
#1 : 1
Enable RS-485 Slave Address Detected Interrupt
End of enumeration elements list.
SLADDR : no description available
bits : 8 - 15 (8 bit)
access : read-write
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