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GPIO

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected

Registers

DR

ICR2

IMR

ISR

EDGE_SEL

GDIR

PSR

ICR1


DR

GPIO data register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DR DR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DR

DR : no description available
bits : 0 - 31 (32 bit)
access : read-write


ICR2

GPIO interrupt configuration register2
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ICR2 ICR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ICR16 ICR17 ICR18 ICR19 ICR20 ICR21 ICR22 ICR23 ICR24 ICR25 ICR26 ICR27 ICR28 ICR29 ICR30 ICR31

ICR16 : no description available
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR17 : no description available
bits : 2 - 3 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR18 : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR19 : no description available
bits : 6 - 7 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR20 : no description available
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR21 : no description available
bits : 10 - 11 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR22 : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR23 : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR24 : no description available
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR25 : no description available
bits : 18 - 19 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR26 : no description available
bits : 20 - 21 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR27 : no description available
bits : 22 - 23 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR28 : no description available
bits : 24 - 25 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR29 : no description available
bits : 26 - 27 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR30 : no description available
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR31 : no description available
bits : 30 - 31 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.


IMR

GPIO interrupt mask register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMR IMR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IMR

IMR : no description available
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

Interrupt n is disabled.

#1 : 1

Interrupt n is enabled.

End of enumeration elements list.


ISR

GPIO interrupt status register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ISR ISR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ISR

ISR : no description available
bits : 0 - 31 (32 bit)
access : read-write


EDGE_SEL

GPIO edge select register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EDGE_SEL EDGE_SEL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO_EDGE_SEL

GPIO_EDGE_SEL : no description available
bits : 0 - 31 (32 bit)
access : read-write


GDIR

GPIO direction register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GDIR GDIR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GDIR

GDIR : no description available
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

GPIO is configured as input.

#1 : 1

GPIO is configured as output.

End of enumeration elements list.


PSR

GPIO pad status register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PSR PSR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PSR

PSR : no description available
bits : 0 - 31 (32 bit)
access : read-only


ICR1

GPIO interrupt configuration register1
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ICR1 ICR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ICR0 ICR1 ICR2 ICR3 ICR4 ICR5 ICR6 ICR7 ICR8 ICR9 ICR10 ICR11 ICR12 ICR13 ICR14 ICR15

ICR0 : no description available
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR1 : no description available
bits : 2 - 3 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR2 : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR3 : no description available
bits : 6 - 7 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR4 : no description available
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR5 : no description available
bits : 10 - 11 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR6 : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR7 : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR8 : no description available
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR9 : no description available
bits : 18 - 19 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR10 : no description available
bits : 20 - 21 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR11 : no description available
bits : 22 - 23 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR12 : no description available
bits : 24 - 25 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR13 : no description available
bits : 26 - 27 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR14 : no description available
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.

ICR15 : no description available
bits : 30 - 31 (2 bit)
access : read-write

Enumeration:

#00 : 00

Interrupt n is low-level sensitive.

#01 : 01

Interrupt n is high-level sensitive.

#10 : 10

Interrupt n is rising-edge sensitive.

#11 : 11

Interrupt n is falling-edge sensitive.

End of enumeration elements list.



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