\n
address_offset : 0x0 Bytes (0x0)
size : 0x24 byte (0x0)
mem_usage : registers
protection : not protected
DAC Data Low Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA0 : no description available
bits : 0 - 7 (8 bit)
access : read-write
DAC Data High Register
address_offset : 0x101 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA1 : no description available
bits : 0 - 3 (4 bit)
access : read-write
RESERVED : no description available
bits : 4 - 7 (4 bit)
access : read-only
DAC Data High Register
address_offset : 0x11 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA1 : no description available
bits : 0 - 3 (4 bit)
access : read-write
RESERVED : no description available
bits : 4 - 7 (4 bit)
access : read-only
DAC Data Low Register
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA0 : no description available
bits : 0 - 7 (8 bit)
access : read-write
DAC Data High Register
address_offset : 0x1A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA1 : no description available
bits : 0 - 3 (4 bit)
access : read-write
RESERVED : no description available
bits : 4 - 7 (4 bit)
access : read-only
DAC Data Low Register
address_offset : 0x1E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA0 : no description available
bits : 0 - 7 (8 bit)
access : read-write
DAC Data Low Register
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA0 : no description available
bits : 0 - 7 (8 bit)
access : read-write
DAC Data High Register
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA1 : no description available
bits : 0 - 3 (4 bit)
access : read-write
RESERVED : no description available
bits : 4 - 7 (4 bit)
access : read-only
DAC Status Register
address_offset : 0x20 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DACBFRPBF : DAC Buffer Read Pointer Bottom Position Flag
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
The DAC buffer read pointer is not equal to C2[DACBFUP].
#1 : 1
The DAC buffer read pointer is equal to C2[DACBFUP].
End of enumeration elements list.
DACBFRPTF : DAC Buffer Read Pointer Top Position Flag
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
The DAC buffer read pointer is not zero.
#1 : 1
The DAC buffer read pointer is zero.
End of enumeration elements list.
DACBFWMF : DAC Buffer Watermark Flag
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
The DAC buffer read pointer has not reached the watermark level.
#1 : 1
The DAC buffer read pointer has reached the watermark level.
End of enumeration elements list.
RESERVED : no description available
bits : 3 - 7 (5 bit)
access : read-only
DAC Control Register
address_offset : 0x21 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DACBBIEN : DAC Buffer Read Pointer Bottom Flag Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
The DAC buffer read pointer bottom flag interrupt is disabled.
#1 : 1
The DAC buffer read pointer bottom flag interrupt is enabled.
End of enumeration elements list.
DACBTIEN : DAC Buffer Read Pointer Top Flag Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
The DAC buffer read pointer top flag interrupt is disabled.
#1 : 1
The DAC buffer read pointer top flag interrupt is enabled.
End of enumeration elements list.
DACBWIEN : DAC Buffer Watermark Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
The DAC buffer watermark interrupt is disabled.
#1 : 1
The DAC buffer watermark interrupt is enabled.
End of enumeration elements list.
LPEN : DAC Low Power Control
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
High-Power mode
#1 : 1
Low-Power mode
End of enumeration elements list.
DACSWTRG : DAC Software Trigger
bits : 4 - 4 (1 bit)
access : write-only
Enumeration:
#0 : 0
The DAC soft trigger is not valid.
#1 : 1
The DAC soft trigger is valid.
End of enumeration elements list.
DACTRGSEL : DAC Trigger Select
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
The DAC hardware trigger is selected.
#1 : 1
The DAC software trigger is selected.
End of enumeration elements list.
DACRFS : DAC Reference Select
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
The DAC selects DACREF_1 as the reference voltage.
#1 : 1
The DAC selects DACREF_2 as the reference voltage.
End of enumeration elements list.
DACEN : DAC Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
The DAC system is disabled.
#1 : 1
The DAC system is enabled.
End of enumeration elements list.
DAC Control Register 1
address_offset : 0x22 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DACBFEN : DAC Buffer Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Buffer read pointer is disabled. The converted data is always the first word of the buffer.
#1 : 1
Buffer read pointer is enabled. The converted data is the word that the read pointer points to. It means converted data can be from any word of the buffer.
End of enumeration elements list.
DACBFMD : DAC Buffer Work Mode Select
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
#00 : 00
Normal mode
#01 : 01
Swing mode
#10 : 10
One-Time Scan mode
#11 : 11
Reserved
End of enumeration elements list.
DACBFWM : DAC Buffer Watermark Select
bits : 3 - 4 (2 bit)
access : read-write
Enumeration:
#00 : 00
1 word
#01 : 01
2 words
#10 : 10
3 words
#11 : 11
4 words
End of enumeration elements list.
RESERVED : no description available
bits : 5 - 6 (2 bit)
access : read-only
DMAEN : DMA Enable Select
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
DMA is disabled.
#1 : 1
DMA is enabled. When DMA is enabled, the DMA request will be generated by original interrupts. The interrupts will not be presented on this module at the same time.
End of enumeration elements list.
DAC Control Register 2
address_offset : 0x23 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DACBFUP : DAC Buffer Upper Limit
bits : 0 - 3 (4 bit)
access : read-write
DACBFRP : DAC Buffer Read Pointer
bits : 4 - 7 (4 bit)
access : read-write
DAC Data High Register
address_offset : 0x25 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA1 : no description available
bits : 0 - 3 (4 bit)
access : read-write
RESERVED : no description available
bits : 4 - 7 (4 bit)
access : read-only
DAC Data Low Register
address_offset : 0x2A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA0 : no description available
bits : 0 - 7 (8 bit)
access : read-write
DAC Data High Register
address_offset : 0x32 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA1 : no description available
bits : 0 - 3 (4 bit)
access : read-write
RESERVED : no description available
bits : 4 - 7 (4 bit)
access : read-only
DAC Data Low Register
address_offset : 0x38 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA0 : no description available
bits : 0 - 7 (8 bit)
access : read-write
DAC Data High Register
address_offset : 0x41 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA1 : no description available
bits : 0 - 3 (4 bit)
access : read-write
RESERVED : no description available
bits : 4 - 7 (4 bit)
access : read-only
DAC Data Low Register
address_offset : 0x48 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA0 : no description available
bits : 0 - 7 (8 bit)
access : read-write
DAC Data High Register
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA1 : no description available
bits : 0 - 3 (4 bit)
access : read-write
RESERVED : no description available
bits : 4 - 7 (4 bit)
access : read-only
DAC Data High Register
address_offset : 0x52 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA1 : no description available
bits : 0 - 3 (4 bit)
access : read-write
RESERVED : no description available
bits : 4 - 7 (4 bit)
access : read-only
DAC Data Low Register
address_offset : 0x5A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA0 : no description available
bits : 0 - 7 (8 bit)
access : read-write
DAC Data Low Register
address_offset : 0x6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA0 : no description available
bits : 0 - 7 (8 bit)
access : read-write
DAC Data High Register
address_offset : 0x65 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA1 : no description available
bits : 0 - 3 (4 bit)
access : read-write
RESERVED : no description available
bits : 4 - 7 (4 bit)
access : read-only
DAC Data Low Register
address_offset : 0x6E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA0 : no description available
bits : 0 - 7 (8 bit)
access : read-write
DAC Data High Register
address_offset : 0x7A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA1 : no description available
bits : 0 - 3 (4 bit)
access : read-write
RESERVED : no description available
bits : 4 - 7 (4 bit)
access : read-only
DAC Data Low Register
address_offset : 0x84 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA0 : no description available
bits : 0 - 7 (8 bit)
access : read-write
DAC Data High Register
address_offset : 0x91 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA1 : no description available
bits : 0 - 3 (4 bit)
access : read-write
RESERVED : no description available
bits : 4 - 7 (4 bit)
access : read-only
DAC Data Low Register
address_offset : 0x9C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA0 : no description available
bits : 0 - 7 (8 bit)
access : read-write
DAC Data High Register
address_offset : 0xA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA1 : no description available
bits : 0 - 3 (4 bit)
access : read-write
RESERVED : no description available
bits : 4 - 7 (4 bit)
access : read-only
DAC Data High Register
address_offset : 0xAA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA1 : no description available
bits : 0 - 3 (4 bit)
access : read-write
RESERVED : no description available
bits : 4 - 7 (4 bit)
access : read-only
DAC Data Low Register
address_offset : 0xB6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA0 : no description available
bits : 0 - 7 (8 bit)
access : read-write
DAC Data Low Register
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA0 : no description available
bits : 0 - 7 (8 bit)
access : read-write
DAC Data High Register
address_offset : 0xC5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA1 : no description available
bits : 0 - 3 (4 bit)
access : read-write
RESERVED : no description available
bits : 4 - 7 (4 bit)
access : read-only
DAC Data Low Register
address_offset : 0xD2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA0 : no description available
bits : 0 - 7 (8 bit)
access : read-write
DAC Data High Register
address_offset : 0xE2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA1 : no description available
bits : 0 - 3 (4 bit)
access : read-write
RESERVED : no description available
bits : 4 - 7 (4 bit)
access : read-only
DAC Data Low Register
address_offset : 0xF0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA0 : no description available
bits : 0 - 7 (8 bit)
access : read-write
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