\n
address_offset : 0x0 Bytes (0x0)
size : 0x8FC byte (0x0)
mem_usage : registers
protection : not protected
LTC Mode Register (non-PKHA/non-RNG use)
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENC : no description available
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Decrypt.
#1 : 1
Encrypt.
End of enumeration elements list.
ICV_TEST : no description available
bits : 1 - 1 (1 bit)
access : read-write
AS : no description available
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
#00 : 00
Update
#01 : 01
Initialize
#10 : 10
Finalize
#11 : 11
Initialize/Finalize
End of enumeration elements list.
AAI : no description available
bits : 4 - 12 (9 bit)
access : read-write
ALG : no description available
bits : 16 - 23 (8 bit)
access : read-write
Enumeration:
#00010000 : 00010000
AES
End of enumeration elements list.
LTC Data Size Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DS : no description available
bits : 0 - 11 (12 bit)
access : read-write
LTC Context Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CTX : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Context Register
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CTX : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Context Register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CTX : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Context Register
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CTX : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Context Register
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CTX : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Context Register
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CTX : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Context Register
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CTX : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Context Register
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CTX : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Context Register
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CTX : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Context Register
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CTX : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Context Register
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CTX : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Context Register
address_offset : 0x12C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CTX : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Context Register
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CTX : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Context Register
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CTX : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Context Register
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CTX : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Context Register
address_offset : 0x13C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CTX : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC ICV Size Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ICVS : no description available
bits : 0 - 4 (5 bit)
access : read-write
LTC Key Registers
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KEY : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Key Registers
address_offset : 0x204 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KEY : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Key Registers
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KEY : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Key Registers
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KEY : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Key Registers
address_offset : 0x210 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KEY : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Key Registers
address_offset : 0x214 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KEY : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Key Registers
address_offset : 0x218 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KEY : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Key Registers
address_offset : 0x21C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KEY : no description available
bits : 0 - 31 (32 bit)
access : read-write
LTC Command Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ALL : no description available
bits : 0 - 0 (1 bit)
access : write-only
Enumeration:
#0 : 0
Do Not Reset
#1 : 1
Reset all CHAs in use by this CCB.
End of enumeration elements list.
AES : no description available
bits : 1 - 1 (1 bit)
access : write-only
Enumeration:
#0 : 0
Do Not Reset
#1 : 1
Reset AES Accelerator
End of enumeration elements list.
LTC Control Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IM : no description available
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Interrupt not masked.
#1 : 1
Interrupt masked
End of enumeration elements list.
IFE : no description available
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
DMA Request and Done signals disabled for the Input FIFO.
#1 : 1
DMA Request and Done signals enabled for the Input FIFO.
End of enumeration elements list.
IFR : no description available
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
DMA request size is 1 entry.
#1 : 1
DMA request size is 4 entries.
End of enumeration elements list.
OFE : no description available
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
DMA Request and Done signals disabled for the Output FIFO.
#1 : 1
DMA Request and Done signals enabled for the Output FIFO.
End of enumeration elements list.
OFR : no description available
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
DMA request size is 1 entry.
#1 : 1
DMA request size is 4 entries.
End of enumeration elements list.
IFS : no description available
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
Do Not Byte Swap Data.
#1 : 1
Byte Swap Data.
End of enumeration elements list.
OFS : no description available
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
Do Not Byte Swap Data.
#1 : 1
Byte Swap Data.
End of enumeration elements list.
KIS : no description available
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
#0 : 0
Do Not Byte Swap Data.
#1 : 1
Byte Swap Data.
End of enumeration elements list.
KOS : no description available
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
#0 : 0
Do Not Byte Swap Data.
#1 : 1
Byte Swap Data.
End of enumeration elements list.
CIS : no description available
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
#0 : 0
Do Not Byte Swap Data.
#1 : 1
Byte Swap Data.
End of enumeration elements list.
COS : no description available
bits : 23 - 23 (1 bit)
access : read-write
Enumeration:
#0 : 0
Do Not Byte Swap Data.
#1 : 1
Byte Swap Data.
End of enumeration elements list.
KAL : no description available
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Key Register is readable.
#1 : 1
Key Register is not readable.
End of enumeration elements list.
LTC Clear Written Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CM : no description available
bits : 0 - 0 (1 bit)
access : write-only
CDS : no description available
bits : 2 - 2 (1 bit)
access : write-only
CICV : no description available
bits : 3 - 3 (1 bit)
access : write-only
CCR : no description available
bits : 5 - 5 (1 bit)
access : write-only
CKR : no description available
bits : 6 - 6 (1 bit)
access : write-only
COF : no description available
bits : 30 - 30 (1 bit)
access : write-only
CIF : no description available
bits : 31 - 31 (1 bit)
access : write-only
LTC Status Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AB : no description available
bits : 1 - 1 (1 bit)
access : read-only
Enumeration:
#0 : 0
AESA Idle
#1 : 1
AESA Busy.
End of enumeration elements list.
DI : no description available
bits : 16 - 16 (1 bit)
access : read-write
EI : no description available
bits : 20 - 20 (1 bit)
access : read-only
Enumeration:
#0 : 0
Not Error.
#1 : 1
Error Interrupt.
End of enumeration elements list.
LTC Error Status Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ERRID1 : no description available
bits : 0 - 3 (4 bit)
access : read-only
Enumeration:
#0001 : 0001
Mode Error
#0010 : 0010
Data Size Error
#0011 : 0011
Key Size Error
#0110 : 0110
Data Arrived out of Sequence Error
#1010 : 1010
ICV Check Failed
#1011 : 1011
Internal Hardware Failure
#1100 : 1100
CCM AAD Size Error (either 1. AAD flag in B0 =1 and no AAD type provided, 2. AAD flag in B0 = 0 and AAD povided, or 3. AAD flag in B0 =1 and not enough AAD provided - expecting more based on AAD size.)
#1111 : 1111
Invalid Crypto Engine Selected
End of enumeration elements list.
CL1 : no description available
bits : 8 - 11 (4 bit)
access : read-only
Enumeration:
#0000 : 0000
LTC General Error
#0001 : 0001
AES
End of enumeration elements list.
LTC AAD Size Register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AADSZ : no description available
bits : 0 - 3 (4 bit)
access : read-write
AL : no description available
bits : 31 - 31 (1 bit)
access : read-write
LTC FIFO Status Register
address_offset : 0x7C0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IFL : no description available
bits : 0 - 6 (7 bit)
access : read-only
IFF : no description available
bits : 15 - 15 (1 bit)
access : read-only
OFL : no description available
bits : 16 - 22 (7 bit)
access : read-only
OFF : no description available
bits : 31 - 31 (1 bit)
access : read-only
LTC Input Data FIFO
address_offset : 0x7E0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
IFIFO : no description available
bits : 0 - 31 (32 bit)
access : write-only
LTC Output Data FIFO
address_offset : 0x7F0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
OFIFO : no description available
bits : 0 - 31 (32 bit)
access : read-only
LTC Key Size Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
KS : no description available
bits : 0 - 31 (32 bit)
access : read-only
LTC Version ID Register
address_offset : 0x8F0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MIN_REV : no description available
bits : 0 - 7 (8 bit)
access : read-only
MAJ_REV : no description available
bits : 8 - 15 (8 bit)
access : read-only
IP_ID : no description available
bits : 16 - 31 (16 bit)
access : read-only
LTC CHA Version ID Register
address_offset : 0x8F8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AESREV : no description available
bits : 0 - 3 (4 bit)
access : read-only
AESVID : no description available
bits : 4 - 7 (4 bit)
access : read-only
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