Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : registers
protection : not protected
USB Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 6 (7 bit)
access : read-only
OVER_CUR_DIS : no description available
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#1 : 1
Disables overcurrent detection
#0 : 0
Enables overcurrent detection
End of enumeration elements list.
OVER_CUR_POL : no description available
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#1 : 1
Low active
#0 : 0
High active
End of enumeration elements list.
PM : no description available
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#1 : 1
The USBPWR and OC pins are not used by the USB core.
#0 : 0
The USBPWR pin will assert with the USB core's Vbus power Enable and the assertion of the OC input will be reported to the USB core.
End of enumeration elements list.
WIE : no description available
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#1 : 1
Interrupt Enabled
#0 : 0
Interrupt Disabled
End of enumeration elements list.
RESET : no description available
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#1 : 1
Reset the PHY
#0 : 0
Inactive
End of enumeration elements list.
SUSPENDM : no description available
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#1 : 1
Inactive
#0 : 0
Force OTG UTMI PHY Suspend
End of enumeration elements list.
UTMI_ON_CLOCK : no description available
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#1 : 1
Force clock output on
#0 : 0
Inactive
End of enumeration elements list.
WKUP_SW_EN : no description available
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
#1 : 1
Enable
#0 : 0
Disable
End of enumeration elements list.
WKUP_SW : no description available
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#1 : 1
Force wake-up
#0 : 0
Inactive
End of enumeration elements list.
RESERVED : no description available
bits : 16 - 16 (1 bit)
access : read-only
WKUP_VBUS_EN : no description available
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#1 : 1
Enable
#0 : 0
Disable
End of enumeration elements list.
RESERVED : no description available
bits : 18 - 23 (6 bit)
access : read-only
VBUS_CH_STAT : no description available
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
No Change in Port Power
#1 : 1
Change in Port Power Control
End of enumeration elements list.
VBUS_CH_INT_MASK : no description available
bits : 25 - 25 (1 bit)
access : read-write
Enumeration:
#0 : 0
VBUS_EN_INTR not masked
#1 : 1
VBUS_EN_INTR masked
End of enumeration elements list.
RESERVED : no description available
bits : 26 - 30 (5 bit)
access : read-write
WIR : no description available
bits : 31 - 31 (1 bit)
access : read-only
Enumeration:
#1 : 1
Wake-up Interrupt Request received
#0 : 0
No wake-up interrupt request received
End of enumeration elements list.
UTMI PHY Control Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHRGDET_INT_FLG : Charger detected interrupt flag.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
No charger detected interrupt
#1 : 1
Charger detected interrupt occurred
End of enumeration elements list.
CHRGDET_INT_EN : Charger detected interrupt enable.
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable
#1 : 1
Enable
End of enumeration elements list.
CHRGDET : UTMI PHY chrgdet.
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
When a Host is detected
#1 : 1
When a charger is detected
End of enumeration elements list.
RESERVED : no description available
bits : 3 - 30 (28 bit)
access : read-only
UTMI_CLK_VLD : UTMI PHY Clock Valid.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
UTMI Clock is invalid
#1 : 1
UTMI Clock is valid
End of enumeration elements list.
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