\n
address_offset : 0x0 Bytes (0x0)
size : 0xDE0 byte (0x0)
mem_usage : registers
protection : not protected
Processor X Type Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
rYpZ : Processor x Revision
bits : 0 - 7 (8 bit)
access : read-only
Personality : Processor x Personality
bits : 8 - 31 (24 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1022C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Processor 0 Configuration Register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only
DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only
ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only
ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x10AE6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1100 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x113A2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x11C60 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x12520 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x12DE2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x136A6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x13F6C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x14834 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Processor 1 Configuration Register
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only
DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only
ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only
ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x150FE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x159CA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x16298 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x16B68 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1743A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x17D0E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x185E4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x18EBC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x19796 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1982 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
ACTZS CSLn Fail Status Address (Low) Register
address_offset : 0x1A00 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FAD : CSLn Fail Address
bits : 0 - 31 (32 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1A072 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
ACTZS CSLn Fail Status Control Register
address_offset : 0x1A10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 19 (20 bit)
access : read-only
FPR : CSLn Fail Privileged
bits : 20 - 20 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a user mode access.
#1 : 1
Last captured CSLn access check violation was a privileged access.
End of enumeration elements list.
FNS : CSLn Fail Nonsecure
bits : 21 - 21 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a secure access.
#1 : 1
Last captured CSLn access check violation was a nonsecure access.
End of enumeration elements list.
RESERVED : no description available
bits : 22 - 23 (2 bit)
access : read-only
FWT : CSLn Fail Write
bits : 24 - 24 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a read.
#1 : 1
Last captured CSLn access check violation was a write.
End of enumeration elements list.
RESERVED : no description available
bits : 25 - 31 (7 bit)
access : read-only
ACTZS CSLn Fail Status Master ID Register
address_offset : 0x1A18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FMID : CSLn Fail Master ID
bits : 0 - 4 (5 bit)
access : read-only
RESERVED : no description available
bits : 5 - 31 (27 bit)
access : read-only
Processor 1 Configuration Register
address_offset : 0x1A8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only
DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only
ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only
ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1A950 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1B230 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1BB12 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1C3F6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1CCDC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1D5C4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1DEAE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1E79A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1F088 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1F978 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Processor X Configuration Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only
DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only
ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only
ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only
Processor 0 Type Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
rYpZ : Processor x Revision
bits : 0 - 7 (8 bit)
access : read-only
Personality : Processor x Personality
bits : 8 - 31 (24 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2026A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x20B5E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x21454 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x21D4C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2206 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x22646 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x22F42 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x23840 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Processor 0 Number Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CPN : Processor x Number
bits : 0 - 0 (1 bit)
access : read-only
RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x24140 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x24A42 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x25346 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x25C4C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x26554 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x26E5E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
ACTZS CSLn Fail Status Address (Low) Register
address_offset : 0x2710 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FAD : CSLn Fail Address
bits : 0 - 31 (32 bit)
access : read-only
ACTZS CSLn Fail Status Control Register
address_offset : 0x2728 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 19 (20 bit)
access : read-only
FPR : CSLn Fail Privileged
bits : 20 - 20 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a user mode access.
#1 : 1
Last captured CSLn access check violation was a privileged access.
End of enumeration elements list.
FNS : CSLn Fail Nonsecure
bits : 21 - 21 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a secure access.
#1 : 1
Last captured CSLn access check violation was a nonsecure access.
End of enumeration elements list.
RESERVED : no description available
bits : 22 - 23 (2 bit)
access : read-only
FWT : CSLn Fail Write
bits : 24 - 24 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a read.
#1 : 1
Last captured CSLn access check violation was a write.
End of enumeration elements list.
RESERVED : no description available
bits : 25 - 31 (7 bit)
access : read-only
ACTZS CSLn Fail Status Master ID Register
address_offset : 0x2734 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FMID : CSLn Fail Master ID
bits : 0 - 4 (5 bit)
access : read-only
RESERVED : no description available
bits : 5 - 31 (27 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2776A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Processor 0 Master Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PPN : Processor x Physical Port Number
bits : 0 - 4 (5 bit)
access : read-only
RESERVED : no description available
bits : 5 - 31 (27 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x28078 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x28988 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2929A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x29BAE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2A4C4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2A8C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2ADDC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2B6F6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Processor 0 Count Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PCNT : Processor Count
bits : 0 - 0 (1 bit)
access : read-only
RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2C012 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2C930 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2D250 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2DB72 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2E496 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2EDBC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2F6E4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3000E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3093A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x31268 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x31B98 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x324CA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x32DFE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3314 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x33734 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Processor X Configuration Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only
DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only
ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only
ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3406C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
ACTZS CSLn Fail Status Address (Low) Register
address_offset : 0x3430 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FAD : CSLn Fail Address
bits : 0 - 31 (32 bit)
access : read-only
ACTZS CSLn Fail Status Control Register
address_offset : 0x3450 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 19 (20 bit)
access : read-only
FPR : CSLn Fail Privileged
bits : 20 - 20 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a user mode access.
#1 : 1
Last captured CSLn access check violation was a privileged access.
End of enumeration elements list.
FNS : CSLn Fail Nonsecure
bits : 21 - 21 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a secure access.
#1 : 1
Last captured CSLn access check violation was a nonsecure access.
End of enumeration elements list.
RESERVED : no description available
bits : 22 - 23 (2 bit)
access : read-only
FWT : CSLn Fail Write
bits : 24 - 24 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a read.
#1 : 1
Last captured CSLn access check violation was a write.
End of enumeration elements list.
RESERVED : no description available
bits : 25 - 31 (7 bit)
access : read-only
ACTZS CSLn Fail Status Master ID Register
address_offset : 0x3460 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FMID : CSLn Fail Master ID
bits : 0 - 4 (5 bit)
access : read-only
RESERVED : no description available
bits : 5 - 31 (27 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x349A6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x352E2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x35C20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x36560 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x36EA2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x377E6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3812C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x38A74 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x393BE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x39D0A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3A658 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3AFA8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3B8FA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3B9E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3C24E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3CBA4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3D4FC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3DE56 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3E7B2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3F110 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Processor X Number Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CPN : Processor x Number
bits : 0 - 0 (1 bit)
access : read-only
RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-only
Processor 1 Type Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
rYpZ : Processor x Revision
bits : 0 - 7 (8 bit)
access : read-only
Personality : Processor x Personality
bits : 8 - 31 (24 bit)
access : read-only
ACTZS CSLn Fail Status Address (Low) Register
address_offset : 0x4160 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FAD : CSLn Fail Address
bits : 0 - 31 (32 bit)
access : read-only
ACTZS CSLn Fail Status Control Register
address_offset : 0x4188 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 19 (20 bit)
access : read-only
FPR : CSLn Fail Privileged
bits : 20 - 20 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a user mode access.
#1 : 1
Last captured CSLn access check violation was a privileged access.
End of enumeration elements list.
FNS : CSLn Fail Nonsecure
bits : 21 - 21 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a secure access.
#1 : 1
Last captured CSLn access check violation was a nonsecure access.
End of enumeration elements list.
RESERVED : no description available
bits : 22 - 23 (2 bit)
access : read-only
FWT : CSLn Fail Write
bits : 24 - 24 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a read.
#1 : 1
Last captured CSLn access check violation was a write.
End of enumeration elements list.
RESERVED : no description available
bits : 25 - 31 (7 bit)
access : read-only
ACTZS CSLn Fail Status Master ID Register
address_offset : 0x419C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FMID : CSLn Fail Master ID
bits : 0 - 4 (5 bit)
access : read-only
RESERVED : no description available
bits : 5 - 31 (27 bit)
access : read-only
Processor 1 Number Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CPN : Processor x Number
bits : 0 - 0 (1 bit)
access : read-only
RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x442A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Processor 1 Master Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PPN : Processor x Physical Port Number
bits : 0 - 4 (5 bit)
access : read-only
RESERVED : no description available
bits : 5 - 31 (27 bit)
access : read-only
Processor X Configuration Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only
DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only
ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only
ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only
Processor 1 Count Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PCNT : Processor Count
bits : 0 - 0 (1 bit)
access : read-only
RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x4CB8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
ACTZS CSLn Fail Status Address (Low) Register
address_offset : 0x4EA0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FAD : CSLn Fail Address
bits : 0 - 31 (32 bit)
access : read-only
ACTZS CSLn Fail Status Control Register
address_offset : 0x4ED0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 19 (20 bit)
access : read-only
FPR : CSLn Fail Privileged
bits : 20 - 20 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a user mode access.
#1 : 1
Last captured CSLn access check violation was a privileged access.
End of enumeration elements list.
FNS : CSLn Fail Nonsecure
bits : 21 - 21 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a secure access.
#1 : 1
Last captured CSLn access check violation was a nonsecure access.
End of enumeration elements list.
RESERVED : no description available
bits : 22 - 23 (2 bit)
access : read-only
FWT : CSLn Fail Write
bits : 24 - 24 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a read.
#1 : 1
Last captured CSLn access check violation was a write.
End of enumeration elements list.
RESERVED : no description available
bits : 25 - 31 (7 bit)
access : read-only
ACTZS CSLn Fail Status Master ID Register
address_offset : 0x4EE8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FMID : CSLn Fail Master ID
bits : 0 - 4 (5 bit)
access : read-only
RESERVED : no description available
bits : 5 - 31 (27 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x5548 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
ACTZS CSLn Fail Status Address (Low) Register
address_offset : 0x5BF0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FAD : CSLn Fail Address
bits : 0 - 31 (32 bit)
access : read-only
ACTZS CSLn Fail Status Control Register
address_offset : 0x5C28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 19 (20 bit)
access : read-only
FPR : CSLn Fail Privileged
bits : 20 - 20 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a user mode access.
#1 : 1
Last captured CSLn access check violation was a privileged access.
End of enumeration elements list.
FNS : CSLn Fail Nonsecure
bits : 21 - 21 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a secure access.
#1 : 1
Last captured CSLn access check violation was a nonsecure access.
End of enumeration elements list.
RESERVED : no description available
bits : 22 - 23 (2 bit)
access : read-only
FWT : CSLn Fail Write
bits : 24 - 24 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a read.
#1 : 1
Last captured CSLn access check violation was a write.
End of enumeration elements list.
RESERVED : no description available
bits : 25 - 31 (7 bit)
access : read-only
ACTZS CSLn Fail Status Master ID Register
address_offset : 0x5C44 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FMID : CSLn Fail Master ID
bits : 0 - 4 (5 bit)
access : read-only
RESERVED : no description available
bits : 5 - 31 (27 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x5DDA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Processor 0 Configuration Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only
DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only
ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only
ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x666E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Processor X Configuration Register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only
DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only
ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only
ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only
ACTZS CSLn Fail Status Address (Low) Register
address_offset : 0x6950 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FAD : CSLn Fail Address
bits : 0 - 31 (32 bit)
access : read-only
ACTZS CSLn Fail Status Control Register
address_offset : 0x6990 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 19 (20 bit)
access : read-only
FPR : CSLn Fail Privileged
bits : 20 - 20 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a user mode access.
#1 : 1
Last captured CSLn access check violation was a privileged access.
End of enumeration elements list.
FNS : CSLn Fail Nonsecure
bits : 21 - 21 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a secure access.
#1 : 1
Last captured CSLn access check violation was a nonsecure access.
End of enumeration elements list.
RESERVED : no description available
bits : 22 - 23 (2 bit)
access : read-only
FWT : CSLn Fail Write
bits : 24 - 24 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a read.
#1 : 1
Last captured CSLn access check violation was a write.
End of enumeration elements list.
RESERVED : no description available
bits : 25 - 31 (7 bit)
access : read-only
ACTZS CSLn Fail Status Master ID Register
address_offset : 0x69B0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FMID : CSLn Fail Master ID
bits : 0 - 4 (5 bit)
access : read-only
RESERVED : no description available
bits : 5 - 31 (27 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x6F04 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
ACTZS CSLn Fail Status Address (Low) Register
address_offset : 0x76C0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FAD : CSLn Fail Address
bits : 0 - 31 (32 bit)
access : read-only
ACTZS CSLn Fail Status Control Register
address_offset : 0x7708 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 19 (20 bit)
access : read-only
FPR : CSLn Fail Privileged
bits : 20 - 20 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a user mode access.
#1 : 1
Last captured CSLn access check violation was a privileged access.
End of enumeration elements list.
FNS : CSLn Fail Nonsecure
bits : 21 - 21 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a secure access.
#1 : 1
Last captured CSLn access check violation was a nonsecure access.
End of enumeration elements list.
RESERVED : no description available
bits : 22 - 23 (2 bit)
access : read-only
FWT : CSLn Fail Write
bits : 24 - 24 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a read.
#1 : 1
Last captured CSLn access check violation was a write.
End of enumeration elements list.
RESERVED : no description available
bits : 25 - 31 (7 bit)
access : read-only
ACTZS CSLn Fail Status Master ID Register
address_offset : 0x772C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FMID : CSLn Fail Master ID
bits : 0 - 4 (5 bit)
access : read-only
RESERVED : no description available
bits : 5 - 31 (27 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x779C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Processor X Master Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PPN : Processor x Physical Port Number
bits : 0 - 4 (5 bit)
access : read-only
RESERVED : no description available
bits : 5 - 31 (27 bit)
access : read-only
Interrupt Router CP0 Interrupt Register
address_offset : 0x800 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INT0 : Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
No interrupt is asserted
#1 : 1
Interrupt 0 to CP0 is asserted
End of enumeration elements list.
INT1 : Interrupt 1
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
No interrupt is asserted
#1 : 1
Interrupt 1 to CP0 is asserted
End of enumeration elements list.
INT2 : Interrupt 2
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
No interrupt is asserted
#1 : 1
Interrupt 2 to CP0 is asserted
End of enumeration elements list.
INT3 : Interrupt 3
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
No interrupt is asserted
#1 : 1
Interrupt 3 to CP0 is asserted
End of enumeration elements list.
RESERVED : no description available
bits : 4 - 31 (28 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x8036 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router CP1 Interrupt Register
address_offset : 0x804 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INT0 : Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
No interrupt is asserted
#1 : 1
Interrupt 0 to CP1 is asserted
End of enumeration elements list.
INT1 : Interrupt 1
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
No interrupt is asserted
#1 : 1
Interrupt 1 to CP1 is asserted
End of enumeration elements list.
INT2 : Interrupt 2
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
No interrupt is asserted
#1 : 1
Interrupt 2 to CP1 is asserted
End of enumeration elements list.
INT3 : Interrupt 3
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
No interrupt is asserted
#1 : 1
Interrupt 3 to CP1 is asserted
End of enumeration elements list.
RESERVED : no description available
bits : 4 - 31 (28 bit)
access : read-only
Interrupt Router CPU Generate Interrupt Register
address_offset : 0x820 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
INTID : Interrupt ID
bits : 0 - 1 (2 bit)
access : write-only
Enumeration:
#00 : 00
MSCM_IRCPnIR[0] loaded as defined by TLF and CPUTL
#01 : 01
MSCM_IRCPnIR[1] loaded as defined by TLF and CPUTL
#10 : 10
MSCM_IRCPnIR[2] loaded as defined by TLF and CPUTL
#11 : 11
MSCM_IRCPnIR[3] loaded as defined by TLF and CPUTL
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 15 (14 bit)
access : write-only
CPUTL : CPU Target List
bits : 16 - 17 (2 bit)
access : write-only
RESERVED : no description available
bits : 18 - 23 (6 bit)
access : write-only
TLF : Target List Field
bits : 24 - 25 (2 bit)
access : write-only
Enumeration:
#00 : 00
Use the CPUTL (CPU Target List) field to assert directed CPU interrupt(s)
#01 : 01
Assert directed CPU interrupts for all processors except the requesting core
#10 : 10
Assert the directed CPU interrupt for only the requesting core
#11 : 11
Reserved
End of enumeration elements list.
RESERVED : no description available
bits : 26 - 31 (6 bit)
access : write-only
ACTZS CSLn Fail Status Address (Low) Register
address_offset : 0x8440 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FAD : CSLn Fail Address
bits : 0 - 31 (32 bit)
access : read-only
ACTZS CSLn Fail Status Control Register
address_offset : 0x8490 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 19 (20 bit)
access : read-only
FPR : CSLn Fail Privileged
bits : 20 - 20 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a user mode access.
#1 : 1
Last captured CSLn access check violation was a privileged access.
End of enumeration elements list.
FNS : CSLn Fail Nonsecure
bits : 21 - 21 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a secure access.
#1 : 1
Last captured CSLn access check violation was a nonsecure access.
End of enumeration elements list.
RESERVED : no description available
bits : 22 - 23 (2 bit)
access : read-only
FWT : CSLn Fail Write
bits : 24 - 24 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a read.
#1 : 1
Last captured CSLn access check violation was a write.
End of enumeration elements list.
RESERVED : no description available
bits : 25 - 31 (7 bit)
access : read-only
ACTZS CSLn Fail Status Master ID Register
address_offset : 0x84B8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FMID : CSLn Fail Master ID
bits : 0 - 4 (5 bit)
access : read-only
RESERVED : no description available
bits : 5 - 31 (27 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x88D2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x9170 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
ACTZS CSLn Fail Status Address (Low) Register
address_offset : 0x91D0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FAD : CSLn Fail Address
bits : 0 - 31 (32 bit)
access : read-only
ACTZS CSLn Fail Status Control Register
address_offset : 0x9228 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 19 (20 bit)
access : read-only
FPR : CSLn Fail Privileged
bits : 20 - 20 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a user mode access.
#1 : 1
Last captured CSLn access check violation was a privileged access.
End of enumeration elements list.
FNS : CSLn Fail Nonsecure
bits : 21 - 21 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a secure access.
#1 : 1
Last captured CSLn access check violation was a nonsecure access.
End of enumeration elements list.
RESERVED : no description available
bits : 22 - 23 (2 bit)
access : read-only
FWT : CSLn Fail Write
bits : 24 - 24 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a read.
#1 : 1
Last captured CSLn access check violation was a write.
End of enumeration elements list.
RESERVED : no description available
bits : 25 - 31 (7 bit)
access : read-only
ACTZS CSLn Fail Status Master ID Register
address_offset : 0x9254 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FMID : CSLn Fail Master ID
bits : 0 - 4 (5 bit)
access : read-only
RESERVED : no description available
bits : 5 - 31 (27 bit)
access : read-only
Processor 0 Configuration Register
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only
DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only
ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only
ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x9A10 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
ACTZS CSLn Fail Status Address (Low) Register
address_offset : 0x9F70 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FAD : CSLn Fail Address
bits : 0 - 31 (32 bit)
access : read-only
ACTZS CSLn Fail Status Control Register
address_offset : 0x9FD0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 19 (20 bit)
access : read-only
FPR : CSLn Fail Privileged
bits : 20 - 20 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a user mode access.
#1 : 1
Last captured CSLn access check violation was a privileged access.
End of enumeration elements list.
FNS : CSLn Fail Nonsecure
bits : 21 - 21 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a secure access.
#1 : 1
Last captured CSLn access check violation was a nonsecure access.
End of enumeration elements list.
RESERVED : no description available
bits : 22 - 23 (2 bit)
access : read-only
FWT : CSLn Fail Write
bits : 24 - 24 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a read.
#1 : 1
Last captured CSLn access check violation was a write.
End of enumeration elements list.
RESERVED : no description available
bits : 25 - 31 (7 bit)
access : read-only
Processor 1 Configuration Register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only
DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only
ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only
ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only
ACTZS CSLn Fail Status Master ID Register
address_offset : 0xA000 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FMID : CSLn Fail Master ID
bits : 0 - 4 (5 bit)
access : read-only
RESERVED : no description available
bits : 5 - 31 (27 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xA2B2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xAB56 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
ACTZS CSLn Fail Status Address (Low) Register
address_offset : 0xAD20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FAD : CSLn Fail Address
bits : 0 - 31 (32 bit)
access : read-only
ACTZS CSLn Fail Status Control Register
address_offset : 0xAD88 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 19 (20 bit)
access : read-only
FPR : CSLn Fail Privileged
bits : 20 - 20 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a user mode access.
#1 : 1
Last captured CSLn access check violation was a privileged access.
End of enumeration elements list.
FNS : CSLn Fail Nonsecure
bits : 21 - 21 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a secure access.
#1 : 1
Last captured CSLn access check violation was a nonsecure access.
End of enumeration elements list.
RESERVED : no description available
bits : 22 - 23 (2 bit)
access : read-only
FWT : CSLn Fail Write
bits : 24 - 24 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a read.
#1 : 1
Last captured CSLn access check violation was a write.
End of enumeration elements list.
RESERVED : no description available
bits : 25 - 31 (7 bit)
access : read-only
ACTZS CSLn Fail Status Master ID Register
address_offset : 0xADBC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FMID : CSLn Fail Master ID
bits : 0 - 4 (5 bit)
access : read-only
RESERVED : no description available
bits : 5 - 31 (27 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xB3FC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
ACTZS CSLn Fail Status Address (Low) Register
address_offset : 0xBAE0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FAD : CSLn Fail Address
bits : 0 - 31 (32 bit)
access : read-only
ACTZS CSLn Fail Status Control Register
address_offset : 0xBB50 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 19 (20 bit)
access : read-only
FPR : CSLn Fail Privileged
bits : 20 - 20 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a user mode access.
#1 : 1
Last captured CSLn access check violation was a privileged access.
End of enumeration elements list.
FNS : CSLn Fail Nonsecure
bits : 21 - 21 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a secure access.
#1 : 1
Last captured CSLn access check violation was a nonsecure access.
End of enumeration elements list.
RESERVED : no description available
bits : 22 - 23 (2 bit)
access : read-only
FWT : CSLn Fail Write
bits : 24 - 24 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a read.
#1 : 1
Last captured CSLn access check violation was a write.
End of enumeration elements list.
RESERVED : no description available
bits : 25 - 31 (7 bit)
access : read-only
ACTZS CSLn Fail Status Master ID Register
address_offset : 0xBB88 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FMID : CSLn Fail Master ID
bits : 0 - 4 (5 bit)
access : read-only
RESERVED : no description available
bits : 5 - 31 (27 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xBCA4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Processor X Count Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PCNT : Processor Count
bits : 0 - 0 (1 bit)
access : read-only
RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-only
ACTZS TrustZone Enable Register
address_offset : 0xC00 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 0 (1 bit)
access : read-only
TZEN1 : TrustZone Enable 1
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
FlexBus TZASC module is disabled and logically bypassed.
#1 : 1
FlexBus TZASC module is enabled.
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 2 (1 bit)
access : read-only
TZEN3 : TrustZone Enable 3
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
CM4-TCM backdoor port TZASC module is disabled and logically bypassed.
#1 : 1
CM4-TCM backdoor port TZASC module is enabled.
End of enumeration elements list.
TZEN4 : TrustZone Enable 4
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
QuadSPI0 TZASC module is disabled and logically bypassed.
#1 : 1
QuadSPI0 TZASC module is enabled.
End of enumeration elements list.
TZEN5 : TrustZone Enable 5
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
OCRAM0_sys TZASC module is disabled and logically bypassed.
#1 : 1
OCRAM0_sys TZASC module is enabled.
End of enumeration elements list.
TZEN6 : TrustZone Enable 6
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
OCRAM1_sys is disabled and logically bypassed.
#1 : 1
OCRAM1_sys is enabled.
End of enumeration elements list.
TZEN7 : TrustZone Enable 7
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
OCRAM2_gfx TZASC module is disabled and logically bypassed.
#1 : 1
OCRAM2_gfx TZASC module is enabled.
End of enumeration elements list.
RESERVED : no description available
bits : 8 - 8 (1 bit)
access : read-only
TZEN9 : TrustZone Enable 9
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
QuadSPI1 TZASC module is disabled and logically bypassed
#1 : 1
QuadSPI1 TZASC module is enabled.
End of enumeration elements list.
RESERVED : no description available
bits : 10 - 10 (1 bit)
access : read-only
TZEN11 : TrustZone Enable 11
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
DDR0/DDR1 TZASC module is disabled and logically bypassed.
#1 : 1
DDR0/DDR1 TZASC module is enabled.
End of enumeration elements list.
RESERVED : no description available
bits : 12 - 27 (16 bit)
access : read-only
SBL : Secure Boot Lock
bits : 28 - 28 (1 bit)
access : read-write
Enumeration:
#0 : 0
TZASC's special register contents are not locked.
#1 : 1
TZASC's special register contents are locked.
End of enumeration elements list.
RESERVED : no description available
bits : 29 - 30 (2 bit)
access : read-only
RO : no description available
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Writes to the ACTZS_TZENR are allowed
#1 : 1
Writes to the ACTZS_TZENR are ignored
End of enumeration elements list.
ACTZS TrustZone Interrupt Register
address_offset : 0xC04 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 0 (1 bit)
access : read-only
TZINT1 : TrustZone Interrupt 1
bits : 1 - 1 (1 bit)
access : read-only
Enumeration:
#0 : 0
FlexBus's interrupt is negated.
#1 : 1
FlexBus's interrupt is asserted.
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 2 (1 bit)
access : read-only
TZINT3 : TrustZone Interrupt 3
bits : 3 - 3 (1 bit)
access : read-only
Enumeration:
#0 : 0
CM4-TCM backdoor port's interrupt is negated.
#1 : 1
CM4-TCM backdoor port's interrupt is asserted.
End of enumeration elements list.
TZINT4 : TrustZone Interrupt 4
bits : 4 - 4 (1 bit)
access : read-only
Enumeration:
#0 : 0
QuadSPI0's interrupt is negated.
#1 : 1
QuadSPI0's interrupt is asserted.
End of enumeration elements list.
TZINT5 : TrustZone Interrupt 5
bits : 5 - 5 (1 bit)
access : read-only
Enumeration:
#0 : 0
OCRAM0_sys's interrupt is negated.
#1 : 1
OCRAM0_sys's interrupt is asserted.
End of enumeration elements list.
TZINT6 : TrustZone Interrupt 6
bits : 6 - 6 (1 bit)
access : read-only
Enumeration:
#0 : 0
OCRAM1_sys's interrupt is negated.
#1 : 1
OCRAM1_sys's interrupt is asserted.
End of enumeration elements list.
TZINT7 : TrustZone Interrupt 7
bits : 7 - 7 (1 bit)
access : read-only
Enumeration:
#0 : 0
OCRAM2_gfx's interrupt is negated.
#1 : 1
OCRAM2_gfx's interrupt is asserted.
End of enumeration elements list.
RESERVED : no description available
bits : 8 - 8 (1 bit)
access : read-only
TZINT9 : TrustZone Interrupt 9
bits : 9 - 9 (1 bit)
access : read-only
Enumeration:
#0 : 0
QuadSPI1's interrupt is negated.
#1 : 1
QuadSPI1's interrupt is asserted.
End of enumeration elements list.
RESERVED : no description available
bits : 10 - 10 (1 bit)
access : read-only
TZINT11 : TrustZone Interrupt 11
bits : 11 - 11 (1 bit)
access : read-only
Enumeration:
#0 : 0
DDR0/DDR's interrupt is negated.
#1 : 1
DDR0/DDR's interrupt is asserted.
End of enumeration elements list.
RESERVED : no description available
bits : 12 - 31 (20 bit)
access : read-only
ACTZS CSLn Interrupt Enable Register
address_offset : 0xC10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CIE0 : CSLn Interrupt Enable 0
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Boot ROM access check interrupt is disabled
#1 : 1
Boot ROM access check interrupt is enabled.
End of enumeration elements list.
CIE1 : CSLn Interrupt Enable 1
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
FlexBus access check interrupt is disabled.
#1 : 1
FlexBus access check interrupt is enabled.
End of enumeration elements list.
CIE2 : CSLn Interrupt Enable 2
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
GPIO access check interrupt is disabled.
#1 : 1
GPIO access check interrupt is enabled.
End of enumeration elements list.
CIE3 : CSLn Interrupt Enable 3
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
CM4-TCM backdoor port access check interrupt is disabled.
#1 : 1
CM4-TCM backdoor port access check interrupt is enabled.
End of enumeration elements list.
CIE4 : CSLn Interrupt Enable 4
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
QuadSPI0 access check interrupt is disabled.
#1 : 1
QuadSPI0 access check interrupt is enabled.
End of enumeration elements list.
RESERVED : no description available
bits : 5 - 7 (3 bit)
access : read-only
CIE8 : CSLn Interrupt Enable 8
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
QuadSPI1access check interrupt is disabled.
#1 : 1
QuadSPI1 access check interrupt is enabled.
End of enumeration elements list.
CIE9 : CSLn Interrupt Enable 9
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
QuadSPI1 access check interrupt is disabled.
#1 : 1
QuadSPI1 access check interrupt is enabled.
End of enumeration elements list.
CIE10 : CSLn Interrupt Enable 10
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
RLE access check interrupt is disabled
#1 : 1
RLE access check interrupt is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 11 - 11 (1 bit)
access : read-only
CIE12 : CSLn Interrupt Enable 12
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
PBRIDGE0 access check interrupt is disabled
#1 : 1
PBRIDGE0 access check interrupt is enabled
End of enumeration elements list.
CIE13 : CSLn Interrupt Enable 13
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
PBRIDGE1 access check is disabled.
#1 : 1
PBRIDGE1 access check interrupt is
End of enumeration elements list.
RESERVED : no description available
bits : 14 - 30 (17 bit)
access : read-only
RO : no description available
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Writes to the ACTZS_CSLIER are allowed
#1 : 1
Writes to the ACTZS_CSLIER are ignored
End of enumeration elements list.
ACTZS CSLn Interrupt Register
address_offset : 0xC14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INT0 : CSLn Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Boot ROM access check interrupt is negated.
#1 : 1
Boot ROM access check interrupt is asserted.
End of enumeration elements list.
INT1 : CSLn Interrupt 1
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
FlexBus access check interrupt is negated.
#1 : 1
FlexBus access check interrupt is assserted.
End of enumeration elements list.
INT2 : CSLn Interrupt 2
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
GPIO access check interrupt is negated.
#1 : 1
GPIO access check interrupt is asserted.
End of enumeration elements list.
INT3 : CSLn Interrupt 3
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
CM4-TCM backdoor port access check interrupt is negated.
#1 : 1
CM4-TCM backdoor port access check interrupt is asserted.
End of enumeration elements list.
INT4 : CSLn Interrupt 4
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
QuadSPI0 access check interrupt is negated.
#1 : 1
QuadSPI0 access check interrupt is asserted.
End of enumeration elements list.
RESERVED : no description available
bits : 5 - 7 (3 bit)
access : read-only
INT8 : CSLn Interrupt 8
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
SecureRAM access check interrupt is negated.
#1 : 1
SecureRAM access check interrupt is asserted.
End of enumeration elements list.
INT9 : CSLn Interrupt 9
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
QuadSPI1 access check interrupt is negated.
#1 : 1
QuadSPI1 access check interrupt is asserted.
End of enumeration elements list.
INT10 : CSLn Interrupt 10
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
RLE access check interrupt is negated.
#1 : 1
RLE access check interrupt is asserted.
End of enumeration elements list.
RESERVED : no description available
bits : 11 - 11 (1 bit)
access : read-only
INT12 : CSLn Interrupt 12
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
PBRIDGE0 access check interrupt is negated.
#1 : 1
PBRIDGE0 access check interrupt is asserted.
End of enumeration elements list.
INT13 : CSLn Interrupt 13
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
PBRIDGE1 access check interrupt is negated.
#1 : 1
PBRIDGE1 access check interrupt is asserted.
End of enumeration elements list.
RESERVED : no description available
bits : 14 - 31 (18 bit)
access : read-only
ACTZS CSLn Interrupt Overrun Register
address_offset : 0xC18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
OVR0 : CSLn Interrupt Overrun 0
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
#0 : 0
Boot ROM access check overrun has not been detected.
#1 : 1
Boot ROM access check overrun has been detected.
End of enumeration elements list.
OVR1 : CSLn Interrupt Overrun 1
bits : 1 - 1 (1 bit)
access : read-only
Enumeration:
#0 : 0
FlexBus access check overrun has not been detected.
#1 : 1
FlexBus access check overrun has been detected.
End of enumeration elements list.
OVR2 : CSLn Interrupt Overrun 2
bits : 2 - 2 (1 bit)
access : read-only
Enumeration:
#0 : 0
GPIO access check overrun has not been detected.
#1 : 1
GPIO access check overrun has been detected.
End of enumeration elements list.
OVR3 : CSLn Interrupt Overrun 3
bits : 3 - 3 (1 bit)
access : read-only
Enumeration:
#0 : 0
CM4-TCM backdoor port access check overrun has not been detected.
#1 : 1
CM4-TCM backdoor port access check overrun has been detected.
End of enumeration elements list.
OVR4 : CSLn Interrupt Overrun 4
bits : 4 - 4 (1 bit)
access : read-only
Enumeration:
#0 : 0
QuadSPI0 access check overrun has not been detected.
#1 : 1
QuadSPI0 access check overrun has been detected.
End of enumeration elements list.
RESERVED : no description available
bits : 5 - 7 (3 bit)
access : read-only
OVR8 : CSLn Interrupt Overrun 8
bits : 8 - 8 (1 bit)
access : read-only
Enumeration:
#0 : 0
SecureRAM access check overrun has not been detected.
#1 : 1
SecureRAM access check overrun has been detected.
End of enumeration elements list.
OVR9 : CSLn Interrupt Overrun 9
bits : 9 - 9 (1 bit)
access : read-only
Enumeration:
#0 : 0
QuadSPI1 access check overrun has not been detected.
#1 : 1
QuadSPI1 access check overrun has been detected.
End of enumeration elements list.
OVR10 : CSLn Interrupt Overrun 10
bits : 10 - 10 (1 bit)
access : read-only
Enumeration:
#0 : 0
RLE access check overrun has not been detected.
#1 : 1
RLE access check overrun has been detected.
End of enumeration elements list.
RESERVED : no description available
bits : 11 - 11 (1 bit)
access : read-only
OVR12 : CSLn Interrupt Overrun 12
bits : 12 - 12 (1 bit)
access : read-only
Enumeration:
#0 : 0
AIPS0 access check overrun has not been detected.
#1 : 1
AIPS0 access check overrun has been detected.
End of enumeration elements list.
OVR13 : CSLn Interrupt Overrun 13
bits : 13 - 13 (1 bit)
access : read-only
Enumeration:
#0 : 0
AIPS1 access check overrun has not been detected.
#1 : 1
AIPS1 access check overrun has been detected.
End of enumeration elements list.
RESERVED : no description available
bits : 14 - 31 (18 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xC54E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
ACTZS CSLn Fail Status Address (Low) Register
address_offset : 0xC8B0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FAD : CSLn Fail Address
bits : 0 - 31 (32 bit)
access : read-only
ACTZS CSLn Fail Status Control Register
address_offset : 0xC928 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 19 (20 bit)
access : read-only
FPR : CSLn Fail Privileged
bits : 20 - 20 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a user mode access.
#1 : 1
Last captured CSLn access check violation was a privileged access.
End of enumeration elements list.
FNS : CSLn Fail Nonsecure
bits : 21 - 21 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a secure access.
#1 : 1
Last captured CSLn access check violation was a nonsecure access.
End of enumeration elements list.
RESERVED : no description available
bits : 22 - 23 (2 bit)
access : read-only
FWT : CSLn Fail Write
bits : 24 - 24 (1 bit)
access : read-only
Enumeration:
#0 : 0
Last captured CSLn access check violation was a read.
#1 : 1
Last captured CSLn access check violation was a write.
End of enumeration elements list.
RESERVED : no description available
bits : 25 - 31 (7 bit)
access : read-only
ACTZS CSLn Fail Status Master ID Register
address_offset : 0xC964 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FMID : CSLn Fail Master ID
bits : 0 - 4 (5 bit)
access : read-only
RESERVED : no description available
bits : 5 - 31 (27 bit)
access : read-only
Processor 0 Configuration Register
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only
DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only
ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only
ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xCDFA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xD6A8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xDF58 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xE80A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xF0BE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
Processor 1 Configuration Register
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only
DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only
ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only
ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only
Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xF974 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP0 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP0 for the corresponding interrupt request is enabled
End of enumeration elements list.
CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Routing to CP1 for the corresponding interrupt request is disabled
#1 : 1
Routing to CP1 for the corresponding interrupt request is enabled
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only
RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
#0 : 0
Writes to the MSCM_IRSPRCn are allowed
#1 : 1
Writes to the MSCM_IRSPRCn are ignored
End of enumeration elements list.
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