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TCON

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x108 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CTRL1

COMP2

CTRL2

COMP3

COMP0_MSK

COMP1_MSK

COMP2_MSK

COMP3_MSK

PULSE0

PULSE1

PULSE2

PULSE3

PULSE4

PULSE5

BMC

PULSE0_MSK

PULSE1_MSK

PULSE2_MSK

PULSE3_MSK

PULSE4_MSK

PULSE5_MSK

SMX0

SMX1

SMX2

SMX3

SMX4

SMX5

SMX6

SMX7

SMX8

SMX9

COMP0

SMX10

SMX11

SMX12

SMX13

OMUX_LOW

OMUX_HIGH

LUT0

LUT1

LUT2

LUT3

LUT4

LUT5

LUT6

LUT7

LUT8

LUT9

COMP1

LUT10

LUT11

LUT12

LUT13


CTRL1

TCON control1 register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL1 CTRL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED RGB_PADDING RGB_PADDING_EN COLOR_DEPTH VSYNC_INV HSYNC_INV VLEN H_REF_SEL V_REF_SEL INIT_DELAY TCONx_INV INV_EN TCON_BYPASS RESERVED TCON_EN

RESERVED : no description available
bits : 0 - 0 (1 bit)
access : read-only

RGB_PADDING : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

all "0"

#1 : 1

all "1"

End of enumeration elements list.

RGB_PADDING_EN : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

disable padding during blanking

#1 : 1

enable padding during blanking

End of enumeration elements list.

COLOR_DEPTH : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

6 bits, the 2 LSB's are set to 2'b0

#1 : 1

8 bits

End of enumeration elements list.

VSYNC_INV : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

vsync_in signal is active high

#1 : 1

vsync_in signal is active low

End of enumeration elements list.

HSYNC_INV : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

hsync_in signal is active high

#1 : 1

hsync_in signal is active low

End of enumeration elements list.

VLEN : no description available
bits : 6 - 7 (2 bit)
access : read-write

H_REF_SEL : no description available
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

#00 : 00

select tcon_comp0 output as h_ref.

#01 : 01

select tcon_comp1 output as h_ref.

#10 : 10

select tcon_comp2 output as h_ref.

#11 : 11

select tcon_comp3 output as h_ref.

End of enumeration elements list.

V_REF_SEL : no description available
bits : 10 - 12 (3 bit)
access : read-write

Enumeration:

#000 : 000

select tcon_pulse0 output as v_ref

#001 : 001

select tcon_pulse1 output as v_ref

#010 : 010

select tcon_pulse2 output as v_ref

#011 : 011

select tcon_pulse3 output as v_ref

#100 : 100

select tcon_pulse4 output as v_ref

#101 : 101

select tcon_pulse5 output as v_ref

#110 : 110

select tcon_pulse0 output as v_ref, while reset vtgl_counter and vtgl[3] to 0 at rising edge of v_ref.

#111 : 111

select tcon_pulse0 output as v_ref, while set vtgl_counter to 1 and reset vtgl[3] to 0 at rising edge of v_ref.

End of enumeration elements list.

INIT_DELAY : no description available
bits : 13 - 15 (3 bit)
access : read-write

TCONx_INV : no description available
bits : 16 - 27 (12 bit)
access : read-write

Enumeration:

#0 : 0

do not invert tconx

#1 : 1

invert output tconx

End of enumeration elements list.

INV_EN : no description available
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disable output data inversion

#1 : 1

Enable output data inversion

End of enumeration elements list.

TCON_BYPASS : no description available
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

#0 : 0

Not bypass TCON. State of the TCON is decided by TCON_EN.

#1 : 1

Bypass TCON, both data and timing signals will pass through the TCON unmodified. see the "Bypass Mode" section for pin mapping in that mode.

End of enumeration elements list.

RESERVED : no description available
bits : 30 - 30 (1 bit)
access : read-only

TCON_EN : no description available
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disable TCON.

#1 : 1

enable TCON.

End of enumeration elements list.


COMP2

Comparator 2 configure register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMP2 COMP2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP_VALUE RESERVED FUNC_SEL

COMP_VALUE : no description available
bits : 0 - 11 (12 bit)
access : read-write

RESERVED : no description available
bits : 12 - 30 (19 bit)
access : read-only

FUNC_SEL : no description available
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

#0 : 0

compare on horizontal direction

#1 : 1

compare on vertical direction

End of enumeration elements list.


CTRL2

TCON control2 register
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL2 CTRL2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DIV_RATIO RESERVED CLK_OFFSET RESERVED

DIV_RATIO : no description available
bits : 0 - 7 (8 bit)
access : read-write

RESERVED : no description available
bits : 8 - 15 (8 bit)
access : read-only

CLK_OFFSET : no description available
bits : 16 - 24 (9 bit)
access : read-write

RESERVED : no description available
bits : 25 - 31 (7 bit)
access : read-only


COMP3

Comparator 3 configure register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMP3 COMP3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP_VALUE RESERVED FUNC_SEL

COMP_VALUE : no description available
bits : 0 - 11 (12 bit)
access : read-write

RESERVED : no description available
bits : 12 - 30 (19 bit)
access : read-only

FUNC_SEL : no description available
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

#0 : 0

compare on horizontal direction

#1 : 1

compare on vertical direction

End of enumeration elements list.


COMP0_MSK

Comparator 0 compare value mask register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMP0_MSK COMP0_MSK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MSK RESERVED

MSK : no description available
bits : 0 - 11 (12 bit)
access : read-write

Enumeration:

#0 : 0

Ignore the given bit x in comparator matching

#1 : 1

Include the given bit x in comparator matching

End of enumeration elements list.

RESERVED : no description available
bits : 12 - 31 (20 bit)
access : read-only


COMP1_MSK

Comparator 1 compare value mask register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMP1_MSK COMP1_MSK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MSK RESERVED

MSK : no description available
bits : 0 - 11 (12 bit)
access : read-write

Enumeration:

#0 : 0

Ignore the given bit x in comparator matching

#1 : 1

Include the given bit x in comparator matching

End of enumeration elements list.

RESERVED : no description available
bits : 12 - 31 (20 bit)
access : read-only


COMP2_MSK

Comparator 2 compare value mask register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMP2_MSK COMP2_MSK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MSK RESERVED

MSK : no description available
bits : 0 - 11 (12 bit)
access : read-write

Enumeration:

#0 : 0

Ignore the given bit x in comparator matching

#1 : 1

Include the given bit x in comparator matching

End of enumeration elements list.

RESERVED : no description available
bits : 12 - 31 (20 bit)
access : read-only


COMP3_MSK

Comparator 3 compare value mask register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMP3_MSK COMP3_MSK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MSK RESERVED

MSK : no description available
bits : 0 - 11 (12 bit)
access : read-write

Enumeration:

#0 : 0

Ignore the given bit x in comparator matching

#1 : 1

Include the given bit x in comparator matching

End of enumeration elements list.

RESERVED : no description available
bits : 12 - 31 (20 bit)
access : read-only


PULSE0

Pulse 0 configure register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PULSE0 PULSE0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESET RESERVED COMPARATOR_SEL SET RESERVED FUNC_SEL

RESET : no description available
bits : 0 - 11 (12 bit)
access : read-write

RESERVED : no description available
bits : 12 - 13 (2 bit)
access : read-only

COMPARATOR_SEL : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

select comparator0

#01 : 01

select comparator1

#10 : 10

select comparator2

#11 : 11

select comparator3

End of enumeration elements list.

SET : no description available
bits : 16 - 27 (12 bit)
access : read-write

RESERVED : no description available
bits : 28 - 29 (2 bit)
access : read-only

FUNC_SEL : no description available
bits : 30 - 31 (2 bit)
access : read-write

Enumeration:

#00 : 00

SET/RESET value both for horizontal compare

#01 : 01

SET/RESET value both for vertical compare, signal transition point determined by COMPARATOR_SEL

#10 : 10

SET/RESET value both for vertical compare, signal transitions at the beginning of the line which is matched.

#11 : 11

SET value for horizontal compare, RESET value for vertical compare. Signal transition point for RESET determined by COMPARATOR_SEL.

End of enumeration elements list.


PULSE1

Pulse 1 configure register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PULSE1 PULSE1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESET RESERVED COMPARATOR_SEL SET RESERVED FUNC_SEL

RESET : no description available
bits : 0 - 11 (12 bit)
access : read-write

RESERVED : no description available
bits : 12 - 13 (2 bit)
access : read-only

COMPARATOR_SEL : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

select comparator0

#01 : 01

select comparator1

#10 : 10

select comparator2

#11 : 11

select comparator3

End of enumeration elements list.

SET : no description available
bits : 16 - 27 (12 bit)
access : read-write

RESERVED : no description available
bits : 28 - 29 (2 bit)
access : read-only

FUNC_SEL : no description available
bits : 30 - 31 (2 bit)
access : read-write

Enumeration:

#00 : 00

SET/RESET value both for horizontal compare

#01 : 01

SET/RESET value both for vertical compare, signal transition point determined by COMPARATOR_SEL

#10 : 10

SET/RESET value both for vertical compare, signal transitions at the beginning of the line which is matched.

#11 : 11

SET value for horizontal compare, RESET value for vertical compare. Signal transition point for RESET determined by COMPARATOR_SEL.

End of enumeration elements list.


PULSE2

Pulse 2 configure register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PULSE2 PULSE2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESET RESERVED COMPARATOR_SEL SET RESERVED FUNC_SEL

RESET : no description available
bits : 0 - 11 (12 bit)
access : read-write

RESERVED : no description available
bits : 12 - 13 (2 bit)
access : read-only

COMPARATOR_SEL : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

select comparator0

#01 : 01

select comparator1

#10 : 10

select comparator2

#11 : 11

select comparator3

End of enumeration elements list.

SET : no description available
bits : 16 - 27 (12 bit)
access : read-write

RESERVED : no description available
bits : 28 - 29 (2 bit)
access : read-only

FUNC_SEL : no description available
bits : 30 - 31 (2 bit)
access : read-write

Enumeration:

#00 : 00

SET/RESET value both for horizontal compare

#01 : 01

SET/RESET value both for vertical compare, signal transition point determined by COMPARATOR_SEL

#10 : 10

SET/RESET value both for vertical compare, signal transitions at the beginning of the line which is matched.

#11 : 11

SET value for horizontal compare, RESET value for vertical compare. Signal transition point for RESET determined by COMPARATOR_SEL.

End of enumeration elements list.


PULSE3

Pulse 3 configure register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PULSE3 PULSE3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESET RESERVED COMPARATOR_SEL SET RESERVED FUNC_SEL

RESET : no description available
bits : 0 - 11 (12 bit)
access : read-write

RESERVED : no description available
bits : 12 - 13 (2 bit)
access : read-only

COMPARATOR_SEL : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

select comparator0

#01 : 01

select comparator1

#10 : 10

select comparator2

#11 : 11

select comparator3

End of enumeration elements list.

SET : no description available
bits : 16 - 27 (12 bit)
access : read-write

RESERVED : no description available
bits : 28 - 29 (2 bit)
access : read-only

FUNC_SEL : no description available
bits : 30 - 31 (2 bit)
access : read-write

Enumeration:

#00 : 00

SET/RESET value both for horizontal compare

#01 : 01

SET/RESET value both for vertical compare, signal transition point determined by COMPARATOR_SEL

#10 : 10

SET/RESET value both for vertical compare, signal transitions at the beginning of the line which is matched.

#11 : 11

SET value for horizontal compare, RESET value for vertical compare. Signal transition point for RESET determined by COMPARATOR_SEL.

End of enumeration elements list.


PULSE4

Pulse 4 configure register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PULSE4 PULSE4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESET RESERVED COMPARATOR_SEL SET RESERVED FUNC_SEL

RESET : no description available
bits : 0 - 11 (12 bit)
access : read-write

RESERVED : no description available
bits : 12 - 13 (2 bit)
access : read-only

COMPARATOR_SEL : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

select comparator0

#01 : 01

select comparator1

#10 : 10

select comparator2

#11 : 11

select comparator3

End of enumeration elements list.

SET : no description available
bits : 16 - 27 (12 bit)
access : read-write

RESERVED : no description available
bits : 28 - 29 (2 bit)
access : read-only

FUNC_SEL : no description available
bits : 30 - 31 (2 bit)
access : read-write

Enumeration:

#00 : 00

SET/RESET value both for horizontal compare

#01 : 01

SET/RESET value both for vertical compare, signal transition point determined by COMPARATOR_SEL

#10 : 10

SET/RESET value both for vertical compare, signal transitions at the beginning of the line which is matched.

#11 : 11

SET value for horizontal compare, RESET value for vertical compare. Signal transition point for RESET determined by COMPARATOR_SEL.

End of enumeration elements list.


PULSE5

Pulse 5 configure register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PULSE5 PULSE5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESET RESERVED COMPARATOR_SEL SET RESERVED FUNC_SEL

RESET : no description available
bits : 0 - 11 (12 bit)
access : read-write

RESERVED : no description available
bits : 12 - 13 (2 bit)
access : read-only

COMPARATOR_SEL : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

select comparator0

#01 : 01

select comparator1

#10 : 10

select comparator2

#11 : 11

select comparator3

End of enumeration elements list.

SET : no description available
bits : 16 - 27 (12 bit)
access : read-write

RESERVED : no description available
bits : 28 - 29 (2 bit)
access : read-only

FUNC_SEL : no description available
bits : 30 - 31 (2 bit)
access : read-write

Enumeration:

#00 : 00

SET/RESET value both for horizontal compare

#01 : 01

SET/RESET value both for vertical compare, signal transition point determined by COMPARATOR_SEL

#10 : 10

SET/RESET value both for vertical compare, signal transitions at the beginning of the line which is matched.

#11 : 11

SET value for horizontal compare, RESET value for vertical compare. Signal transition point for RESET determined by COMPARATOR_SEL.

End of enumeration elements list.


BMC

Bit map control register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BMC BMC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED BIT_ORDER COLOR_ORDER CLK_POS RESERVED

RESERVED : no description available
bits : 0 - 0 (1 bit)
access : read-only

BIT_ORDER : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

MSB 7 down to LSB 0 for every color component

#1 : 1

LSB 0 up to MSB 7, for every color component. (inverted order)

End of enumeration elements list.

COLOR_ORDER : no description available
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

#000 : 000

RGB

#001 : 001

BRG

#010 : 010

GBR

#011 : 011

RBG

#100 : 100

GRB

#101 : 101

BGR

End of enumeration elements list.

CLK_POS : no description available
bits : 5 - 9 (5 bit)
access : read-write

RESERVED : no description available
bits : 10 - 31 (22 bit)
access : read-only


PULSE0_MSK

Pulse 0 compare value mask register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PULSE0_MSK PULSE0_MSK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESET_MSK RESERVED SET_MSK RESERVED

RESET_MSK : no description available
bits : 0 - 11 (12 bit)
access : read-write

Enumeration:

#0 : 0

Ignore x position in pulse generator reset value comparison.

#1 : 1

Include x position in pulse generator reset value comparison

End of enumeration elements list.

RESERVED : no description available
bits : 12 - 15 (4 bit)
access : read-only

SET_MSK : no description available
bits : 16 - 27 (12 bit)
access : read-write

Enumeration:

#0 : 0

Ignore x position in pulse generator set value comparison

#1 : 1

Include x postion in pulse generator set value comparison

End of enumeration elements list.

RESERVED : no description available
bits : 28 - 31 (4 bit)
access : read-only


PULSE1_MSK

Pulse 1 compare value mask register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PULSE1_MSK PULSE1_MSK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESET_MSK RESERVED SET_MSK RESERVED

RESET_MSK : no description available
bits : 0 - 11 (12 bit)
access : read-write

Enumeration:

#0 : 0

Ignore x position in pulse generator reset value comparison.

#1 : 1

Include x position in pulse generator reset value comparison

End of enumeration elements list.

RESERVED : no description available
bits : 12 - 15 (4 bit)
access : read-only

SET_MSK : no description available
bits : 16 - 27 (12 bit)
access : read-write

Enumeration:

#0 : 0

Ignore x position in pulse generator set value comparison

#1 : 1

Include x postion in pulse generator set value comparison

End of enumeration elements list.

RESERVED : no description available
bits : 28 - 31 (4 bit)
access : read-only


PULSE2_MSK

Pulse 2 compare value mask register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PULSE2_MSK PULSE2_MSK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESET_MSK RESERVED SET_MSK RESERVED

RESET_MSK : no description available
bits : 0 - 11 (12 bit)
access : read-write

Enumeration:

#0 : 0

Ignore x position in pulse generator reset value comparison.

#1 : 1

Include x position in pulse generator reset value comparison

End of enumeration elements list.

RESERVED : no description available
bits : 12 - 15 (4 bit)
access : read-only

SET_MSK : no description available
bits : 16 - 27 (12 bit)
access : read-write

Enumeration:

#0 : 0

Ignore x position in pulse generator set value comparison

#1 : 1

Include x postion in pulse generator set value comparison

End of enumeration elements list.

RESERVED : no description available
bits : 28 - 31 (4 bit)
access : read-only


PULSE3_MSK

Pulse 3 compare value mask register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PULSE3_MSK PULSE3_MSK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESET_MSK RESERVED SET_MSK RESERVED

RESET_MSK : no description available
bits : 0 - 11 (12 bit)
access : read-write

Enumeration:

#0 : 0

Ignore x position in pulse generator reset value comparison.

#1 : 1

Include x position in pulse generator reset value comparison

End of enumeration elements list.

RESERVED : no description available
bits : 12 - 15 (4 bit)
access : read-only

SET_MSK : no description available
bits : 16 - 27 (12 bit)
access : read-write

Enumeration:

#0 : 0

Ignore x position in pulse generator set value comparison

#1 : 1

Include x postion in pulse generator set value comparison

End of enumeration elements list.

RESERVED : no description available
bits : 28 - 31 (4 bit)
access : read-only


PULSE4_MSK

Pulse 4 compare value mask register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PULSE4_MSK PULSE4_MSK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESET_MSK RESERVED SET_MSK RESERVED

RESET_MSK : no description available
bits : 0 - 11 (12 bit)
access : read-write

Enumeration:

#0 : 0

Ignore x position in pulse generator reset value comparison.

#1 : 1

Include x position in pulse generator reset value comparison

End of enumeration elements list.

RESERVED : no description available
bits : 12 - 15 (4 bit)
access : read-only

SET_MSK : no description available
bits : 16 - 27 (12 bit)
access : read-write

Enumeration:

#0 : 0

Ignore x position in pulse generator set value comparison

#1 : 1

Include x postion in pulse generator set value comparison

End of enumeration elements list.

RESERVED : no description available
bits : 28 - 31 (4 bit)
access : read-only


PULSE5_MSK

Pulse 5 compare value mask register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PULSE5_MSK PULSE5_MSK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESET_MSK RESERVED SET_MSK RESERVED

RESET_MSK : no description available
bits : 0 - 11 (12 bit)
access : read-write

Enumeration:

#0 : 0

Ignore x position in pulse generator reset value comparison.

#1 : 1

Include x position in pulse generator reset value comparison

End of enumeration elements list.

RESERVED : no description available
bits : 12 - 15 (4 bit)
access : read-only

SET_MSK : no description available
bits : 16 - 27 (12 bit)
access : read-write

Enumeration:

#0 : 0

Ignore x position in pulse generator set value comparison

#1 : 1

Include x postion in pulse generator set value comparison

End of enumeration elements list.

RESERVED : no description available
bits : 28 - 31 (4 bit)
access : read-only


SMX0

Function control register 0
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMX0 SMX0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X_SEL Y_SEL RESERVED INDEX0_SEL INDEX1_SEL INDEX2_SEL INDEX3_SEL

X_SEL : no description available
bits : 0 - 4 (5 bit)
access : read-write

Y_SEL : no description available
bits : 5 - 9 (5 bit)
access : read-write

RESERVED : no description available
bits : 10 - 19 (10 bit)
access : read-only

INDEX0_SEL : no description available
bits : 20 - 22 (3 bit)
access : read-write

INDEX1_SEL : no description available
bits : 23 - 25 (3 bit)
access : read-write

INDEX2_SEL : no description available
bits : 26 - 28 (3 bit)
access : read-write

INDEX3_SEL : no description available
bits : 29 - 31 (3 bit)
access : read-write

Enumeration:

#000 : 000

index3 = 0;

#001 : 001

index3 = X;

#010 : 010

index3 = Y;

#011 : 011

index3 = X&Y;

#100 : 100

index3 = X|Y;

#101 : 101

index3 = X^Y;

#110 : 110

index3 = !(X&Y))

#111 : 111

reserved for use

End of enumeration elements list.


SMX1

Function control register 1
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMX1 SMX1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X_SEL Y_SEL RESERVED INDEX0_SEL INDEX1_SEL INDEX2_SEL INDEX3_SEL

X_SEL : no description available
bits : 0 - 4 (5 bit)
access : read-write

Y_SEL : no description available
bits : 5 - 9 (5 bit)
access : read-write

RESERVED : no description available
bits : 10 - 19 (10 bit)
access : read-only

INDEX0_SEL : no description available
bits : 20 - 22 (3 bit)
access : read-write

INDEX1_SEL : no description available
bits : 23 - 25 (3 bit)
access : read-write

INDEX2_SEL : no description available
bits : 26 - 28 (3 bit)
access : read-write

INDEX3_SEL : no description available
bits : 29 - 31 (3 bit)
access : read-write

Enumeration:

#000 : 000

index3 = 0;

#001 : 001

index3 = X;

#010 : 010

index3 = Y;

#011 : 011

index3 = X&Y;

#100 : 100

index3 = X|Y;

#101 : 101

index3 = X^Y;

#110 : 110

index3 = !(X&Y))

#111 : 111

reserved for use

End of enumeration elements list.


SMX2

Function control registers 2
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMX2 SMX2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X_SEL Y_SEL RESERVED INDEX0_SEL INDEX1_SEL INDEX2_SEL INDEX3_SEL

X_SEL : no description available
bits : 0 - 4 (5 bit)
access : read-write

Y_SEL : no description available
bits : 5 - 9 (5 bit)
access : read-write

RESERVED : no description available
bits : 10 - 19 (10 bit)
access : read-only

INDEX0_SEL : no description available
bits : 20 - 22 (3 bit)
access : read-write

INDEX1_SEL : no description available
bits : 23 - 25 (3 bit)
access : read-write

INDEX2_SEL : no description available
bits : 26 - 28 (3 bit)
access : read-write

INDEX3_SEL : no description available
bits : 29 - 31 (3 bit)
access : read-write

Enumeration:

#000 : 000

index3 = 0;

#001 : 001

index3 = X;

#010 : 010

index3 = Y;

#011 : 011

index3 = X&Y;

#100 : 100

index3 = X|Y;

#101 : 101

index3 = X^Y;

#110 : 110

index3 = !(X&Y))

#111 : 111

reserved for use

End of enumeration elements list.


SMX3

Function control register 3
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMX3 SMX3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X_SEL Y_SEL RESERVED INDEX0_SEL INDEX1_SEL INDEX2_SEL INDEX3_SEL

X_SEL : no description available
bits : 0 - 4 (5 bit)
access : read-write

Y_SEL : no description available
bits : 5 - 9 (5 bit)
access : read-write

RESERVED : no description available
bits : 10 - 19 (10 bit)
access : read-only

INDEX0_SEL : no description available
bits : 20 - 22 (3 bit)
access : read-write

INDEX1_SEL : no description available
bits : 23 - 25 (3 bit)
access : read-write

INDEX2_SEL : no description available
bits : 26 - 28 (3 bit)
access : read-write

INDEX3_SEL : no description available
bits : 29 - 31 (3 bit)
access : read-write

Enumeration:

#000 : 000

index3 = 0;

#001 : 001

index3 = X;

#010 : 010

index3 = Y;

#011 : 011

index3 = X&Y;

#100 : 100

index3 = X|Y;

#101 : 101

index3 = X^Y;

#110 : 110

index3 = !(X&Y))

#111 : 111

reserved for use

End of enumeration elements list.


SMX4

Function control register 4
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMX4 SMX4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X_SEL Y_SEL RESERVED INDEX0_SEL INDEX1_SEL INDEX2_SEL INDEX3_SEL

X_SEL : no description available
bits : 0 - 4 (5 bit)
access : read-write

Y_SEL : no description available
bits : 5 - 9 (5 bit)
access : read-write

RESERVED : no description available
bits : 10 - 19 (10 bit)
access : read-only

INDEX0_SEL : no description available
bits : 20 - 22 (3 bit)
access : read-write

INDEX1_SEL : no description available
bits : 23 - 25 (3 bit)
access : read-write

INDEX2_SEL : no description available
bits : 26 - 28 (3 bit)
access : read-write

INDEX3_SEL : no description available
bits : 29 - 31 (3 bit)
access : read-write

Enumeration:

#000 : 000

index3 = 0;

#001 : 001

index3 = X;

#010 : 010

index3 = Y;

#011 : 011

index3 = X&Y;

#100 : 100

index3 = X|Y;

#101 : 101

index3 = X^Y;

#110 : 110

index3 = !(X&Y))

#111 : 111

reserved for use

End of enumeration elements list.


SMX5

Function control register 5
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMX5 SMX5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X_SEL Y_SEL RESERVED INDEX0_SEL INDEX1_SEL INDEX2_SEL INDEX3_SEL

X_SEL : no description available
bits : 0 - 4 (5 bit)
access : read-write

Y_SEL : no description available
bits : 5 - 9 (5 bit)
access : read-write

RESERVED : no description available
bits : 10 - 19 (10 bit)
access : read-only

INDEX0_SEL : no description available
bits : 20 - 22 (3 bit)
access : read-write

INDEX1_SEL : no description available
bits : 23 - 25 (3 bit)
access : read-write

INDEX2_SEL : no description available
bits : 26 - 28 (3 bit)
access : read-write

INDEX3_SEL : no description available
bits : 29 - 31 (3 bit)
access : read-write

Enumeration:

#000 : 000

index3 = 0;

#001 : 001

index3 = X;

#010 : 010

index3 = Y;

#011 : 011

index3 = X&Y;

#100 : 100

index3 = X|Y;

#101 : 101

index3 = X^Y;

#110 : 110

index3 = !(X&Y))

#111 : 111

reserved for use

End of enumeration elements list.


SMX6

Function control register 6
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMX6 SMX6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X_SEL Y_SEL RESERVED INDEX0_SEL INDEX1_SEL INDEX2_SEL INDEX3_SEL

X_SEL : no description available
bits : 0 - 4 (5 bit)
access : read-write

Y_SEL : no description available
bits : 5 - 9 (5 bit)
access : read-write

RESERVED : no description available
bits : 10 - 19 (10 bit)
access : read-only

INDEX0_SEL : no description available
bits : 20 - 22 (3 bit)
access : read-write

INDEX1_SEL : no description available
bits : 23 - 25 (3 bit)
access : read-write

INDEX2_SEL : no description available
bits : 26 - 28 (3 bit)
access : read-write

INDEX3_SEL : no description available
bits : 29 - 31 (3 bit)
access : read-write

Enumeration:

#000 : 000

index3 = 0;

#001 : 001

index3 = X;

#010 : 010

index3 = Y;

#011 : 011

index3 = X&Y;

#100 : 100

index3 = X|Y;

#101 : 101

index3 = X^Y;

#110 : 110

index3 = !(X&Y))

#111 : 111

reserved for use

End of enumeration elements list.


SMX7

Function control register 7
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMX7 SMX7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X_SEL Y_SEL RESERVED INDEX0_SEL INDEX1_SEL INDEX2_SEL INDEX3_SEL

X_SEL : no description available
bits : 0 - 4 (5 bit)
access : read-write

Y_SEL : no description available
bits : 5 - 9 (5 bit)
access : read-write

RESERVED : no description available
bits : 10 - 19 (10 bit)
access : read-only

INDEX0_SEL : no description available
bits : 20 - 22 (3 bit)
access : read-write

INDEX1_SEL : no description available
bits : 23 - 25 (3 bit)
access : read-write

INDEX2_SEL : no description available
bits : 26 - 28 (3 bit)
access : read-write

INDEX3_SEL : no description available
bits : 29 - 31 (3 bit)
access : read-write

Enumeration:

#000 : 000

index3 = 0;

#001 : 001

index3 = X;

#010 : 010

index3 = Y;

#011 : 011

index3 = X&Y;

#100 : 100

index3 = X|Y;

#101 : 101

index3 = X^Y;

#110 : 110

index3 = !(X&Y))

#111 : 111

reserved for use

End of enumeration elements list.


SMX8

Function control register 8
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMX8 SMX8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X_SEL Y_SEL RESERVED INDEX0_SEL INDEX1_SEL INDEX2_SEL INDEX3_SEL

X_SEL : no description available
bits : 0 - 4 (5 bit)
access : read-write

Y_SEL : no description available
bits : 5 - 9 (5 bit)
access : read-write

RESERVED : no description available
bits : 10 - 19 (10 bit)
access : read-only

INDEX0_SEL : no description available
bits : 20 - 22 (3 bit)
access : read-write

INDEX1_SEL : no description available
bits : 23 - 25 (3 bit)
access : read-write

INDEX2_SEL : no description available
bits : 26 - 28 (3 bit)
access : read-write

INDEX3_SEL : no description available
bits : 29 - 31 (3 bit)
access : read-write

Enumeration:

#000 : 000

index3 = 0;

#001 : 001

index3 = X;

#010 : 010

index3 = Y;

#011 : 011

index3 = X&Y;

#100 : 100

index3 = X|Y;

#101 : 101

index3 = X^Y;

#110 : 110

index3 = !(X&Y))

#111 : 111

reserved for use

End of enumeration elements list.


SMX9

Function control register 9
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMX9 SMX9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X_SEL Y_SEL RESERVED INDEX0_SEL INDEX1_SEL INDEX2_SEL INDEX3_SEL

X_SEL : no description available
bits : 0 - 4 (5 bit)
access : read-write

Y_SEL : no description available
bits : 5 - 9 (5 bit)
access : read-write

RESERVED : no description available
bits : 10 - 19 (10 bit)
access : read-only

INDEX0_SEL : no description available
bits : 20 - 22 (3 bit)
access : read-write

INDEX1_SEL : no description available
bits : 23 - 25 (3 bit)
access : read-write

INDEX2_SEL : no description available
bits : 26 - 28 (3 bit)
access : read-write

INDEX3_SEL : no description available
bits : 29 - 31 (3 bit)
access : read-write

Enumeration:

#000 : 000

index3 = 0;

#001 : 001

index3 = X;

#010 : 010

index3 = Y;

#011 : 011

index3 = X&Y;

#100 : 100

index3 = X|Y;

#101 : 101

index3 = X^Y;

#110 : 110

index3 = !(X&Y))

#111 : 111

reserved for use

End of enumeration elements list.


COMP0

Comparator 0 configure register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMP0 COMP0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP_VALUE RESERVED FUNC_SEL

COMP_VALUE : no description available
bits : 0 - 11 (12 bit)
access : read-write

RESERVED : no description available
bits : 12 - 30 (19 bit)
access : read-only

FUNC_SEL : no description available
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

#0 : 0

compare on horizontal direction

#1 : 1

compare on vertical direction

End of enumeration elements list.


SMX10

Function control register 10
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMX10 SMX10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X_SEL Y_SEL RESERVED INDEX0_SEL INDEX1_SEL INDEX2_SEL INDEX3_SEL

X_SEL : no description available
bits : 0 - 4 (5 bit)
access : read-write

Y_SEL : no description available
bits : 5 - 9 (5 bit)
access : read-write

RESERVED : no description available
bits : 10 - 19 (10 bit)
access : read-only

INDEX0_SEL : no description available
bits : 20 - 22 (3 bit)
access : read-write

INDEX1_SEL : no description available
bits : 23 - 25 (3 bit)
access : read-write

INDEX2_SEL : no description available
bits : 26 - 28 (3 bit)
access : read-write

INDEX3_SEL : no description available
bits : 29 - 31 (3 bit)
access : read-write

Enumeration:

#000 : 000

index3 = 0;

#001 : 001

index3 = X;

#010 : 010

index3 = Y;

#011 : 011

index3 = X&Y;

#100 : 100

index3 = X|Y;

#101 : 101

index3 = X^Y;

#110 : 110

index3 = !(X&Y))

#111 : 111

reserved for use

End of enumeration elements list.


SMX11

Function control register 11
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMX11 SMX11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X_SEL Y_SEL RESERVED INDEX0_SEL INDEX1_SEL INDEX2_SEL INDEX3_SEL

X_SEL : no description available
bits : 0 - 4 (5 bit)
access : read-write

Y_SEL : no description available
bits : 5 - 9 (5 bit)
access : read-write

RESERVED : no description available
bits : 10 - 19 (10 bit)
access : read-only

INDEX0_SEL : no description available
bits : 20 - 22 (3 bit)
access : read-write

INDEX1_SEL : no description available
bits : 23 - 25 (3 bit)
access : read-write

INDEX2_SEL : no description available
bits : 26 - 28 (3 bit)
access : read-write

INDEX3_SEL : no description available
bits : 29 - 31 (3 bit)
access : read-write

Enumeration:

#000 : 000

index3 = 0;

#001 : 001

index3 = X;

#010 : 010

index3 = Y;

#011 : 011

index3 = X&Y;

#100 : 100

index3 = X|Y;

#101 : 101

index3 = X^Y;

#110 : 110

index3 = !(X&Y))

#111 : 111

reserved for use

End of enumeration elements list.


SMX12

Function control register 12
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMX12 SMX12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X_SEL Y_SEL RESERVED INDEX0_SEL INDEX1_SEL INDEX2_SEL INDEX3_SEL

X_SEL : no description available
bits : 0 - 4 (5 bit)
access : read-write

Y_SEL : no description available
bits : 5 - 9 (5 bit)
access : read-write

RESERVED : no description available
bits : 10 - 19 (10 bit)
access : read-only

INDEX0_SEL : no description available
bits : 20 - 22 (3 bit)
access : read-write

INDEX1_SEL : no description available
bits : 23 - 25 (3 bit)
access : read-write

INDEX2_SEL : no description available
bits : 26 - 28 (3 bit)
access : read-write

INDEX3_SEL : no description available
bits : 29 - 31 (3 bit)
access : read-write

Enumeration:

#000 : 000

index3 = 0;

#001 : 001

index3 = X;

#010 : 010

index3 = Y;

#011 : 011

index3 = X&Y;

#100 : 100

index3 = X|Y;

#101 : 101

index3 = X^Y;

#110 : 110

index3 = !(X&Y))

#111 : 111

reserved for use

End of enumeration elements list.


SMX13

Function control register 13
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMX13 SMX13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X_SEL Y_SEL RESERVED INDEX0_SEL INDEX1_SEL INDEX2_SEL INDEX3_SEL

X_SEL : no description available
bits : 0 - 4 (5 bit)
access : read-write

Y_SEL : no description available
bits : 5 - 9 (5 bit)
access : read-write

RESERVED : no description available
bits : 10 - 19 (10 bit)
access : read-only

INDEX0_SEL : no description available
bits : 20 - 22 (3 bit)
access : read-write

INDEX1_SEL : no description available
bits : 23 - 25 (3 bit)
access : read-write

INDEX2_SEL : no description available
bits : 26 - 28 (3 bit)
access : read-write

INDEX3_SEL : no description available
bits : 29 - 31 (3 bit)
access : read-write

Enumeration:

#000 : 000

index3 = 0;

#001 : 001

index3 = X;

#010 : 010

index3 = Y;

#011 : 011

index3 = X&Y;

#100 : 100

index3 = X|Y;

#101 : 101

index3 = X^Y;

#110 : 110

index3 = !(X&Y))

#111 : 111

reserved for use

End of enumeration elements list.


OMUX_LOW

TCON output mux control low
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OMUX_LOW OMUX_LOW read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TCON0 TCON1 TCON2 TCON3 TCON4 TCON5 RESERVED

TCON0 : no description available
bits : 0 - 4 (5 bit)
access : read-write

TCON1 : no description available
bits : 5 - 9 (5 bit)
access : read-write

TCON2 : no description available
bits : 10 - 14 (5 bit)
access : read-write

TCON3 : no description available
bits : 15 - 19 (5 bit)
access : read-write

TCON4 : no description available
bits : 20 - 24 (5 bit)
access : read-write

TCON5 : no description available
bits : 25 - 29 (5 bit)
access : read-write

RESERVED : no description available
bits : 30 - 31 (2 bit)
access : read-only


OMUX_HIGH

TCON output mux control high
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OMUX_HIGH OMUX_HIGH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TCON6 TCON7 TCON8 TCON9 TCON10 TCON11 RESERVED

TCON6 : no description available
bits : 0 - 4 (5 bit)
access : read-write

TCON7 : no description available
bits : 5 - 9 (5 bit)
access : read-write

TCON8 : no description available
bits : 10 - 14 (5 bit)
access : read-write

TCON9 : no description available
bits : 15 - 19 (5 bit)
access : read-write

TCON10 : no description available
bits : 20 - 24 (5 bit)
access : read-write

TCON11 : no description available
bits : 25 - 29 (5 bit)
access : read-write

RESERVED : no description available
bits : 30 - 31 (2 bit)
access : read-only


LUT0

TCON look up table 0
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LUT0 LUT0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LUT

LUT : no description available
bits : 0 - 31 (32 bit)
access : read-write


LUT1

TCON look up table 1
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LUT1 LUT1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LUT

LUT : no description available
bits : 0 - 31 (32 bit)
access : read-write


LUT2

TCON look up table 2
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LUT2 LUT2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LUT

LUT : no description available
bits : 0 - 31 (32 bit)
access : read-write


LUT3

TCON look up table 3
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LUT3 LUT3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LUT

LUT : no description available
bits : 0 - 31 (32 bit)
access : read-write


LUT4

TCON look up table 4
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LUT4 LUT4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LUT

LUT : no description available
bits : 0 - 31 (32 bit)
access : read-write


LUT5

TCON look up table 5
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LUT5 LUT5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LUT

LUT : no description available
bits : 0 - 31 (32 bit)
access : read-write


LUT6

TCON look up table 6
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LUT6 LUT6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LUT

LUT : no description available
bits : 0 - 31 (32 bit)
access : read-write


LUT7

TCON look up table 7
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LUT7 LUT7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LUT

LUT : no description available
bits : 0 - 31 (32 bit)
access : read-write


LUT8

TCON look up table 8
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LUT8 LUT8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LUT

LUT : no description available
bits : 0 - 31 (32 bit)
access : read-write


LUT9

TCON look up tables 9
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LUT9 LUT9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LUT

LUT : no description available
bits : 0 - 31 (32 bit)
access : read-write


COMP1

Comparator 1 configure register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COMP1 COMP1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP_VALUE RESERVED FUNC_SEL

COMP_VALUE : no description available
bits : 0 - 11 (12 bit)
access : read-write

RESERVED : no description available
bits : 12 - 30 (19 bit)
access : read-only

FUNC_SEL : no description available
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

#0 : 0

compare on horizontal direction

#1 : 1

compare on vertical direction

End of enumeration elements list.


LUT10

TCON look up table 10
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LUT10 LUT10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LUT

LUT : no description available
bits : 0 - 31 (32 bit)
access : read-write


LUT11

TCON look up table 11
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LUT11 LUT11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LUT

LUT : no description available
bits : 0 - 31 (32 bit)
access : read-write


LUT12

TCON look up table 12
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LUT12 LUT12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LUT

LUT : no description available
bits : 0 - 31 (32 bit)
access : read-write


LUT13

TCON look up table 13
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LUT13 LUT13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LUT

LUT : no description available
bits : 0 - 31 (32 bit)
access : read-write



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