Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x37C byte (0x0)
mem_usage : registers
protection : not protected
Config Security Level
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Alarm Routing Register
address_offset : 0x1018 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AROUT_n : Indicates if an input alarm can be routed to a specific alarm output
bits : 0 - 30 (31 bit)
access : read-write
Enumeration:
#0 : 0
Means this specific input alarm cannot be routed to nth Alarm Output
#1 : 1
Means this specific input alarm is routed to nth Alarm Output
End of enumeration elements list.
L_n : Lock bit set by secure software.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and previous bits(0-30) can be written by software
#1 : 1
Stands for locking of previous bits(0-30) and once set software cannot write
End of enumeration elements list.
Config Security Level
address_offset : 0x102C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x10E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x11A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x1260 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Alarm Routing Register
address_offset : 0x1274 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AROUT_n : Indicates if an input alarm can be routed to a specific alarm output
bits : 0 - 30 (31 bit)
access : read-write
Enumeration:
#0 : 0
Means this specific input alarm cannot be routed to nth Alarm Output
#1 : 1
Means this specific input alarm is routed to nth Alarm Output
End of enumeration elements list.
L_n : Lock bit set by secure software.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and previous bits(0-30) can be written by software
#1 : 1
Stands for locking of previous bits(0-30) and once set software cannot write
End of enumeration elements list.
Config Security Level
address_offset : 0x1324 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x13EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x14B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Alarm Routing Register
address_offset : 0x14D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AROUT_n : Indicates if an input alarm can be routed to a specific alarm output
bits : 0 - 30 (31 bit)
access : read-write
Enumeration:
#0 : 0
Means this specific input alarm cannot be routed to nth Alarm Output
#1 : 1
Means this specific input alarm is routed to nth Alarm Output
End of enumeration elements list.
L_n : Lock bit set by secure software.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and previous bits(0-30) can be written by software
#1 : 1
Stands for locking of previous bits(0-30) and once set software cannot write
End of enumeration elements list.
Config Security Level
address_offset : 0x1588 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x165C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x16C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x1734 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Alarm Routing Register
address_offset : 0x1738 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AROUT_n : Indicates if an input alarm can be routed to a specific alarm output
bits : 0 - 30 (31 bit)
access : read-write
Enumeration:
#0 : 0
Means this specific input alarm cannot be routed to nth Alarm Output
#1 : 1
Means this specific input alarm is routed to nth Alarm Output
End of enumeration elements list.
L_n : Lock bit set by secure software.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and previous bits(0-30) can be written by software
#1 : 1
Stands for locking of previous bits(0-30) and once set software cannot write
End of enumeration elements list.
Config Security Level
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x1810 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x18F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Alarm Routing Register
address_offset : 0x19A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AROUT_n : Indicates if an input alarm can be routed to a specific alarm output
bits : 0 - 30 (31 bit)
access : read-write
Enumeration:
#0 : 0
Means this specific input alarm cannot be routed to nth Alarm Output
#1 : 1
Means this specific input alarm is routed to nth Alarm Output
End of enumeration elements list.
L_n : Lock bit set by secure software.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and previous bits(0-30) can be written by software
#1 : 1
Stands for locking of previous bits(0-30) and once set software cannot write
End of enumeration elements list.
Config Security Level
address_offset : 0x19D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x1A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x1ABC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x1BA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Alarm Routing Register
address_offset : 0x1C0C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AROUT_n : Indicates if an input alarm can be routed to a specific alarm output
bits : 0 - 30 (31 bit)
access : read-write
Enumeration:
#0 : 0
Means this specific input alarm cannot be routed to nth Alarm Output
#1 : 1
Means this specific input alarm is routed to nth Alarm Output
End of enumeration elements list.
L_n : Lock bit set by secure software.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and previous bits(0-30) can be written by software
#1 : 1
Stands for locking of previous bits(0-30) and once set software cannot write
End of enumeration elements list.
Config Security Level
address_offset : 0x1C98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x1D8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x1E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Alarm Routing Register
address_offset : 0x1E7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AROUT_n : Indicates if an input alarm can be routed to a specific alarm output
bits : 0 - 30 (31 bit)
access : read-write
Enumeration:
#0 : 0
Means this specific input alarm cannot be routed to nth Alarm Output
#1 : 1
Means this specific input alarm is routed to nth Alarm Output
End of enumeration elements list.
L_n : Lock bit set by secure software.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and previous bits(0-30) can be written by software
#1 : 1
Stands for locking of previous bits(0-30) and once set software cannot write
End of enumeration elements list.
Config Security Level
address_offset : 0x1E84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x1F80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Alarm Routing Register
address_offset : 0x20F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AROUT_n : Indicates if an input alarm can be routed to a specific alarm output
bits : 0 - 30 (31 bit)
access : read-write
Enumeration:
#0 : 0
Means this specific input alarm cannot be routed to nth Alarm Output
#1 : 1
Means this specific input alarm is routed to nth Alarm Output
End of enumeration elements list.
L_n : Lock bit set by secure software.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and previous bits(0-30) can be written by software
#1 : 1
Stands for locking of previous bits(0-30) and once set software cannot write
End of enumeration elements list.
Config Security Level
address_offset : 0x220 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Alarm Mask register
address_offset : 0x230 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AMK0_n : The first two alarms, csu_alarm_in[0] and csu_alarm_in[1], are not maskable. The highest 4 bits are reserved for the masking of the four soft alarms. Hence, if there are five input alarms, then bits 0, 2, and 4 correspond to the masking of input alarms csu_alarm_in[2], csu_alarm_in[3], and csu_alarm_in[4], respectively; bits 6, 8, 10, and 12 are reserved for the masking functionality of the four soft alarms.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no-masking of csu_alarm_in(n+2) input alarm signal
#1 : 1
Stands for masking of csu_alarm_in(n+2) input alarm signal
End of enumeration elements list.
L0_n : Lock bit set by secure software.
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the alarm mask value
End of enumeration elements list.
AMK1_n : The first two alarms, csu_alarm_in[0] and csu_alarm_in[1], are not maskable. The highest 4 bits are reserved for the masking of the four soft alarms. Hence, if there are five input alarms, then bits 0, 2, and 4 correspond to the masking of input alarms csu_alarm_in[2], csu_alarm_in[3], and csu_alarm_in[4], respectively; bits 6, 8, 10, and 12 are reserved for the masking functionality of the four soft alarms.
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no-masking of csu_alarm_in(n+2) input alarm signal
#1 : 1
Stands for masking of csu_alarm_in(n+2) input alarm signal
End of enumeration elements list.
L1_n : Lock bit set by secure software.
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the alarm mask value
End of enumeration elements list.
AMK2_n : The first two alarms, csu_alarm_in[0] and csu_alarm_in[1], are not maskable. The highest 4 bits are reserved for the masking of the four soft alarms. Hence, if there are five input alarms, then bits 0, 2, and 4 correspond to the masking of input alarms csu_alarm_in[2], csu_alarm_in[3], and csu_alarm_in[4] respectively; bits 6, 8, 10, and 12 are reserved for the masking functionality of the four soft alarms.
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no-masking of csu_alarm_in(n+2) input alarm signal
#1 : 1
Stands for masking of csu_alarm_in(n+2) input alarm signal
End of enumeration elements list.
L2_n : Lock bit set by secure software.
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the alarm mask value
End of enumeration elements list.
AMK3_n : The first two alarms, csu_alarm_in[0] and csu_alarm_in[1], are not maskable. The hghest 4 bits are reserved for the masking of the four soft alarms. Hence, if there are five input alarms, then bits 0, 2, and 4 correspond to the masking of input alarms csu_alarm_in[2], csu_alarm_in[3], and csu_alarm_in[4], respectively; bits 6, 8, 10, and 12 are reserved for the masking functionality of the four soft alarms.
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no-masking of csu_alarm_in(n+2) input alarm signal
#1 : 1
Stands for masking of csu_alarm_in(n+2) input alarm signal
End of enumeration elements list.
L3_n : Lock bit set by secure software.
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the alarm mask value
End of enumeration elements list.
AMK4_n : The first two alarms, csu_alarm_in[0] and csu_alarm_in[1], are not maskable. The highest 4 bits are reserved for the masking of the four soft alarms. Hence, if there are five input alarms, then bits 0, 2, and 4 correspond to the masking of input alarms csu_alarm_in[2], csu_alarm_in[3], and csu_alarm_in[4], respectively; bits 6, 8, 10, and 12 are reserved for the masking functionality of the four soft alarms.
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no-masking of csu_alarm_in(n+2) input alarm signal
#1 : 1
Stands for masking of csu_alarm_in(n+2) input alarm signal
End of enumeration elements list.
L4_n : Lock bit set by secure software.
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the alarm mask value
End of enumeration elements list.
AMK5_n : The first two alarms, csu_alarm_in[0] and csu_alarm_in[1], are not maskable. The highest 4 bits are reserved for the masking of the four soft alarms. Hence, if there are five input alarms, then bits 0, 2, and 4 correspond to the masking of input alarms csu_alarm_in[2], csu_alarm_in[3], and csu_alarm_in[4], respectively; bits 6, 8, 10, and 12 are reserved for the masking functionality of the four soft alarms.
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no-masking of csu_alarm_in(n+2) input alarm signal
#1 : 1
Stands for masking of csu_alarm_in(n+2) input alarm signal
End of enumeration elements list.
L5_n : Lock bit set by secure software.
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the alarm mask value
End of enumeration elements list.
AMK6_n : The first two alarms, csu_alarm_in[0] and csu_alarm_in[1], are not maskable. The highest 4 bits are reserved for the masking of the four soft alarms. Hence, if there are five input alarms, then bits 0, 2, and 4 correspond to the masking of input alarms csu_alarm_in[2], csu_alarm_in[3], and csu_alarm_in[4], respectively; bits 6, 8, 10, and 12 are reserved for the masking functionality of the four soft alarms.
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no-masking of csu_alarm_in(n+2) input alarm signal
#1 : 1
Stands for masking of csu_alarm_in(n+2) input alarm signal
End of enumeration elements list.
L6_n : Lock bit set by secure software.
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the alarm mask value
End of enumeration elements list.
AMK7_n : The first two alarms, csu_alarm_in[0] and csu_alarm_in[1], are not maskable. The highest 4 bits are reserved for the masking of the four soft alarms. Hence, if there are five input alarms, then bits 0, 2, and 4 correspond to the masking of input alarms csu_alarm_in[2], csu_alarm_in[3], and csu_alarm_in[4], respectively; bits 6, 8, 10, and 12 are reserved for the masking functionality of the four soft alarms.
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no-masking of csu_alarm_in(n+2) input alarm signal
#1 : 1
Stands for masking of csu_alarm_in(n+2) input alarm signal
End of enumeration elements list.
L7_n : Lock bit set by secure software.
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the alarm mask value
End of enumeration elements list.
AMK8_n : The first two alarms, csu_alarm_in[0] and csu_alarm_in[1], are not maskable. The highest 4 bits are reserved for the masking of the four soft alarms. Hence, if there are five input alarms, then bits 0, 2, and 4 correspond to the masking of input alarms csu_alarm_in[2], csu_alarm_in[3], and csu_alarm_in[4], respectively; bits 6, 8, 10, and 12 are reserved for the masking functionality of the four soft alarms.
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no-masking of csu_alarm_in(n+2) input alarm signal
#1 : 1
Stands for masking of csu_alarm_in(n+2) input alarm signal
End of enumeration elements list.
L8_n : Lock bit set by secure software.
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the alarm mask value
End of enumeration elements list.
AMK9_n : The first two alarms, csu_alarm_in[0] and csu_alarm_in[1], are not maskable. The highest 4 bits are reserved for the masking of the four soft alarms. Hence, if there are five input alarms, then bits 0, 2, and 4 correspond to the masking of input alarms csu_alarm_in[2], csu_alarm_in[3], csu_alarm_in[4], respectively, and bits 6, 8, 10, and 12 are reserved for the masking functionality of the four soft alarms.
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no-masking of csu_alarm_in(n+2) input alarm signal
#1 : 1
Stands for masking of csu_alarm_in(n+2) input alarm signal
End of enumeration elements list.
L9_n : Lock bit set by secure software.
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the alarm mask value
End of enumeration elements list.
AMK10_n : The first two alarms, csu_alarm_in[0] and csu_alarm_in[1], are not maskable. The highest 4 bits are reserved for the masking of the four soft alarms. Hence, if there are five input alarms, then bits 0, 2, and 4 correspond to the masking of input alarms csu_alarm_in[2], csu_alarm_in[3], csu_alarm_in[4], respectively, and bits 6, 8, 10, and 12 are reserved for the masking functionality of the four soft alarms.
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no-masking of csu_alarm_in(n+2) input alarm signal
#1 : 1
Stands for masking of csu_alarm_in(n+2) input alarm signal
End of enumeration elements list.
L10_n : Lock bit set by secure software.
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the alarm mask value
End of enumeration elements list.
AMK11_n : The first two alarms, csu_alarm_in[0] and csu_alarm_in[1], are not maskable. The highest 4 bits are reserved for the masking of the four soft alarms. Hence, if there are five input alarms, then bits 0, 2, and 4 correspond to the masking of input alarms csu_alarm_in[2], csu_alarm_in[3], csu_alarm_in[4], respectively, and bits 6, 8, 10, and 12 are reserved for the masking functionality of the four soft alarms.
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no-masking of csu_alarm_in(n+2) input alarm signal
#1 : 1
Stands for masking of csu_alarm_in(n+2) input alarm signal
End of enumeration elements list.
L11_n : Lock bit set by secure software.
bits : 23 - 23 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the alarm mask value
End of enumeration elements list.
AMK12_n : The first two alarms, csu_alarm_in[0] and csu_alarm_in[1], are not maskable. The highest 4 bits are reserved for the masking of the four soft alarms. Hence, if there are five input alarms, then bits 0, 2, and 4 correspond to the masking of input alarms csu_alarm_in[2], csu_alarm_in[3], csu_alarm_in[4], respectively, and bits 6, 8, 10, and 12 are reserved for the masking functionality of the four soft alarms.
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no-masking of csu_alarm_in(n+2) input alarm signal
#1 : 1
Stands for masking of csu_alarm_in(n+2) input alarm signal
End of enumeration elements list.
L12_n : Lock bit set by secure software.
bits : 25 - 25 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the alarm mask value
End of enumeration elements list.
AMK13_n : The first two alarms, csu_alarm_in[0] and csu_alarm_in[1], are not maskable. The highest 4 bits are reserved for the masking of the four soft alarms. Hence, if there are five input alarms, then bits 0, 2, and 4 correspond to the masking of input alarms csu_alarm_in[2], csu_alarm_in[3], csu_alarm_in[4], respectively, and bits 6, 8, 10, and 12 are reserved for the masking functionality of the four soft alarms.
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no-masking of csu_alarm_in(n+2) input alarm signal
#1 : 1
Stands for masking of csu_alarm_in(n+2) input alarm signal
End of enumeration elements list.
L13_n : Lock bit set by secure software.
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the alarm mask value
End of enumeration elements list.
AMK14_n : The first two alarms, csu_alarm_in[0] and csu_alarm_in[1], are not maskable. The highest 4 bits are reserved for the masking of the four soft alarms. Hence, if there are five input alarms, then bits 0, 2, and 4 correspond to the masking of input alarms csu_alarm_in[2], csu_alarm_in[3], csu_alarm_in[4], respectively, and bits 6, 8, 10, and 12 are reserved for the masking functionality of the four soft alarms.
bits : 28 - 28 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no-masking of csu_alarm_in(n+2) input alarm signal
#1 : 1
Stands for masking of csu_alarm_in(n+2) input alarm signal
End of enumeration elements list.
L14_n : Lock bit set by secure software.
bits : 29 - 29 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the alarm mask value
End of enumeration elements list.
AMK15_n : The first two alarms, csu_alarm_in[0] and csu_alarm_in[1], are not maskable. The highest 4 bits are reserved for the masking of the four soft alarms. Hence, if there are input alarms, then bits 0, 2, and 4 correspond to the masking of input alarms csu_alarm_in[2], csu_alarm_in[3], csu_alarm_in[4], respectively, and bits 6, 8, 10, and 12 are reserved for the masking functionality of the four soft alarms.
bits : 30 - 30 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no-masking of csu_alarm_in(n+2) input alarm signal
#1 : 1
Stands for masking of csu_alarm_in(n+2) input alarm signal
End of enumeration elements list.
L15_n : Lock bit set by secure software.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the alarm mask value
End of enumeration elements list.
Config Security Level
address_offset : 0x264 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x2AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x2F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Soft Alarm Register
address_offset : 0x344 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NALARM : no description available
bits : 0 - 1 (2 bit)
access : read-write
SALARM : no description available
bits : 2 - 3 (2 bit)
access : read-write
L : Lock bit set by secure software.
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and previous bits[0:3] can be written by software.
#1 : 1
Stands for locking of previous bits[0:3] and once set software cannot write
End of enumeration elements list.
RESERVED : Reserved.
bits : 5 - 7 (3 bit)
access : read-only
Config Security Level
address_offset : 0x348 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Alarm Counter Register
address_offset : 0x348 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACOUNTER : no description available
bits : 0 - 14 (15 bit)
access : read-write
L : Lock bit set by secure software.
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and previous bits can be written by software
#1 : 1
Stands for locking of previous bits and once set software cannot write
End of enumeration elements list.
Alarm Control Register
address_offset : 0x34C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CE : Counter Enable Field.
bits : 0 - 0 (1 bit)
access : read-write
SC : Stop Counter Field.
bits : 1 - 1 (1 bit)
access : read-write
L : Lock bit set by secure software.
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and previous bits(0-1) can be written by software.
#1 : 1
Stands for locking of previous bits(0-1) and once set software cannot write.
End of enumeration elements list.
RESERVED : Reserved.
bits : 3 - 15 (13 bit)
access : read-write
Interrupt Status Register
address_offset : 0x378 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IS0_n : no description available
bits : 0 - 0 (1 bit)
access : read-write
RESERVED : no description available
bits : 1 - 1 (1 bit)
access : read-only
IS1_n : no description available
bits : 2 - 2 (1 bit)
access : read-write
RESERVED : no description available
bits : 3 - 3 (1 bit)
access : read-only
IS2_n : no description available
bits : 4 - 4 (1 bit)
access : read-write
RESERVED : no description available
bits : 5 - 5 (1 bit)
access : read-only
IS3_n : no description available
bits : 6 - 6 (1 bit)
access : read-write
RESERVED : no description available
bits : 7 - 7 (1 bit)
access : read-only
IS4_n : no description available
bits : 8 - 8 (1 bit)
access : read-write
RESERVED : no description available
bits : 9 - 9 (1 bit)
access : read-only
IS5_n : no description available
bits : 10 - 10 (1 bit)
access : read-write
RESERVED : no description available
bits : 11 - 11 (1 bit)
access : read-only
IS6_n : no description available
bits : 12 - 12 (1 bit)
access : read-write
RESERVED : no description available
bits : 13 - 13 (1 bit)
access : read-only
IS7_n : no description available
bits : 14 - 14 (1 bit)
access : read-write
RESERVED : no description available
bits : 15 - 15 (1 bit)
access : read-only
IS8_n : no description available
bits : 16 - 16 (1 bit)
access : read-write
RESERVED : no description available
bits : 17 - 17 (1 bit)
access : read-only
IS9_n : no description available
bits : 18 - 18 (1 bit)
access : read-write
RESERVED : no description available
bits : 19 - 19 (1 bit)
access : read-only
IS10_n : no description available
bits : 20 - 20 (1 bit)
access : read-write
RESERVED : no description available
bits : 21 - 21 (1 bit)
access : read-only
IS11_n : no description available
bits : 22 - 22 (1 bit)
access : read-write
RESERVED : no description available
bits : 23 - 23 (1 bit)
access : read-only
IS12_n : no description available
bits : 24 - 24 (1 bit)
access : read-write
RESERVED : no description available
bits : 25 - 25 (1 bit)
access : read-only
IS13_n : no description available
bits : 26 - 26 (1 bit)
access : read-write
RESERVED : no description available
bits : 27 - 27 (1 bit)
access : read-only
IS14_n : no description available
bits : 28 - 28 (1 bit)
access : read-write
RESERVED : no description available
bits : 29 - 29 (1 bit)
access : read-only
IS15_n : no description available
bits : 30 - 30 (1 bit)
access : read-write
RESERVED : no description available
bits : 31 - 31 (1 bit)
access : read-only
Config Security Level
address_offset : 0x39C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x3F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Hprot Register
address_offset : 0x400 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HP0_n : hprot bus master bit
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L0_n : Lock bit set by secure software.
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP1_n : hprot bus master bit
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L1_n : Lock bit set by secure software.
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP2_n : hprot bus master bit
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L2_n : Lock bit set by secure software.
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP3_n : hprot bus master bit
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L3_n : Lock bit set by secure software.
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP4_n : hprot bus master bit
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L4_n : Lock bit set by secure software.
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP5_n : hprot bus master bit
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L5_n : Lock bit set by secure software.
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP6_n : hprot bus master bit
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L6_n : Lock bit set by secure software.
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP7_n : hprot bus master bit
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L7_n : Lock bit set by secure software.
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP8_n : hprot bus master bit
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L8_n : Lock bit set by secure software.
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP9_n : hprot bus master bit
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L9_n : Lock bit set by secure software.
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP10_n : hprot bus master bit
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L10_n : Lock bit set by secure software.
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP11_n : hprot bus master bit
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L11_n : Lock bit set by secure software.
bits : 23 - 23 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP12_n : hprot bus master bit
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L12_n : Lock bit set by secure software.
bits : 25 - 25 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP13_n : hprot bus master bit
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L13_n : Lock bit set by secure software.
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP14_n : hprot bus master bit
bits : 28 - 28 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L14_n : Lock bit set by secure software.
bits : 29 - 29 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP15_n : hprot bus master bit
bits : 30 - 30 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L15_n : Lock bit set by secure software.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
Secure Access register
address_offset : 0x430 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SA0_n : Secured access indicator
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L0_n : Lock bit set by secure software.
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA1_n : Secured access indicator
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L1_n : Lock bit set by secure software.
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA2_n : Secured access indicator
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L2_n : Lock bit set by secure software.
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA3_n : Secured access indicator
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L3_n : Lock bit set by secure software.
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA4_n : Secured access indicator
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L4_n : Lock bit set by secure software.
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA5_n : Secured access indicator
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L5_n : Lock bit set by secure software.
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA6_n : Secured access indicator
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L6_n : Lock bit set by secure software.
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA7_n : Secured access indicator
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L7_n : Lock bit set by secure software.
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA8_n : Secured access indicator
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
End of enumeration elements list.
L8_n : Lock bit set by secure software.
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA9_n : Secured access indicator
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L9_n : Lock bit set by secure software.
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA10_n : Secured access indicator
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L10_n : Lock bit set by secure software.
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA11_n : Secured access indicator
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L11_n : Lock bit set by secure software.
bits : 23 - 23 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA12_n : Secured access indicator
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L12_n : Lock bit set by secure software.
bits : 25 - 25 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA13_n : Secured access indicator
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L13_n : Lock bit set by secure software.
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA14_n : Secured access indicator
bits : 28 - 28 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L14_n : Lock bit set by secure software.
bits : 29 - 29 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA15_n : Secured access indicator
bits : 30 - 30 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L15_n : Lock bit set by secure software.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
Config Security Level
address_offset : 0x450 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Alarm Routing Register
address_offset : 0x488 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AROUT_n : Indicates if an input alarm can be routed to a specific alarm output
bits : 0 - 30 (31 bit)
access : read-write
Enumeration:
#0 : 0
Means this specific input alarm cannot be routed to nth Alarm Output
#1 : 1
Means this specific input alarm is routed to nth Alarm Output
End of enumeration elements list.
L_n : Lock bit set by secure software.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and previous bits(0-30) can be written by software
#1 : 1
Stands for locking of previous bits(0-30) and once set software cannot write
End of enumeration elements list.
Config Security Level
address_offset : 0x4B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x514 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x57C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x5E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Hprot Register
address_offset : 0x604 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HP0_n : hprot bus master bit
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L0_n : Lock bit set by secure software.
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP1_n : hprot bus master bit
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L1_n : Lock bit set by secure software.
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP2_n : hprot bus master bit
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L2_n : Lock bit set by secure software.
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP3_n : hprot bus master bit
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L3_n : Lock bit set by secure software.
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP4_n : hprot bus master bit
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L4_n : Lock bit set by secure software.
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP5_n : hprot bus master bit
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L5_n : Lock bit set by secure software.
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP6_n : hprot bus master bit
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L6_n : Lock bit set by secure software.
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP7_n : hprot bus master bit
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L7_n : Lock bit set by secure software.
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP8_n : hprot bus master bit
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L8_n : Lock bit set by secure software.
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP9_n : hprot bus master bit
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L9_n : Lock bit set by secure software.
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP10_n : hprot bus master bit
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L10_n : Lock bit set by secure software.
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP11_n : hprot bus master bit
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L11_n : Lock bit set by secure software.
bits : 23 - 23 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP12_n : hprot bus master bit
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L12_n : Lock bit set by secure software.
bits : 25 - 25 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP13_n : hprot bus master bit
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L13_n : Lock bit set by secure software.
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP14_n : hprot bus master bit
bits : 28 - 28 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L14_n : Lock bit set by secure software.
bits : 29 - 29 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
HP15_n : hprot bus master bit
bits : 30 - 30 (1 bit)
access : read-write
Enumeration:
#0 : 0
User mode for the nth master corresponding to this 32-bit register.
#1 : 1
Privileged mode access for that master.
End of enumeration elements list.
L15_n : Lock bit set by secure software.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the HP field.
End of enumeration elements list.
Secure Access register
address_offset : 0x64C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SA0_n : Secured access indicator
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L0_n : Lock bit set by secure software.
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA1_n : Secured access indicator
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L1_n : Lock bit set by secure software.
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA2_n : Secured access indicator
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L2_n : Lock bit set by secure software.
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA3_n : Secured access indicator
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L3_n : Lock bit set by secure software.
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA4_n : Secured access indicator
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L4_n : Lock bit set by secure software.
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA5_n : Secured access indicator
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L5_n : Lock bit set by secure software.
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA6_n : Secured access indicator
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L6_n : Lock bit set by secure software.
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA7_n : Secured access indicator
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L7_n : Lock bit set by secure software.
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA8_n : Secured access indicator
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
End of enumeration elements list.
L8_n : Lock bit set by secure software.
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA9_n : Secured access indicator
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L9_n : Lock bit set by secure software.
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA10_n : Secured access indicator
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L10_n : Lock bit set by secure software.
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA11_n : Secured access indicator
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L11_n : Lock bit set by secure software.
bits : 23 - 23 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA12_n : Secured access indicator
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L12_n : Lock bit set by secure software.
bits : 25 - 25 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA13_n : Secured access indicator
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L13_n : Lock bit set by secure software.
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA14_n : Secured access indicator
bits : 28 - 28 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L14_n : Lock bit set by secure software.
bits : 29 - 29 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
SA15_n : Secured access indicator
bits : 30 - 30 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for Secured Access indication for nth Type 1 Master corresponding to this 32-bit register.
#1 : 1
Stands for Non-Secured Access for that master.
End of enumeration elements list.
L15_n : Lock bit set by secure software.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software.
#1 : 1
Stands for locking of (2*n) th bit and once set software cannot write on the SA field.
End of enumeration elements list.
Config Security Level
address_offset : 0x658 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Hprot Control Register
address_offset : 0x6B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HPC0_n : Hprot Register bit
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L0_n : Lock bit set by secure software.
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC1_n : Hprot Register bit
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L1_n : Lock bit set by secure software.
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC2_n : Hprot Register bit
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L2_n : Lock bit set by secure software.
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC3_n : Hprot Register bit
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L3_n : Lock bit set by secure software.
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC4_n : Hprot Register bit
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L4_n : Lock bit set by secure software.
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC5_n : Hprot Register bit
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L5_n : Lock bit set by secure software.
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC6_n : Hprot Register bit
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L6_n : Lock bit set by secure software.
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC7_n : Hprot Register bit
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L7_n : Lock bit set by secure software.
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC8_n : Hprot Register bit
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
End of enumeration elements list.
L8_n : Lock bit set by secure software.
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC9_n : Hprot Register bit
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L9_n : Lock bit set by secure software.
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC10_n : Hprot Register bit
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L10_n : Lock bit set by secure software.
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC11_n : Hprot Register bit
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L11_n : Lock bit set by secure software.
bits : 23 - 23 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC12_n : Hprot Register bit
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L12_n : Lock bit set by secure software.
bits : 25 - 25 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC13_n : Hprot Register bit
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L13_n : Lock bit set by secure software.
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC14_n : Hprot Register bit
bits : 28 - 28 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L14_n : Lock bit set by secure software.
bits : 29 - 29 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC15_n : Hprot Register bit
bits : 30 - 30 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L15_n : Lock bit set by secure software.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
Config Security Level
address_offset : 0x6CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Alarm Routing Register
address_offset : 0x6D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AROUT_n : Indicates if an input alarm can be routed to a specific alarm output
bits : 0 - 30 (31 bit)
access : read-write
Enumeration:
#0 : 0
Means this specific input alarm cannot be routed to nth Alarm Output
#1 : 1
Means this specific input alarm is routed to nth Alarm Output
End of enumeration elements list.
L_n : Lock bit set by secure software.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and previous bits(0-30) can be written by software
#1 : 1
Stands for locking of previous bits(0-30) and once set software cannot write
End of enumeration elements list.
Config Security Level
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x744 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x7C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x840 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x8C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Alarm Routing Register
address_offset : 0x91C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AROUT_n : Indicates if an input alarm can be routed to a specific alarm output
bits : 0 - 30 (31 bit)
access : read-write
Enumeration:
#0 : 0
Means this specific input alarm cannot be routed to nth Alarm Output
#1 : 1
Means this specific input alarm is routed to nth Alarm Output
End of enumeration elements list.
L_n : Lock bit set by secure software.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and previous bits(0-30) can be written by software
#1 : 1
Stands for locking of previous bits(0-30) and once set software cannot write
End of enumeration elements list.
Config Security Level
address_offset : 0x94C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0x9D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Hprot Control Register
address_offset : 0xA0C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HPC0_n : Hprot Register bit
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L0_n : Lock bit set by secure software.
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC1_n : Hprot Register bit
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L1_n : Lock bit set by secure software.
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC2_n : Hprot Register bit
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L2_n : Lock bit set by secure software.
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC3_n : Hprot Register bit
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L3_n : Lock bit set by secure software.
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC4_n : Hprot Register bit
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L4_n : Lock bit set by secure software.
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC5_n : Hprot Register bit
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L5_n : Lock bit set by secure software.
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC6_n : Hprot Register bit
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L6_n : Lock bit set by secure software.
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC7_n : Hprot Register bit
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L7_n : Lock bit set by secure software.
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC8_n : Hprot Register bit
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
End of enumeration elements list.
L8_n : Lock bit set by secure software.
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC9_n : Hprot Register bit
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L9_n : Lock bit set by secure software.
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC10_n : Hprot Register bit
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L10_n : Lock bit set by secure software.
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC11_n : Hprot Register bit
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L11_n : Lock bit set by secure software.
bits : 23 - 23 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC12_n : Hprot Register bit
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L12_n : Lock bit set by secure software.
bits : 25 - 25 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC13_n : Hprot Register bit
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L13_n : Lock bit set by secure software.
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC14_n : Hprot Register bit
bits : 28 - 28 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L14_n : Lock bit set by secure software.
bits : 29 - 29 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
HPC15_n : Hprot Register bit
bits : 30 - 30 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for input Hprot1 value being passed as csu_hprot1 output for the nth master
#1 : 1
Stands for the Register value of the HP field corresponding to nth master being passed as csu_hprot1 output for that master
End of enumeration elements list.
L15_n : Lock bit set by secure software.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and (2*n)th bit can be written by software
#1 : 1
Stands for locking of (2*n)th bit and once set software cannot write on the value
End of enumeration elements list.
Config Security Level
address_offset : 0xA68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0xAFC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Alarm Routing Register
address_offset : 0xB6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AROUT_n : Indicates if an input alarm can be routed to a specific alarm output
bits : 0 - 30 (31 bit)
access : read-write
Enumeration:
#0 : 0
Means this specific input alarm cannot be routed to nth Alarm Output
#1 : 1
Means this specific input alarm is routed to nth Alarm Output
End of enumeration elements list.
L_n : Lock bit set by secure software.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and previous bits(0-30) can be written by software
#1 : 1
Stands for locking of previous bits(0-30) and once set software cannot write
End of enumeration elements list.
Config Security Level
address_offset : 0xB94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0xC30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0xCD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0xD74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Alarm Routing Register
address_offset : 0xDC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AROUT_n : Indicates if an input alarm can be routed to a specific alarm output
bits : 0 - 30 (31 bit)
access : read-write
Enumeration:
#0 : 0
Means this specific input alarm cannot be routed to nth Alarm Output
#1 : 1
Means this specific input alarm is routed to nth Alarm Output
End of enumeration elements list.
L_n : Lock bit set by secure software.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stands for no lock condition and previous bits(0-30) can be written by software
#1 : 1
Stands for locking of previous bits(0-30) and once set software cannot write
End of enumeration elements list.
Config Security Level
address_offset : 0xE1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0xEC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
Config Security Level
address_offset : 0xF78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSL_2n : Config Security Level (2n)
bits : 0 - 7 (8 bit)
access : read-write
L_2n : Lock bit (2n)
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n can be written by software.
#1 : 1
CSL_2n is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 9 - 15 (7 bit)
access : read-only
CSL_2n1 : Config Security Level (2n+1)
bits : 16 - 23 (8 bit)
access : read-write
L_2n1 : Lock bit (2n+1)
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not locked: CSL_2n1 can be written by software.
#1 : 1
CSL_2n1 is locked and cannot be further written by software.
End of enumeration elements list.
RESERVED : Reserved.
bits : 25 - 31 (7 bit)
access : read-only
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