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IOMUXC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x3B0 byte (0x0)
mem_usage : registers
protection : not protected

Registers

RGPIO0

PTA6

PTA11

RGPIO4

RGPIO64

PTD30

PTD29

RGPIO65

RGPIO66

PTD28

RGPIO67

PTD27

RGPIO68

PTD26

RGPIO69

PTD25

PTD24

RGPIO70

PTD23

RGPIO71

PTD22

RGPIO72

RGPIO73

PTD21

RGPIO74

PTD20

PTD19

RGPIO75

PTD18

RGPIO76

RGPIO77

PTD17

RGPIO78

PTD16

RGPIO79

PTD0

PTA12

RGPIO5

RGPIO80

PTD1

RGPIO81

PTD2

PTD3

RGPIO82

RGPIO83

PTD4

PTD5

RGPIO84

RGPIO85

PTD6

RGPIO86

PTD7

PTD8

RGPIO87

PTD9

RGPIO88

RGPIO89

PTD10

RGPIO90

PTD11

RGPIO91

PTD12

RGPIO92

PTD13

RGPIO93

PTB23

PTB24

RGPIO94

PTB25

RGPIO95

PTA16

RGPIO6

RGPIO96

PTB26

PTB27

RGPIO97

RGPIO98

PTB28

RGPIO99

PTC26

RGPIO100

PTC27

PTC28

RGPIO101

RGPIO102

PTC29

RGPIO103

PTC30

RGPIO104

PTC31

PTE0

RGPIO105

PTE1

RGPIO106

RGPIO107

PTE2

RGPIO108

PTE3

RGPIO109

PTE4

RGPIO110

PTE5

PTE6

RGPIO111

PTA17

RGPIO7

PTE7

RGPIO112

PTE8

RGPIO113

PTE9

RGPIO114

RGPIO115

PTE10

RGPIO116

PTE11

PTE12

RGPIO117

PTE13

RGPIO118

PTE14

RGPIO119

PTE15

RGPIO120

RGPIO121

PTE16

PTE17

RGPIO122

PTE18

RGPIO123

PTE19

RGPIO124

PTE20

RGPIO125

PTE21

RGPIO126

RGPIO127

PTE22

RGPIO8

PTA18

PTE23

RGPIO128

PTE24

RGPIO129

PTE25

RGPIO130

PTE26

RGPIO131

PTE27

RGPIO132

RGPIO133

PTE28

PTA7

RGPIO134

DDR_RESETB

DDR_A_15

DDR_A_14

DDR_A_13

DDR_A_12

DDR_A_11

DDR_A_10

DDR_A_9

DDR_A_8

PTA19

RGPIO9

DDR_A_7

DDR_A_6

DDR_A_5

DDR_A_4

DDR_A_3

DDR_A_2

DDR_A_1

DDR_A_0

DDR_BA_2

DDR_BA_1

DDR_BA_0

DDR_CAS_B

DDR_CKE_0

DDR_CLK_0

DDR_CS_B_0

DDR_CS_D_15

RGPIO10

PTA20

DDR_CS_D_14

DDR_CS_D_13

DDR_CS_D_12

DDR_CS_D_11

DDR_CS_D_10

DDR_CS_D_9

DDR_CS_D_8

DDR_CS_D_7

DDR_CS_D_6

DDR_CS_D_5

DDR_CS_D_4

DDR_CS_D_3

DDR_CS_D_2

DDR_CS_D_1

DDR_CS_D_0

DDR_DQM_1

PTA21

RGPIO11

DDR_DQM_0

DDR_DQS_1

DDR_DQS_0

DDR_RAS_B

DDR_WE_B

DDR_ODT_0

DDR_ODT_1

DUMMY_DDRBYTE1

DUMMY_DDRBYTE2

CCM_AUD_EXT_CLK_SELECT_INPUT

CCM_ENET_EXT_CLK_SELECT_INPUT

CCM_ENET_TS_CLK_SELECT_INPUT

DSPI1_IPP_IND_SCK_SELECT_INPUT

DSPI1_IPP_IND_SIN_SELECT_INPUT

PTA22

RGPIO12

DSPI1_IPP_IND_SS_B_SELECT_INPUT

ENET_SWIAHB_IPP_IND_MAC0_TIMER_0_SELECT_INPUT

ENET_SWIAHB_IPP_IND_MAC0_TIMER_1_SELECT_INPUT

ESAI_IPP_IND_FST_SELECT_INPUT

ESAI_IPP_IND_SCKT_SELECT_INPUT

ESAI_IPP_IND_SDO0_SELECT_INPUT

ESAI_IPP_IND_SDO1_SELECT_INPUT

ESAI_IPP_IND_SDO2_SDI3_SELECT_INPUT

ESAI_IPP_IND_SDO3_SDI2_SELECT_INPUT

ESAI_IPP_IND_SDO4_SDI1_SELECT_INPUT

ESAI_IPP_IND_SDO5_SDI0_SELECT_INPUT

FLEXTIMER1_IPP_IND_FTM_CH_0_SELECT_INPUT

FLEXTIMER1_IPP_IND_FTM_CH_1_SELECT_INPUT

FLEXTIMER1_IPP_IND_FTM_PHA_SELECT_INPUT

FLEXTIMER1_IPP_IND_FTM_PHB_SELECT_INPUT

I2C0_IPP_SCL_IND_SELECT_INPUT

RGPIO13

PTA23

I2C0_IPP_SDA_IND_SELECT_INPUT

I2C1_IPP_SCL_IND_SELECT_INPUT

I2C1_IPP_SDA_IND_SELECT_INPUT

I2C2_IPP_SCL_IND_SELECT_INPUT

I2C2_IPP_SDA_IND_SELECT_INPUT

MLB_TOP_MLBCLK_IN_SELECT_INPUT

MLB_TOP_MLBDAT_IN_SELECT_INPUT

MLB_TOP_MLBSIG_IN_SELECT_INPUT

SAI1_IPP_IND_SAI_TXSYNC_SELECT_INPUT

SAI2_IPP_IND_SAI_RXBCLK_SELECT_INPUT

SAI2_IPP_IND_SAI_RXDATA_0_SELECT_INPUT

SAI2_IPP_IND_SAI_RXSYNC_SELECT_INPUT

SAI2_IPP_IND_SAI_TXBCLK_SELECT_INPUT

SAI2_IPP_IND_SAI_TXSYNC_SELECT_INPUT

SCI_FLX1_IPP_IND_CTS_B_SELECT_INPUT

SCI_FLX1_IPP_IND_SCI_RX_SELECT_INPUT

RGPIO14

PTA24

SCI_FLX1_IPP_IND_SCI_TX_SELECT_INPUT

SCI_FLX2_IPP_IND_CTS_B_SELECT_INPUT

SCI_FLX2_IPP_IND_SCI_RX_SELECT_INPUT

SCI_FLX2_IPP_IND_SCI_TX_SELECT_INPUT

SCI_FLX3_IPP_IND_SCI_RX_SELECT_INPUT

SCI_FLX3_IPP_IND_SCI_TX_SELECT_INPUT

SRC_IPP_BOOT_CFG_18_SELECT_INPUT

SRC_IPP_BOOT_CFG_19_SELECT_INPUT

SRC_IPP_BOOT_CFG_20_SELECT_INPUT

VIDEO_IN0_IPP_IND_DE_SELECT_INPUT

VIDEO_IN0_IPP_IND_FID_SELECT_INPUT

VIDEO_IN0_IPP_IND_PIX_CLK_SELECT_INPUT

PTA25

RGPIO15

RGPIO1

PTA8

RGPIO16

PTA26

RGPIO17

PTA27

RGPIO18

PTA28

PTA29

RGPIO19

PTA30

RGPIO20

RGPIO21

PTA31

RGPIO22

PTB0

RGPIO23

PTB1

RGPIO24

PTB2

RGPIO25

PTB3

RGPIO26

PTB4

RGPIO27

PTB5

PTB6

RGPIO28

RGPIO29

PTB7

PTB8

RGPIO30

RGPIO31

PTB9

RGPIO2

PTA9

PTB10

RGPIO32

PTB11

RGPIO33

RGPIO34

PTB12

PTB13

RGPIO35

PTB14

RGPIO36

RGPIO37

PTB15

RGPIO38

PTB16

RGPIO39

PTB17

PTB18

RGPIO40

PTB19

RGPIO41

PTB20

RGPIO42

PTB21

RGPIO43

PTB22

RGPIO44

PTC0

RGPIO45

PTC1

RGPIO46

RGPIO47

PTC2

PTA10

RGPIO3

RGPIO48

PTC3

PTC4

RGPIO49

RGPIO50

PTC5

RGPIO51

PTC6

RGPIO52

PTC7

PTC8

RGPIO53

RGPIO54

PTC9

RGPIO55

PTC10

PTC11

RGPIO56

RGPIO57

PTC12

RGPIO58

PTC13

RGPIO59

PTC14

PTC15

RGPIO60

PTC16

RGPIO61

RGPIO62

PTC17

PTD31

RGPIO63


RGPIO0

Software MUX Pad Control Register 0
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO0 RGPIO0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTA6

Software MUX Pad Control Register 0
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA6 PTA6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

medium (100MHz)

#10 : 10

medium (100MHz)

#11 : 11

high (200MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[0] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RMII_CLKOUT of instance: ccm.

#010 : 010

Select mux mode: ALT2 mux port: RMII_CLKIN of instance: ccm. Used as MAC0-TXCLK when MAC0-MII is enabled.

#100 : 100

Select mux mode: ALT4 mux port: TCON[11] of instance: tcon1.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[20] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTA11

Software MUX Pad Control Register 4
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA11 PTA11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[4] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TMS of instance: debug.

#100 : 100

Select mux mode: ALT4 mux port: DATA_OUT[11] of instance: tcon0.

#111 : 111

Select mux mode: ALT7 mux port: MLBDATA of instance: mlb_top.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO4

Software MUX Pad Control Register 4
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO4 RGPIO4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO64

Software MUX Pad Control Register 64
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO64 RGPIO64 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD30

Software MUX Pad Control Register 64
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD30 PTD30 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[64] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: FB_AD[30] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: NF_IO[14] of instance: nfc_mlc.

#100 : 100

Select mux mode: ALT4 mux port: CH[1] of instance: flextimer3.

#101 : 101

Select mux mode: ALT5 mux port: CS0 of instance: dspi2.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[10] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD29

Software MUX Pad Control Register 65
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD29 PTD29 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[65] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: FB_AD[29] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: NF_IO[13] of instance: nfc_mlc.

#100 : 100

Select mux mode: ALT4 mux port: CH[2] of instance: flextimer3.

#101 : 101

Select mux mode: ALT5 mux port: SIN of instance: dspi2.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[11] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO65

Software MUX Pad Control Register 65
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO65 RGPIO65 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO66

Software MUX Pad Control Register 66
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO66 RGPIO66 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD28

Software MUX Pad Control Register 66
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD28 PTD28 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[66] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: FB_AD[28] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: NF_IO[12] of instance: nfc_mlc.

#011 : 011

Select mux mode: ALT3 mux port: SCL of instance: i2c2.

#100 : 100

Select mux mode: ALT4 mux port: CH[3] of instance: flextimer3.

#101 : 101

Select mux mode: ALT5 mux port: SOUT of instance: dspi2.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[12] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO67

Software MUX Pad Control Register 67
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO67 RGPIO67 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD27

Software MUX Pad Control Register 67
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD27 PTD27 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[67] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: FB_AD[27] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: NF_IO[11] of instance: nfc_mlc.

#011 : 011

Select mux mode: ALT3 mux port: SDA of instance: i2c2.

#100 : 100

Select mux mode: ALT4 mux port: CH[4] of instance: flextimer3.

#101 : 101

Select mux mode: ALT5 mux port: SCK of instance: dspi2.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[13] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO68

Software MUX Pad Control Register 68
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO68 RGPIO68 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD26

Software MUX Pad Control Register 68
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD26 PTD26 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[68] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: FB_AD[26] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: NF_IO[10] of instance: nfc_mlc.

#100 : 100

Select mux mode: ALT4 mux port: CH[5] of instance: flextimer3.

#101 : 101

Select mux mode: ALT5 mux port: WP of instance: esdhc1.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[14] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO69

Software MUX Pad Control Register 69
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO69 RGPIO69 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD25

Software MUX Pad Control Register 69
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD25 PTD25 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[69] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: FB_AD[25] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: NF_IO[9] of instance: nfc_mlc.

#100 : 100

Select mux mode: ALT4 mux port: CH[6] of instance: flextimer3.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[15] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD24

Software MUX Pad Control Register 70
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD24 PTD24 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[70] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: FB_AD[24] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: NF_IO[8] of instance: nfc_mlc.

#100 : 100

Select mux mode: ALT4 mux port: CH[7] of instance: flextimer3.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[16] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO70

Software MUX Pad Control Register 70
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO70 RGPIO70 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD23

Software MUX Pad Control Register 71
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD23 PTD23 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[71] of instance: rgpioc. Also, RXDATA[3] for MAC0 is enabled in this mux mode so ensure obe is disabled if this pin is used for MAC0-MII instead of GPIO.

#001 : 001

Select mux mode: ALT1 mux port: FB_AD[23] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: NF_IO[7] of instance: nfc_mlc.

#011 : 011

Select mux mode: ALT3 mux port: CH[0] of instance: flextimer2.

#100 : 100

Select mux mode: ALT4 mux port: MAC0_TMR0 of instance: enet_swiahb.

#101 : 101

Select mux mode: ALT5 mux port: DAT4 of instance: esdhc0.

#110 : 110

Select mux mode: ALT6 mux port: TX of instance: sci_flx2.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[21] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO71

Software MUX Pad Control Register 71
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO71 RGPIO71 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD22

Software MUX Pad Control Register 72
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD22 PTD22 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[72] of instance: rgpioc. Also, RXDATA[2] for MAC0 is enabled in this mux mode so ensure obe is disabled if this pin is used for MAC0-MII instead of GPIO.

#001 : 001

Select mux mode: ALT1 mux port: FB_AD[22] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: NF_IO[6] of instance: nfc_mlc.

#011 : 011

Select mux mode: ALT3 mux port: CH[1] of instance: flextimer2.

#100 : 100

Select mux mode: ALT4 mux port: MAC0_TMR1 of instance: enet_swiahb.

#101 : 101

Select mux mode: ALT5 mux port: DAT5 of instance: esdhc0.

#110 : 110

Select mux mode: ALT6 mux port: RX of instance: sci_flx2.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[22] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO72

Software MUX Pad Control Register 72
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO72 RGPIO72 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO73

Software MUX Pad Control Register 73
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO73 RGPIO73 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD21

Software MUX Pad Control Register 73
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD21 PTD21 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[73] of instance: rgpioc. Also, CRS for MAC0 is enabled in this mux mode so ensure obe is disabled if this pin is used for MAC0-MII instead of GPIO.

#001 : 001

Select mux mode: ALT1 mux port: FB_AD[21] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: NF_IO[5] of instance: nfc_mlc.

#100 : 100

Select mux mode: ALT4 mux port: MAC0_TMR2 of instance: enet_swiahb.

#101 : 101

Select mux mode: ALT5 mux port: DAT6 of instance: esdhc0.

#110 : 110

Select mux mode: ALT6 mux port: RTS of instance: sci_flx2.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[23] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO74

Software MUX Pad Control Register 74
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO74 RGPIO74 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD20

Software MUX Pad Control Register 74
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD20 PTD20 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[74] of instance: rgpioc. Also, COL for MAC0 is enabled in this mux mode so ensure obe is disabled if this pin is used for MAC0-MII instead of GPIO.

#001 : 001

Select mux mode: ALT1 mux port: FB_AD[20] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: NF_IO[4] of instance: nfc_mlc.

#100 : 100

Select mux mode: ALT4 mux port: MAC0_TMR3 of instance: enet_swiahb.

#101 : 101

Select mux mode: ALT5 mux port: DAT7 of instance: esdhc0.

#110 : 110

Select mux mode: ALT6 mux port: CTS of instance: sci_flx2.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[18] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD19

Software MUX Pad Control Register 75
address_offset : 0x12C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD19 PTD19 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[75] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: FB_AD[19] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: NF_IO[3] of instance: nfc_mlc.

#011 : 011

Select mux mode: ALT3 mux port: SCKR of instance: esai.

#100 : 100

Select mux mode: ALT4 mux port: SCL of instance: i2c0.

#101 : 101

Select mux mode: ALT5 mux port: QD_PHA of instance: flextimer2.

#110 : 110

Select mux mode: ALT6 mux port: TXDATA[3] for MAC0-MII

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[19] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO75

Software MUX Pad Control Register 75
address_offset : 0x12C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO75 RGPIO75 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD18

Software MUX Pad Control Register 76
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD18 PTD18 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[76] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: FB_AD[18] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: NF_IO[2] of instance: nfc_mlc.

#011 : 011

Select mux mode: ALT3 mux port: FSR of instance: esai.

#100 : 100

Select mux mode: ALT4 mux port: SDA of instance: i2c0.

#101 : 101

Select mux mode: ALT5 mux port: QD_PHB of instance: flextimer2.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[10] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO76

Software MUX Pad Control Register 76
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO76 RGPIO76 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO77

Software MUX Pad Control Register 77
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO77 RGPIO77 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD17

Software MUX Pad Control Register 77
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD17 PTD17 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[77] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: FB_AD[17] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: NF_IO[1] of instance: nfc_mlc.

#011 : 011

Select mux mode: ALT3 mux port: HCKR of instance: esai.

#100 : 100

Select mux mode: ALT4 mux port: SCL of instance: i2c1.

#110 : 110

Select mux mode: ALT6 mux port: TXERR of MAC0-MII

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[11] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO78

Software MUX Pad Control Register 78
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO78 RGPIO78 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD16

Software MUX Pad Control Register 78
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD16 PTD16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[78] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: FB_AD[16] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: NF_IO[0] of instance: nfc_mlc.

#011 : 011

Select mux mode: ALT3 mux port: HCKT of instance: esai.

#100 : 100

Select mux mode: ALT4 mux port: SDA of instance: i2c1.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[12] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO79

Software MUX Pad Control Register 79
address_offset : 0x13C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO79 RGPIO79 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD0

Software MUX Pad Control Register 79
address_offset : 0x13C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD0 PTD0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[79] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: QSCK_A of instance: quadspi0.

#010 : 010

Select mux mode: ALT2 mux port: TX of instance: sci_flx2.

#100 : 100

Select mux mode: ALT4 mux port: FB_AD[15] of instance: platform.

#101 : 101

Select mux mode: ALT5 mux port: EXTCLK of instance: spdif.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[17] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTA12

Software MUX Pad Control Register 5
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA12 PTA12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[5] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TRACECK of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: EXT_AUDIO_MCLK of instance: ccm.

#110 : 110

Select mux mode: ALT6 mux port: DATA[13] of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: SCL of instance: i2c0.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO5

Software MUX Pad Control Register 5
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO5 RGPIO5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO80

Software MUX Pad Control Register 80
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO80 RGPIO80 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD1

Software MUX Pad Control Register 80
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD1 PTD1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[80] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: QPCS0_A of instance: quadspi0.

#010 : 010

Select mux mode: ALT2 mux port: RX of instance: sci_flx2.

#100 : 100

Select mux mode: ALT4 mux port: FB_AD[14] of instance: platform.

#101 : 101

Select mux mode: ALT5 mux port: IN1 of instance: spdif.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[18] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO81

Software MUX Pad Control Register 81
address_offset : 0x144 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO81 RGPIO81 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD2

Software MUX Pad Control Register 81
address_offset : 0x144 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD2 PTD2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[81] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: QSPI_IO3_A of instance: quadspi0.

#010 : 010

Select mux mode: ALT2 mux port: RTS of instance: sci_flx2.

#011 : 011

Select mux mode: ALT3 mux port: CS3 of instance: dspi1.

#100 : 100

Select mux mode: ALT4 mux port: FB_AD[13] of instance: platform.

#101 : 101

Select mux mode: ALT5 mux port: OUT1 of instance: spdif.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[19] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD3

Software MUX Pad Control Register 82
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD3 PTD3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[82] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: QSPI_IO2_A of instance: quadspi0.

#010 : 010

Select mux mode: ALT2 mux port: CTS of instance: sci_flx2.

#011 : 011

Select mux mode: ALT3 mux port: CS2 of instance: dspi1.

#100 : 100

Select mux mode: ALT4 mux port: FB_AD[12] of instance: platform.

#101 : 101

Select mux mode: ALT5 mux port: PLOCK of instance: spdif.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[20] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO82

Software MUX Pad Control Register 82
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO82 RGPIO82 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO83

Software MUX Pad Control Register 83
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO83 RGPIO83 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD4

Software MUX Pad Control Register 83
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD4 PTD4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[83] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: QSPI_IO1_A of instance: quadspi0.

#011 : 011

Select mux mode: ALT3 mux port: CS1 of instance: dspi1.

#100 : 100

Select mux mode: ALT4 mux port: FB_AD[11] of instance: platform.

#101 : 101

Select mux mode: ALT5 mux port: SRCLK of instance: spdif.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[21] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD5

Software MUX Pad Control Register 84
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD5 PTD5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[84] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: QSPI_IO0_A of instance: quadspi0.

#011 : 011

Select mux mode: ALT3 mux port: CS0 of instance: dspi1.

#100 : 100

Select mux mode: ALT4 mux port: FB_AD[10] of instance: platform.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[22] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO84

Software MUX Pad Control Register 84
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO84 RGPIO84 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO85

Software MUX Pad Control Register 85
address_offset : 0x154 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO85 RGPIO85 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD6

Software MUX Pad Control Register 85
address_offset : 0x154 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD6 PTD6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[85] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DQS_A of instance: quadspi0.

#011 : 011

Select mux mode: ALT3 mux port: SIN of instance: dspi1.

#100 : 100

Select mux mode: ALT4 mux port: FB_AD[9] of instance: platform.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[23] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO86

Software MUX Pad Control Register 86
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO86 RGPIO86 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD7

Software MUX Pad Control Register 86
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD7 PTD7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[86] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: QSCK_B of instance: quadspi0.

#011 : 011

Select mux mode: ALT3 mux port: SOUT of instance: dspi1.

#100 : 100

Select mux mode: ALT4 mux port: FB_AD[8] of instance: platform.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[24] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD8

Software MUX Pad Control Register 87
address_offset : 0x15C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD8 PTD8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[87] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: QPCS0_B of instance: quadspi0.

#010 : 010

Select mux mode: ALT2 mux port: FB_CLKOUT of instance: lpcg0.

#011 : 011

Select mux mode: ALT3 mux port: SCK of instance: dspi1.

#100 : 100

Select mux mode: ALT4 mux port: FB_AD[7] of instance: platform.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[25] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO87

Software MUX Pad Control Register 87
address_offset : 0x15C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO87 RGPIO87 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD9

Software MUX Pad Control Register 88
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD9 PTD9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[88] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: QSPI_IO3_B of instance: quadspi0.

#010 : 010

Select mux mode: ALT2 mux port: CS1 of instance: dspi3.

#100 : 100

Select mux mode: ALT4 mux port: FB_AD[6] of instance: platform.

#110 : 110

Select mux mode: ALT6 mux port: TX_SYNC of instance: sai1.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[2] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO88

Software MUX Pad Control Register 88
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO88 RGPIO88 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO89

Software MUX Pad Control Register 89
address_offset : 0x164 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO89 RGPIO89 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD10

Software MUX Pad Control Register 89
address_offset : 0x164 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD10 PTD10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[89] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: QSPI_IO2_B of instance: quadspi0.

#010 : 010

Select mux mode: ALT2 mux port: CS0 of instance: dspi3.

#100 : 100

Select mux mode: ALT4 mux port: FB_AD[5] of instance: platform.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[3] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO90

Software MUX Pad Control Register 90
address_offset : 0x168 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO90 RGPIO90 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD11

Software MUX Pad Control Register 90
address_offset : 0x168 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD11 PTD11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[90] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: QSPI_IO1_B of instance: quadspi0.

#010 : 010

Select mux mode: ALT2 mux port: SIN of instance: dspi3.

#100 : 100

Select mux mode: ALT4 mux port: FB_AD[4] of instance: platform.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[26] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO91

Software MUX Pad Control Register 91
address_offset : 0x16C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO91 RGPIO91 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD12

Software MUX Pad Control Register 91
address_offset : 0x16C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD12 PTD12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[91] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: QSPI_IO0_B of instance: quadspi0.

#010 : 010

Select mux mode: ALT2 mux port: SOUT of instance: dspi3.

#100 : 100

Select mux mode: ALT4 mux port: FB_AD[3] of instance: platform.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[27] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO92

Software MUX Pad Control Register 92
address_offset : 0x170 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO92 RGPIO92 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD13

Software MUX Pad Control Register 92
address_offset : 0x170 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD13 PTD13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[92] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DQS_B of instance: quadspi0.

#010 : 010

Select mux mode: ALT2 mux port: SCK of instance: dspi3.

#100 : 100

Select mux mode: ALT4 mux port: FB_AD[2] of instance: platform.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[28] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO93

Software MUX Pad Control Register 93
address_offset : 0x174 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO93 RGPIO93 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB23

Software MUX Pad Control Register 93
address_offset : 0x174 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB23 PTB23 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[93] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TX_BCLK of instance: sai0.

#010 : 010

Select mux mode: ALT2 mux port: TX of instance: sci_flx1.

#100 : 100

Select mux mode: ALT4 mux port: FB_MUXED_ALE of instance: platform.

#101 : 101

Select mux mode: ALT5 mux port: FB_TS_b of instance: platform.

#110 : 110

Select mux mode: ALT6 mux port: RTS of instance: sci_flx3.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[13] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB24

Software MUX Pad Control Register 94
address_offset : 0x178 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB24 PTB24 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[94] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RX_BCLK of instance: sai0.

#010 : 010

Select mux mode: ALT2 mux port: RX of instance: sci_flx1.

#100 : 100

Select mux mode: ALT4 mux port: FB_MUXED_TSIZ0 of instance: platform.

#101 : 101

Select mux mode: ALT5 mux port: NF_WE_b of instance: nfc_mlc.

#110 : 110

Select mux mode: ALT6 mux port: CTS of instance: sci_flx3.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[14] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO94

Software MUX Pad Control Register 94
address_offset : 0x178 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO94 RGPIO94 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB25

Software MUX Pad Control Register 95
address_offset : 0x17C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB25 PTB25 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[95] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RX_DATA of instance: sai0.

#010 : 010

Select mux mode: ALT2 mux port: RTS of instance: sci_flx1.

#100 : 100

Select mux mode: ALT4 mux port: FB_CS1_b of instance: platform.

#101 : 101

Select mux mode: ALT5 mux port: NF_CE0_b of instance: nfc_mlc.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[15] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO95

Software MUX Pad Control Register 95
address_offset : 0x17C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO95 RGPIO95 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTA16

Software MUX Pad Control Register 6
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA16 PTA16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[6] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TRACED[0] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: VBUS_EN_OTG of instance: usb.

#011 : 011

Select mux mode: ALT3 mux port: ADC1SE0 of instance: adc1_da.

#100 : 100

Select mux mode: ALT4 mux port: LCD29 of instance: lcd_64f6b.

#101 : 101

Select mux mode: ALT5 mux port: TX_BCLK of instance: sai2.

#110 : 110

Select mux mode: ALT6 mux port: DATA[14] of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: SDA of instance: i2c0.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO6

Software MUX Pad Control Register 6
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO6 RGPIO6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO96

Software MUX Pad Control Register 96
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO96 RGPIO96 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB26

Software MUX Pad Control Register 96
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB26 PTB26 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[96] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TX_DATA of instance: sai0.

#010 : 010

Select mux mode: ALT2 mux port: CTS of instance: sci_flx1.

#011 : 011

Select mux mode: ALT3 mux port: RCON21 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: FB_CS0_b of instance: platform.

#101 : 101

Select mux mode: ALT5 mux port: NF_CE1_b of instance: nfc_mlc.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[16] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB27

Software MUX Pad Control Register 97
address_offset : 0x184 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB27 PTB27 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[97] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RX_SYNC of instance: sai0.

#011 : 011

Select mux mode: ALT3 mux port: RCON22 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: FB_OE_b of instance: platform.

#101 : 101

Select mux mode: ALT5 mux port: FB_MUXED_TBST_b of instance: platform.

#110 : 110

Select mux mode: ALT6 mux port: NF_RE_b of instance: nfc_mlc.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[17] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO97

Software MUX Pad Control Register 97
address_offset : 0x184 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO97 RGPIO97 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO98

Software MUX Pad Control Register 98
address_offset : 0x188 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO98 RGPIO98 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB28

Software MUX Pad Control Register 98
address_offset : 0x188 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB28 PTB28 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[98] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TX_SYNC of instance: sai0.

#011 : 011

Select mux mode: ALT3 mux port: RCON23 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: FB_RW_b of instance: platform.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[8] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO99

Software MUX Pad Control Register 99
address_offset : 0x18C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO99 RGPIO99 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC26

Software MUX Pad Control Register 99
address_offset : 0x18C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC26 PTC26 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[99] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TX_BCLK of instance: sai1.

#010 : 010

Select mux mode: ALT2 mux port: CS5 of instance: dspi0.

#011 : 011

Select mux mode: ALT3 mux port: RCON24 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: FB_TA_b of instance: platform.

#101 : 101

Select mux mode: ALT5 mux port: NF_RB_b of instance: nfc_mlc.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[9] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO100

Software MUX Pad Control Register 100
address_offset : 0x190 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO100 RGPIO100 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC27

Software MUX Pad Control Register 100
address_offset : 0x190 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC27 PTC27 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[100] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RX_BCLK of instance: sai1.

#010 : 010

Select mux mode: ALT2 mux port: CS4 of instance: dspi0.

#011 : 011

Select mux mode: ALT3 mux port: RCON25 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: FB_BE3_b of instance: platform.

#101 : 101

Select mux mode: ALT5 mux port: FB_CS3_b of instance: platform.

#110 : 110

Select mux mode: ALT6 mux port: NF_ALE of instance: nfc_mlc.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[4] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC28

Software MUX Pad Control Register 101
address_offset : 0x194 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC28 PTC28 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[101] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RX_DATA of instance: sai1.

#010 : 010

Select mux mode: ALT2 mux port: CS3 of instance: dspi0.

#011 : 011

Select mux mode: ALT3 mux port: RCON26 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: FB_BE2_b of instance: platform.

#101 : 101

Select mux mode: ALT5 mux port: FB_CS2_b of instance: platform.

#110 : 110

Select mux mode: ALT6 mux port: NF_CLE of instance: nfc_mlc.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[5] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO101

Software MUX Pad Control Register 101
address_offset : 0x194 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO101 RGPIO101 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO102

Software MUX Pad Control Register 102
address_offset : 0x198 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO102 RGPIO102 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC29

Software MUX Pad Control Register 102
address_offset : 0x198 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC29 PTC29 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[102] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TX_DATA of instance: sai1.

#010 : 010

Select mux mode: ALT2 mux port: CS2 of instance: dspi0.

#011 : 011

Select mux mode: ALT3 mux port: RCON27 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: FB_BE1_b of instance: platform.

#101 : 101

Select mux mode: ALT5 mux port: FB_MUXED_TSIZ1 of instance: platform.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[6] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO103

Software MUX Pad Control Register 103
address_offset : 0x19C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO103 RGPIO103 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC30

Software MUX Pad Control Register 103
address_offset : 0x19C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC30 PTC30 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[103] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RX_SYNC of instance: sai1.

#010 : 010

Select mux mode: ALT2 mux port: CS2 of instance: dspi1.

#011 : 011

Select mux mode: ALT3 mux port: RCON28 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: FB_MUXED_BE0_b of instance: platform.

#101 : 101

Select mux mode: ALT5 mux port: FB_TSIZ0 of instance: platform.

#110 : 110

Select mux mode: ALT6 mux port: ADC0SE5 of instance: adc0_da.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[7] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO104

Software MUX Pad Control Register 104
address_offset : 0x1A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO104 RGPIO104 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC31

Software MUX Pad Control Register 104
address_offset : 0x1A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC31 PTC31 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[104] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TX_SYNC of instance: sai1.

#011 : 011

Select mux mode: ALT3 mux port: RCON29 of instance: src.

#110 : 110

Select mux mode: ALT6 mux port: ADC1SE5 of instance: adc1_da.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[8] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE0

Software MUX Pad Control Register 105
address_offset : 0x1A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE0 PTE0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[105] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TCON[1] of instance: tcon0.

#010 : 010

Select mux mode: ALT2 mux port: BOOTMODE[1] of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD0 of instance: lcd_64f6b.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[29] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO105

Software MUX Pad Control Register 105
address_offset : 0x1A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO105 RGPIO105 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE1

Software MUX Pad Control Register 106
address_offset : 0x1A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE1 PTE1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[106] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TCON[2] of instance: tcon0.

#010 : 010

Select mux mode: ALT2 mux port: BOOTMODE[0] of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD1 of instance: lcd_64f6b.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[30] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO106

Software MUX Pad Control Register 106
address_offset : 0x1A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO106 RGPIO106 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO107

Software MUX Pad Control Register 107
address_offset : 0x1AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO107 RGPIO107 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE2

Software MUX Pad Control Register 107
address_offset : 0x1AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE2 PTE2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[107] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[1] of instance: tcon0.

#100 : 100

Select mux mode: ALT4 mux port: LCD2 of instance: lcd_64f6b.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[31] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO108

Software MUX Pad Control Register 108
address_offset : 0x1B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO108 RGPIO108 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE3

Software MUX Pad Control Register 108
address_offset : 0x1B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE3 PTE3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[108] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TCON[0] of instance: tcon0.

#100 : 100

Select mux mode: ALT4 mux port: LCD3 of instance: lcd_64f6b.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[32] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO109

Software MUX Pad Control Register 109
address_offset : 0x1B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO109 RGPIO109 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE4

Software MUX Pad Control Register 109
address_offset : 0x1B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE4 PTE4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[109] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TCON[3] of instance: tcon0.

#100 : 100

Select mux mode: ALT4 mux port: LCD4 of instance: lcd_64f6b.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[33] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO110

Software MUX Pad Control Register 110
address_offset : 0x1B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO110 RGPIO110 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE5

Software MUX Pad Control Register 110
address_offset : 0x1B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE5 PTE5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[110] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[18] of instance: tcon0.

#100 : 100

Select mux mode: ALT4 mux port: LCD5 of instance: lcd_64f6b.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[34] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE6

Software MUX Pad Control Register 111
address_offset : 0x1BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE6 PTE6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[111] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[19] of instance: tcon0.

#100 : 100

Select mux mode: ALT4 mux port: LCD6 of instance: lcd_64f6b.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[35] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO111

Software MUX Pad Control Register 111
address_offset : 0x1BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO111 RGPIO111 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTA17

Software MUX Pad Control Register 7
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA17 PTA17 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[7] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TRACED[1] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: VBUS_OC_OTG of instance: usb.

#011 : 011

Select mux mode: ALT3 mux port: ADC1SE1 of instance: adc1_da.

#100 : 100

Select mux mode: ALT4 mux port: LCD30 of instance: lcd_64f6b.

#101 : 101

Select mux mode: ALT5 mux port: USB0_SOF_PULSE of instance: usb.

#110 : 110

Select mux mode: ALT6 mux port: DATA[15] of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: SCL of instance: i2c1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO7

Software MUX Pad Control Register 7
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO7 RGPIO7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE7

Software MUX Pad Control Register 112
address_offset : 0x1C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE7 PTE7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[112] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[20] of instance: tcon0.

#011 : 011

Select mux mode: ALT3 mux port: RCON0 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD7 of instance: lcd_64f6b.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[36] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO112

Software MUX Pad Control Register 112
address_offset : 0x1C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO112 RGPIO112 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE8

Software MUX Pad Control Register 113
address_offset : 0x1C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE8 PTE8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[113] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[21] of instance: tcon0.

#011 : 011

Select mux mode: ALT3 mux port: RCON1 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD8 of instance: lcd_64f6b.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[37] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO113

Software MUX Pad Control Register 113
address_offset : 0x1C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO113 RGPIO113 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE9

Software MUX Pad Control Register 114
address_offset : 0x1C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE9 PTE9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[114] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[22] of instance: tcon0.

#011 : 011

Select mux mode: ALT3 mux port: RCON2 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD9 of instance: lcd_64f6b.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[38] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO114

Software MUX Pad Control Register 114
address_offset : 0x1C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO114 RGPIO114 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO115

Software MUX Pad Control Register 115
address_offset : 0x1CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO115 RGPIO115 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE10

Software MUX Pad Control Register 115
address_offset : 0x1CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE10 PTE10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[115] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[23] of instance: tcon0.

#011 : 011

Select mux mode: ALT3 mux port: RCON3 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD10 of instance: lcd_64f6b.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[39] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO116

Software MUX Pad Control Register 116
address_offset : 0x1D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO116 RGPIO116 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE11

Software MUX Pad Control Register 116
address_offset : 0x1D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE11 PTE11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[116] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[24] of instance: tcon0.

#011 : 011

Select mux mode: ALT3 mux port: RCON4 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD11 of instance: lcd_64f6b.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[40] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE12

Software MUX Pad Control Register 117
address_offset : 0x1D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE12 PTE12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[117] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[25] of instance: tcon0.

#010 : 010

Select mux mode: ALT2 mux port: CS3 of instance: dspi1.

#011 : 011

Select mux mode: ALT3 mux port: RCON5 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD12 of instance: lcd_64f6b.

#111 : 111

Select mux mode: ALT7 mux port: LP_IN of instance: lptimer.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO117

Software MUX Pad Control Register 117
address_offset : 0x1D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO117 RGPIO117 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE13

Software MUX Pad Control Register 118
address_offset : 0x1D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE13 PTE13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[118] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[10] of instance: tcon0.

#100 : 100

Select mux mode: ALT4 mux port: LCD13 of instance: lcd_64f6b.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[41] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO118

Software MUX Pad Control Register 118
address_offset : 0x1D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO118 RGPIO118 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE14

Software MUX Pad Control Register 119
address_offset : 0x1DC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE14 PTE14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[119] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[11] of instance: tcon0.

#100 : 100

Select mux mode: ALT4 mux port: LCD14 of instance: lcd_64f6b.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[42] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO119

Software MUX Pad Control Register 119
address_offset : 0x1DC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO119 RGPIO119 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE15

Software MUX Pad Control Register 120
address_offset : 0x1E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE15 PTE15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[120] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[12] of instance: tcon0.

#011 : 011

Select mux mode: ALT3 mux port: RCON6 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD15 of instance: lcd_64f6b.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[43] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO120

Software MUX Pad Control Register 120
address_offset : 0x1E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO120 RGPIO120 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO121

Software MUX Pad Control Register 121
address_offset : 0x1E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO121 RGPIO121 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE16

Software MUX Pad Control Register 121
address_offset : 0x1E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE16 PTE16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[121] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[13] of instance: tcon0.

#011 : 011

Select mux mode: ALT3 mux port: RCON7 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD16 of instance: lcd_64f6b.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE17

Software MUX Pad Control Register 122
address_offset : 0x1E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE17 PTE17 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[122] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[14] of instance: tcon0.

#011 : 011

Select mux mode: ALT3 mux port: RCON8 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD17 of instance: lcd_64f6b.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO122

Software MUX Pad Control Register 122
address_offset : 0x1E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO122 RGPIO122 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE18

Software MUX Pad Control Register 123
address_offset : 0x1EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE18 PTE18 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[123] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[15] of instance: tcon0.

#011 : 011

Select mux mode: ALT3 mux port: RCON9 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD18 of instance: lcd_64f6b.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO123

Software MUX Pad Control Register 123
address_offset : 0x1EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO123 RGPIO123 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE19

Software MUX Pad Control Register 124
address_offset : 0x1F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE19 PTE19 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[124] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[16] of instance: tcon0.

#011 : 011

Select mux mode: ALT3 mux port: RCON10 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD19 of instance: lcd_64f6b.

#101 : 101

Select mux mode: ALT5 mux port: SCL of instance: i2c0.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO124

Software MUX Pad Control Register 124
address_offset : 0x1F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO124 RGPIO124 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE20

Software MUX Pad Control Register 125
address_offset : 0x1F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE20 PTE20 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[125] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[17] of instance: tcon0.

#011 : 011

Select mux mode: ALT3 mux port: RCON11 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD20 of instance: lcd_64f6b.

#101 : 101

Select mux mode: ALT5 mux port: SDA of instance: i2c0.

#111 : 111

Select mux mode: ALT7 mux port: in of instance: ewm.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO125

Software MUX Pad Control Register 125
address_offset : 0x1F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO125 RGPIO125 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE21

Software MUX Pad Control Register 126
address_offset : 0x1F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE21 PTE21 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[126] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[2] of instance: tcon0.

#100 : 100

Select mux mode: ALT4 mux port: LCD21 of instance: lcd_64f6b.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO126

Software MUX Pad Control Register 126
address_offset : 0x1F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO126 RGPIO126 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO127

Software MUX Pad Control Register 127
address_offset : 0x1FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO127 RGPIO127 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE22

Software MUX Pad Control Register 127
address_offset : 0x1FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE22 PTE22 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[127] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[3] of instance: tcon0.

#100 : 100

Select mux mode: ALT4 mux port: LCD22 of instance: lcd_64f6b.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO8

Software MUX Pad Control Register 8
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO8 RGPIO8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTA18

Software MUX Pad Control Register 8
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA18 PTA18 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[8] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TRACED[2] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: ADC0SE0 of instance: adc0_da.

#011 : 011

Select mux mode: ALT3 mux port: QD_PHA of instance: flextimer1.

#100 : 100

Select mux mode: ALT4 mux port: LCD31 of instance: lcd_64f6b.

#101 : 101

Select mux mode: ALT5 mux port: TX_DATA of instance: sai2.

#110 : 110

Select mux mode: ALT6 mux port: DATA[16] of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: SDA of instance: i2c1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE23

Software MUX Pad Control Register 128
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE23 PTE23 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[128] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[4] of instance: tcon0.

#011 : 011

Select mux mode: ALT3 mux port: RCON12 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD23 of instance: lcd_64f6b.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO128

Software MUX Pad Control Register 128
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO128 RGPIO128 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE24

Software MUX Pad Control Register 129
address_offset : 0x204 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE24 PTE24 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[129] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[5] of instance: tcon0.

#011 : 011

Select mux mode: ALT3 mux port: RCON13 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD24 of instance: lcd_64f6b.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO129

Software MUX Pad Control Register 129
address_offset : 0x204 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO129 RGPIO129 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE25

Software MUX Pad Control Register 130
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE25 PTE25 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[130] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[6] of instance: tcon0.

#011 : 011

Select mux mode: ALT3 mux port: RCON14 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD25 of instance: lcd_64f6b.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO130

Software MUX Pad Control Register 130
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO130 RGPIO130 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE26

Software MUX Pad Control Register 131
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE26 PTE26 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[131] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[7] of instance: tcon0.

#011 : 011

Select mux mode: ALT3 mux port: RCON15 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD26 of instance: lcd_64f6b.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO131

Software MUX Pad Control Register 131
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO131 RGPIO131 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE27

Software MUX Pad Control Register 132
address_offset : 0x210 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE27 PTE27 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[132] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[8] of instance: tcon0.

#011 : 011

Select mux mode: ALT3 mux port: RCON16 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD27 of instance: lcd_64f6b.

#101 : 101

Select mux mode: ALT5 mux port: SCL of instance: i2c1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO132

Software MUX Pad Control Register 132
address_offset : 0x210 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO132 RGPIO132 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO133

Software MUX Pad Control Register 133
address_offset : 0x214 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO133 RGPIO133 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTE28

Software MUX Pad Control Register 133
address_offset : 0x214 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTE28 PTE28 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[133] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: DATA_OUT[9] of instance: tcon0.

#011 : 011

Select mux mode: ALT3 mux port: RCON17 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD28 of instance: lcd_64f6b.

#101 : 101

Select mux mode: ALT5 mux port: SDA of instance: i2c1.

#111 : 111

Select mux mode: ALT7 mux port: out of instance: ewm.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTA7

Software MUX Pad Control Register 134
address_offset : 0x218 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA7 PTA7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#00 : 00

Select mux mode: ALT0 mux port: GPIO[134] of instance: rgpioc.

#01 : 01

Select mux mode: ALT1 mux port: PIX_CLK of instance: video_in0.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO134

Software MUX Pad Control Register 134
address_offset : 0x218 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO134 RGPIO134 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


DDR_RESETB

Software MUX DDR RESET Pad Configuration Register
address_offset : 0x21C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_RESETB DDR_RESETB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_A_15

Software MUX DDR A15 Pad Control Register
address_offset : 0x220 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_A_15 DDR_A_15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_A_14

Software MUX DDR A14 Pad Control Register
address_offset : 0x224 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_A_14 DDR_A_14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_A_13

Software MUX DDR A13 Pad Control Register
address_offset : 0x228 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_A_13 DDR_A_13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_A_12

Software MUX DDR A12 Pad Control Register
address_offset : 0x22C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_A_12 DDR_A_12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_A_11

Software MUX DDR A11 Pad Control Register
address_offset : 0x230 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_A_11 DDR_A_11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_A_10

Software MUX DDR A10 Pad Control Register
address_offset : 0x234 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_A_10 DDR_A_10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_A_9

Software MUX DDR A9 Pad Control Register
address_offset : 0x238 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_A_9 DDR_A_9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_A_8

Software MUX DDR A8 Pad Control Register
address_offset : 0x23C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_A_8 DDR_A_8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


PTA19

Software MUX Pad Control Register 9
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA19 PTA19 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[9] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TRACED[3] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: ADC0SE1 of instance: adc0_da.

#011 : 011

Select mux mode: ALT3 mux port: QD_PHB of instance: flextimer1.

#100 : 100

Select mux mode: ALT4 mux port: LCD32 of instance: lcd_64f6b.

#101 : 101

Select mux mode: ALT5 mux port: TX_SYNC of instance: sai2.

#110 : 110

Select mux mode: ALT6 mux port: DATA[17] of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: QSCK_A of instance: quadspi1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO9

Software MUX Pad Control Register 9
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO9 RGPIO9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


DDR_A_7

Software MUX DDR A7 Pad Control Register
address_offset : 0x240 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_A_7 DDR_A_7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_A_6

Software MUX DDR A6 Pad Control Register
address_offset : 0x244 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_A_6 DDR_A_6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_A_5

Software MUX DDR A5 Pad Control Register
address_offset : 0x248 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_A_5 DDR_A_5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_A_4

Software MUX DDR A4 Pad Control Register
address_offset : 0x24C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_A_4 DDR_A_4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_A_3

Software MUX DDR Pad A3 Control Register
address_offset : 0x250 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_A_3 DDR_A_3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_A_2

Software MUX DDR A2 Pad Control Register
address_offset : 0x254 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_A_2 DDR_A_2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_A_1

Software MUX DDR A1 Pad Control Register
address_offset : 0x258 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_A_1 DDR_A_1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_A_0

Software MUX DDR A0 Pad Control Register
address_offset : 0x25C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_A_0 DDR_A_0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_BA_2

Software MUX DDR BA2 Pad Control Register
address_offset : 0x260 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_BA_2 DDR_BA_2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_BA_1

Software MUX DDR BA1 Pad Control Register
address_offset : 0x264 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_BA_1 DDR_BA_1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_BA_0

Software MUX DDR BA0 Pad Control Register
address_offset : 0x268 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_BA_0 DDR_BA_0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_CAS_B

Software MUX DDR CAS Pad Control Register
address_offset : 0x26C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_CAS_B DDR_CAS_B read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_CKE_0

Software MUX DDR CKE0 Pad Control Register
address_offset : 0x270 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_CKE_0 DDR_CKE_0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_CLK_0

Software MUX DDR CLK0 Pad Control Register
address_offset : 0x274 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_CLK_0 DDR_CLK_0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_CS_B_0

Software MUX DDR CS B0 Pad Control Register
address_offset : 0x278 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_CS_B_0 DDR_CS_B_0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_CS_D_15

Software MUX DDR CS D15 Pad Control Register
address_offset : 0x27C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_CS_D_15 DDR_CS_D_15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


RGPIO10

Software MUX Pad Control Register 10
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO10 RGPIO10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTA20

Software MUX Pad Control Register 10
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA20 PTA20 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[10] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TRACED[4] of instance: platform.

#100 : 100

Select mux mode: ALT4 mux port: LCD33 of instance: lcd_64f6b.

#110 : 110

Select mux mode: ALT6 mux port: TX of instance: sci_flx3.

#111 : 111

Select mux mode: ALT7 mux port: TCON[1] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


DDR_CS_D_14

Software MUX DDR CS D14 Pad Control Register
address_offset : 0x280 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_CS_D_14 DDR_CS_D_14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_CS_D_13

Software MUX DDR CS D13 Pad Control Register
address_offset : 0x284 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_CS_D_13 DDR_CS_D_13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_CS_D_12

Software MUX DDR CS D12 Pad Control Register
address_offset : 0x288 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_CS_D_12 DDR_CS_D_12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_CS_D_11

Software MUX DDR CS D11 Pad Control Register
address_offset : 0x28C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_CS_D_11 DDR_CS_D_11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_CS_D_10

Software MUX DDR CS D10 Pad Control Register
address_offset : 0x290 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_CS_D_10 DDR_CS_D_10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_CS_D_9

Software MUX DDR CS D9 Pad Control Register
address_offset : 0x294 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_CS_D_9 DDR_CS_D_9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_CS_D_8

Software MUX DDR CS D8 Pad Control Register
address_offset : 0x298 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_CS_D_8 DDR_CS_D_8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_CS_D_7

Software MUX DDR CS D7 Pad Control Register
address_offset : 0x29C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_CS_D_7 DDR_CS_D_7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_CS_D_6

Software MUX DDR CS D6 Pad Control Register
address_offset : 0x2A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_CS_D_6 DDR_CS_D_6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_CS_D_5

Software MUX DDR CS D5 Pad Control Register
address_offset : 0x2A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_CS_D_5 DDR_CS_D_5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_CS_D_4

Software MUX DDR CS D4 Pad Control Register
address_offset : 0x2A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_CS_D_4 DDR_CS_D_4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_CS_D_3

Software MUX DDR CS D3 Pad Control Register
address_offset : 0x2AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_CS_D_3 DDR_CS_D_3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_CS_D_2

Software MUX DDR CS D2 Pad Control Register
address_offset : 0x2B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_CS_D_2 DDR_CS_D_2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_CS_D_1

Software MUX DDR CS D1 Pad Control Register
address_offset : 0x2B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_CS_D_1 DDR_CS_D_1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_CS_D_0

Software MUX DDR CS D0 Pad Control Register
address_offset : 0x2B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_CS_D_0 DDR_CS_D_0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_DQM_1

Software MUX DDR DQM1 Pad Control Register
address_offset : 0x2BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_DQM_1 DDR_DQM_1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


PTA21

Software MUX Pad Control Register 11
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA21 PTA21 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[11] of instance: rgpioc. Also, RXCLK for MAC0 is enabled in this mux mode so ensure obe is disabled if this pin is used for MAC0-MII instead of GPIO.

#001 : 001

Select mux mode: ALT1 mux port: TRACED[5] of instance: platform.

#101 : 101

Select mux mode: ALT5 mux port: RX_BCLK of instance: sai2.

#110 : 110

Select mux mode: ALT6 mux port: RX of instance: sci_flx3.

#111 : 111

Select mux mode: ALT7 mux port: TCON[2] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO11

Software MUX Pad Control Register 11
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO11 RGPIO11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


DDR_DQM_0

Software MUX DDR DQM0 Pad Control Register 0
address_offset : 0x2C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_DQM_0 DDR_DQM_0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_DQS_1

Software MUX DDR DQS1 Pad Control Register 1
address_offset : 0x2C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_DQS_1 DDR_DQS_1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_DQS_0

Software MUX DDR DQS0 Pad Control Register 0
address_offset : 0x2C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_DQS_0 DDR_DQS_0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_RAS_B

Software MUX DDR RAS Pad Control Register
address_offset : 0x2CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_RAS_B DDR_RAS_B read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_WE_B

Software MUX DDR WE Pad Control Register
address_offset : 0x2D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_WE_B DDR_WE_B read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_ODT_0

Software MUX DDR ODT0 Pad Control Register
address_offset : 0x2D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_ODT_0 DDR_ODT_0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DDR_ODT_1

Software MUX DDR ODT1 Pad Control Register
address_offset : 0x2D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DDR_ODT_1 DDR_ODT_1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DUMMY_DDRBYTE1

Software MUX Dummy DDRBYTE1 Pad Control Register
address_offset : 0x2DC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DUMMY_DDRBYTE1 DUMMY_DDRBYTE1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


DUMMY_DDRBYTE2

Software MUX Dummy DDRBYTE2 Pad Control Register
address_offset : 0x2E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DUMMY_DDRBYTE2 DUMMY_DDRBYTE2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESERVED PUE PKE PUS DSE HYS RESERVED DDR_TRIM DDR_INPUT RESERVED

RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

RESERVED : no description available
bits : 10 - 13 (4 bit)
access : read-write

DDR_TRIM : no description available
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

#00 : 00

Minimum do->pad delay

#01 : 01

50 ps do->pad delay

#10 : 10

100 ps do->pad delay

#11 : 11

150 ps do->pad delay

End of enumeration elements list.

DDR_INPUT : no description available
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input type

#1 : 1

Differential input mode

End of enumeration elements list.

RESERVED : no description available
bits : 17 - 31 (15 bit)
access : read-write


CCM_AUD_EXT_CLK_SELECT_INPUT

CCM Audio External Clock Input Select Register
address_offset : 0x2EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCM_AUD_EXT_CLK_SELECT_INPUT CCM_AUD_EXT_CLK_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#00 : 00

Selecting Pad: PTA10 for Mode: ALT2.

#01 : 01

Selecting Pad: PTA12 for Mode: ALT2.

#10 : 10

Selecting Pad: PTB18 for Mode: ALT2.

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 31 (30 bit)
access : read-write


CCM_ENET_EXT_CLK_SELECT_INPUT

CCM Ethernet External Clock Input Select Register
address_offset : 0x2F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCM_ENET_EXT_CLK_SELECT_INPUT CCM_ENET_EXT_CLK_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTA6 for Mode: ALT2.

#1 : 1

Selecting Pad: PTA9 for Mode: ALT3.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


CCM_ENET_TS_CLK_SELECT_INPUT

CCM Ethernet TS Clock Input Select Register
address_offset : 0x2F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCM_ENET_TS_CLK_SELECT_INPUT CCM_ENET_TS_CLK_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTA10 for Mode: ALT6.

#1 : 1

Selecting Pad: PTB10 for Mode: ALT7.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


DSPI1_IPP_IND_SCK_SELECT_INPUT

DSPI1 SCK Input Select Register
address_offset : 0x2F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSPI1_IPP_IND_SCK_SELECT_INPUT DSPI1_IPP_IND_SCK_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTC8 for Mode: ALT3.

#1 : 1

Selecting Pad: PTD8 for Mode: ALT3.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


DSPI1_IPP_IND_SIN_SELECT_INPUT

DSPI1 SIN Input Select Register
address_offset : 0x2FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSPI1_IPP_IND_SIN_SELECT_INPUT DSPI1_IPP_IND_SIN_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTC6 for Mode: ALT3.

#1 : 1

Selecting Pad: PTD6 for Mode: ALT3.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


PTA22

Software MUX Pad Control Register 12
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA22 PTA22 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[12] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TRACED[6] of instance: platform.

#101 : 101

Select mux mode: ALT5 mux port: RX_DATA of instance: sai2.

#110 : 110

Select mux mode: ALT6 mux port: SCL of instance: i2c2.

#111 : 111

Select mux mode: ALT7 mux port: TCON[0] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO12

Software MUX Pad Control Register 12
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO12 RGPIO12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


DSPI1_IPP_IND_SS_B_SELECT_INPUT

DSPI1 SS Input Select Register
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSPI1_IPP_IND_SS_B_SELECT_INPUT DSPI1_IPP_IND_SS_B_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTC5 for Mode: ALT3.

#1 : 1

Selecting Pad: PTD5 for Mode: ALT3.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


ENET_SWIAHB_IPP_IND_MAC0_TIMER_0_SELECT_INPUT

Ethernet MAC0 TIMER0 Input Select Register
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENET_SWIAHB_IPP_IND_MAC0_TIMER_0_SELECT_INPUT ENET_SWIAHB_IPP_IND_MAC0_TIMER_0_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTB11 for Mode: ALT7.

#1 : 1

Selecting Pad: PTD23 for Mode: ALT4.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


ENET_SWIAHB_IPP_IND_MAC0_TIMER_1_SELECT_INPUT

Ethernet MAC0 TIMER1 Input Select Register
address_offset : 0x308 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENET_SWIAHB_IPP_IND_MAC0_TIMER_1_SELECT_INPUT ENET_SWIAHB_IPP_IND_MAC0_TIMER_1_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTB12 for Mode: ALT7.

#1 : 1

Selecting Pad: PTD22 for Mode: ALT4.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


ESAI_IPP_IND_FST_SELECT_INPUT

ESAI FST Input Select Register
address_offset : 0x30C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ESAI_IPP_IND_FST_SELECT_INPUT ESAI_IPP_IND_FST_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTC1 for Mode: ALT4.

#1 : 1

Selecting Pad: PTC10 for Mode: ALT3.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


ESAI_IPP_IND_SCKT_SELECT_INPUT

ESAI SCKT Input Select Register
address_offset : 0x310 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ESAI_IPP_IND_SCKT_SELECT_INPUT ESAI_IPP_IND_SCKT_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTC0 for Mode: ALT4.

#1 : 1

Selecting Pad: PTC9 for Mode: ALT3.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


ESAI_IPP_IND_SDO0_SELECT_INPUT

ESAI SDO0 Input Select Register
address_offset : 0x314 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ESAI_IPP_IND_SDO0_SELECT_INPUT ESAI_IPP_IND_SDO0_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTC2 for Mode: ALT4.

#1 : 1

Selecting Pad: PTC11 for Mode: ALT3.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


ESAI_IPP_IND_SDO1_SELECT_INPUT

ESAI SDO1 Input Select Register
address_offset : 0x318 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ESAI_IPP_IND_SDO1_SELECT_INPUT ESAI_IPP_IND_SDO1_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTC3 for Mode: ALT4.

#1 : 1

Selecting Pad: PTC12 for Mode: ALT3.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


ESAI_IPP_IND_SDO2_SDI3_SELECT_INPUT

ESAI SDO2 Input Select Register
address_offset : 0x31C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ESAI_IPP_IND_SDO2_SDI3_SELECT_INPUT ESAI_IPP_IND_SDO2_SDI3_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTC4 for Mode: ALT4.

#1 : 1

Selecting Pad: PTC13 for Mode: ALT3.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


ESAI_IPP_IND_SDO3_SDI2_SELECT_INPUT

ESAI SDO3 Input Select Register
address_offset : 0x320 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ESAI_IPP_IND_SDO3_SDI2_SELECT_INPUT ESAI_IPP_IND_SDO3_SDI2_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTC5 for Mode: ALT4.

#1 : 1

Selecting Pad: PTC14 for Mode: ALT3.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


ESAI_IPP_IND_SDO4_SDI1_SELECT_INPUT

ESAI SDO4 Input Select Register
address_offset : 0x324 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ESAI_IPP_IND_SDO4_SDI1_SELECT_INPUT ESAI_IPP_IND_SDO4_SDI1_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTC7 for Mode: ALT4.

#1 : 1

Selecting Pad: PTC16 for Mode: ALT3.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


ESAI_IPP_IND_SDO5_SDI0_SELECT_INPUT

ESAI SDO5 Input Select Register
address_offset : 0x328 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ESAI_IPP_IND_SDO5_SDI0_SELECT_INPUT ESAI_IPP_IND_SDO5_SDI0_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTC6 for Mode: ALT4.

#1 : 1

Selecting Pad: PTC15 for Mode: ALT3.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


FLEXTIMER1_IPP_IND_FTM_CH_0_SELECT_INPUT

FlexTimer1 CH0 Input Select Register
address_offset : 0x32C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLEXTIMER1_IPP_IND_FTM_CH_0_SELECT_INPUT FLEXTIMER1_IPP_IND_FTM_CH_0_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTB8 for Mode: ALT1.

#1 : 1

Selecting Pad: PTC0 for Mode: ALT2.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


FLEXTIMER1_IPP_IND_FTM_CH_1_SELECT_INPUT

FlexTimer1 CH1 Input Select Register
address_offset : 0x330 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLEXTIMER1_IPP_IND_FTM_CH_1_SELECT_INPUT FLEXTIMER1_IPP_IND_FTM_CH_1_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTB9 for Mode: ALT1.

#1 : 1

Selecting Pad: PTC1 for Mode: ALT2.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


FLEXTIMER1_IPP_IND_FTM_PHA_SELECT_INPUT

FlexTimer1 PHA Input Select Register
address_offset : 0x334 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLEXTIMER1_IPP_IND_FTM_PHA_SELECT_INPUT FLEXTIMER1_IPP_IND_FTM_PHA_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTA18 for Mode: ALT3.

#1 : 1

Selecting Pad: PTB8 for Mode: ALT3.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


FLEXTIMER1_IPP_IND_FTM_PHB_SELECT_INPUT

FlexTimer1 PHB Input Select Register
address_offset : 0x338 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLEXTIMER1_IPP_IND_FTM_PHB_SELECT_INPUT FLEXTIMER1_IPP_IND_FTM_PHB_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTA19 for Mode: ALT3.

#1 : 1

Selecting Pad: PTB9 for Mode: ALT3.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


I2C0_IPP_SCL_IND_SELECT_INPUT

I2C0 SCL Input Select Register
address_offset : 0x33C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C0_IPP_SCL_IND_SELECT_INPUT I2C0_IPP_SCL_IND_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#00 : 00

Selecting Pad: PTA12 for Mode: ALT7.

#01 : 01

Selecting Pad: PTB14 for Mode: ALT2.

#10 : 10

Selecting Pad: PTD19 for Mode: ALT4.

#11 : 11

Selecting Pad: PTE19 for Mode: ALT5.

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 31 (30 bit)
access : read-write


RGPIO13

Software MUX Pad Control Register 13
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO13 RGPIO13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTA23

Software MUX Pad Control Register 13
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA23 PTA23 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[13] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TRACED[7] of instance: platform.

#101 : 101

Select mux mode: ALT5 mux port: RX_SYNC of instance: sai2.

#110 : 110

Select mux mode: ALT6 mux port: SDA of instance: i2c2.

#111 : 111

Select mux mode: ALT7 mux port: TCON[3] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


I2C0_IPP_SDA_IND_SELECT_INPUT

I2C0 SDA Input Select Register
address_offset : 0x340 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C0_IPP_SDA_IND_SELECT_INPUT I2C0_IPP_SDA_IND_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#00 : 00

Selecting Pad: PTA16 for Mode: ALT7.

#01 : 01

Selecting Pad: PTB15 for Mode: ALT2.

#10 : 10

Selecting Pad: PTD18 for Mode: ALT4.

#11 : 11

Selecting Pad: PTE20 for Mode: ALT5.

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 31 (30 bit)
access : read-write


I2C1_IPP_SCL_IND_SELECT_INPUT

I2C1 SCL Input Select Register
address_offset : 0x344 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C1_IPP_SCL_IND_SELECT_INPUT I2C1_IPP_SCL_IND_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#00 : 00

Selecting Pad: PTA17 for Mode: ALT7.

#01 : 01

Selecting Pad: PTB16 for Mode: ALT2.

#10 : 10

Selecting Pad: PTD17 for Mode: ALT4.

#11 : 11

Selecting Pad: PTE27 for Mode: ALT5.

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 31 (30 bit)
access : read-write


I2C1_IPP_SDA_IND_SELECT_INPUT

I2C1 SDA Input Select Register
address_offset : 0x348 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C1_IPP_SDA_IND_SELECT_INPUT I2C1_IPP_SDA_IND_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#00 : 00

Selecting Pad: PTA18 for Mode: ALT7.

#01 : 01

Selecting Pad: PTB17 for Mode: ALT2.

#10 : 10

Selecting Pad: PTD16 for Mode: ALT4.

#11 : 11

Selecting Pad: PTE28 for Mode: ALT5.

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 31 (30 bit)
access : read-write


I2C2_IPP_SCL_IND_SELECT_INPUT

I2C2 SCL Input Select Register
address_offset : 0x34C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C2_IPP_SCL_IND_SELECT_INPUT I2C2_IPP_SCL_IND_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTA22 for Mode: ALT6.

#1 : 1

Selecting Pad: PTD28 for Mode: ALT3.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


I2C2_IPP_SDA_IND_SELECT_INPUT

I2C2 SDA Input Select Register
address_offset : 0x350 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C2_IPP_SDA_IND_SELECT_INPUT I2C2_IPP_SDA_IND_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTA23 for Mode: ALT6.

#1 : 1

Selecting Pad: PTD27 for Mode: ALT3.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


MLB_TOP_MLBCLK_IN_SELECT_INPUT

MediaLB Clock Input Select Register
address_offset : 0x354 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MLB_TOP_MLBCLK_IN_SELECT_INPUT MLB_TOP_MLBCLK_IN_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTA8 for Mode: ALT7.

#1 : 1

Selecting Pad: PTC9 for Mode: ALT6.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


MLB_TOP_MLBDAT_IN_SELECT_INPUT

MediaLB Data Input Select Register
address_offset : 0x358 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MLB_TOP_MLBDAT_IN_SELECT_INPUT MLB_TOP_MLBDAT_IN_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTA11 for Mode: ALT7.

#1 : 1

Selecting Pad: PTC11 for Mode: ALT6.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


MLB_TOP_MLBSIG_IN_SELECT_INPUT

MediaLB Signal Input Select Register
address_offset : 0x35C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MLB_TOP_MLBSIG_IN_SELECT_INPUT MLB_TOP_MLBSIG_IN_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTA10 for Mode: ALT7.

#1 : 1

Selecting Pad: PTC10 for Mode: ALT6.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


SAI1_IPP_IND_SAI_TXSYNC_SELECT_INPUT

SAI1 TXSYNC Input Select Register
address_offset : 0x360 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SAI1_IPP_IND_SAI_TXSYNC_SELECT_INPUT SAI1_IPP_IND_SAI_TXSYNC_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTD9 for Mode: ALT6.

#1 : 1

Selecting Pad: PTC31 for Mode: ALT1.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


SAI2_IPP_IND_SAI_RXBCLK_SELECT_INPUT

SAI2 RXBCLK Input Select Register
address_offset : 0x364 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SAI2_IPP_IND_SAI_RXBCLK_SELECT_INPUT SAI2_IPP_IND_SAI_RXBCLK_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#00 : 00

Selecting Pad: PTA21 for Mode: ALT5.

#01 : 01

Selecting Pad: PTB0 for Mode: ALT5.

#10 : 10

Selecting Pad: PTC13 for Mode: ALT5.

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 31 (30 bit)
access : read-write


SAI2_IPP_IND_SAI_RXDATA_0_SELECT_INPUT

SAI2 RXDATA0 Input Select Register
address_offset : 0x368 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SAI2_IPP_IND_SAI_RXDATA_0_SELECT_INPUT SAI2_IPP_IND_SAI_RXDATA_0_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#00 : 00

Selecting Pad: PTA22 for Mode: ALT5.

#01 : 01

Selecting Pad: PTB1 for Mode: ALT5.

#10 : 10

Selecting Pad: PTC14 for Mode: ALT5.

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 31 (30 bit)
access : read-write


SAI2_IPP_IND_SAI_RXSYNC_SELECT_INPUT

SAI2 RXSYNC Input Select Register
address_offset : 0x36C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SAI2_IPP_IND_SAI_RXSYNC_SELECT_INPUT SAI2_IPP_IND_SAI_RXSYNC_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#00 : 00

Selecting Pad: PTA23 for Mode: ALT5.

#01 : 01

Selecting Pad: PTB2 for Mode: ALT5.

#10 : 10

Selecting Pad: PTC16 for Mode: ALT5.

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 31 (30 bit)
access : read-write


SAI2_IPP_IND_SAI_TXBCLK_SELECT_INPUT

SAI2 TXBLCK Input Select Register
address_offset : 0x370 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SAI2_IPP_IND_SAI_TXBCLK_SELECT_INPUT SAI2_IPP_IND_SAI_TXBCLK_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTA16 for Mode: ALT5.

#1 : 1

Selecting Pad: PTC12 for Mode: ALT5.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


SAI2_IPP_IND_SAI_TXSYNC_SELECT_INPUT

SAI2 TXSYNC Input Select Register
address_offset : 0x374 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SAI2_IPP_IND_SAI_TXSYNC_SELECT_INPUT SAI2_IPP_IND_SAI_TXSYNC_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTA19 for Mode: ALT5.

#1 : 1

Selecting Pad: PTC17 for Mode: ALT5.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


SCI_FLX1_IPP_IND_CTS_B_SELECT_INPUT

UART FLX1 CTS Input Select Register
address_offset : 0x378 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCI_FLX1_IPP_IND_CTS_B_SELECT_INPUT SCI_FLX1_IPP_IND_CTS_B_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#00 : 00

Selecting Pad: PTB7 for Mode: ALT2.

#01 : 01

Selecting Pad: PTC5 for Mode: ALT2.

#10 : 10

Selecting Pad: PTB26 for Mode: ALT2.

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 31 (30 bit)
access : read-write


SCI_FLX1_IPP_IND_SCI_RX_SELECT_INPUT

UART FLX1 RX Input Select Register
address_offset : 0x37C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCI_FLX1_IPP_IND_SCI_RX_SELECT_INPUT SCI_FLX1_IPP_IND_SCI_RX_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#00 : 00

Selecting Pad: PTB5 for Mode: ALT2.

#01 : 01

Selecting Pad: PTC3 for Mode: ALT2.

#10 : 10

Selecting Pad: PTB24 for Mode: ALT2.

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 31 (30 bit)
access : read-write


RGPIO14

Software MUX Pad Control Register 14
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO14 RGPIO14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTA24

Software MUX Pad Control Register 14
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA24 PTA24 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[14] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TRACED[8] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: VBUS_EN of instance: usb.

#101 : 101

Select mux mode: ALT5 mux port: CLK of instance: esdhc1.

#110 : 110

Select mux mode: ALT6 mux port: TCON[4] of instance: tcon1.

#111 : 111

Select mux mode: ALT7 mux port: PAD_CTRL of instance: ddr_test_logic.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


SCI_FLX1_IPP_IND_SCI_TX_SELECT_INPUT

UART FLX1 TX Input Select Register
address_offset : 0x380 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCI_FLX1_IPP_IND_SCI_TX_SELECT_INPUT SCI_FLX1_IPP_IND_SCI_TX_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#00 : 00

Selecting Pad: PTB4 for Mode: ALT2.

#01 : 01

Selecting Pad: PTC2 for Mode: ALT2.

#10 : 10

Selecting Pad: PTB23 for Mode: ALT2.

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 31 (30 bit)
access : read-write


SCI_FLX2_IPP_IND_CTS_B_SELECT_INPUT

UART FLX2 CTS Input Select Register
address_offset : 0x384 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCI_FLX2_IPP_IND_CTS_B_SELECT_INPUT SCI_FLX2_IPP_IND_CTS_B_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTD20 for Mode: ALT6.

#1 : 1

Selecting Pad: PTD3 for Mode: ALT2.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


SCI_FLX2_IPP_IND_SCI_RX_SELECT_INPUT

UART FLX2 RX Input Select Register
address_offset : 0x388 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCI_FLX2_IPP_IND_SCI_RX_SELECT_INPUT SCI_FLX2_IPP_IND_SCI_RX_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#00 : 00

Selecting Pad: PTB7 for Mode: ALT7.

#01 : 01

Selecting Pad: PTD22 for Mode: ALT6.

#10 : 10

Selecting Pad: PTD1 for Mode: ALT2.

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 31 (30 bit)
access : read-write


SCI_FLX2_IPP_IND_SCI_TX_SELECT_INPUT

UART FLX2 TX Input Select Register
address_offset : 0x38C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCI_FLX2_IPP_IND_SCI_TX_SELECT_INPUT SCI_FLX2_IPP_IND_SCI_TX_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#00 : 00

Selecting Pad: PTB6 for Mode: ALT7.

#01 : 01

Selecting Pad: PTD23 for Mode: ALT6.

#10 : 10

Selecting Pad: PTD0 for Mode: ALT2.

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 31 (30 bit)
access : read-write


SCI_FLX3_IPP_IND_SCI_RX_SELECT_INPUT

UART FLX3 RX Input Select Register
address_offset : 0x390 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCI_FLX3_IPP_IND_SCI_RX_SELECT_INPUT SCI_FLX3_IPP_IND_SCI_RX_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTA21 for Mode: ALT6.

#1 : 1

Selecting Pad: PTA31 for Mode: ALT7.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


SCI_FLX3_IPP_IND_SCI_TX_SELECT_INPUT

UART FLX3 TX Input Select Register
address_offset : 0x394 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCI_FLX3_IPP_IND_SCI_TX_SELECT_INPUT SCI_FLX3_IPP_IND_SCI_TX_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTA20 for Mode: ALT6.

#1 : 1

Selecting Pad: PTA30 for Mode: ALT7.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


SRC_IPP_BOOT_CFG_18_SELECT_INPUT

BOOTCFG18 Input Select Register
address_offset : 0x398 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SRC_IPP_BOOT_CFG_18_SELECT_INPUT SRC_IPP_BOOT_CFG_18_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTC0 for Mode: ALT7.

#1 : 1

Selecting Pad: PTB23 for Mode: ALT3.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


SRC_IPP_BOOT_CFG_19_SELECT_INPUT

BOOTCFG19 Input Select Register
address_offset : 0x39C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SRC_IPP_BOOT_CFG_19_SELECT_INPUT SRC_IPP_BOOT_CFG_19_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTC1 for Mode: ALT7.

#1 : 1

Selecting Pad: PTB24 for Mode: ALT3.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


SRC_IPP_BOOT_CFG_20_SELECT_INPUT

BOOTCFG20 Input Select Register
address_offset : 0x3A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SRC_IPP_BOOT_CFG_20_SELECT_INPUT SRC_IPP_BOOT_CFG_20_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTC2 for Mode: ALT7.

#1 : 1

Selecting Pad: PTB25 for Mode: ALT3.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


VIDEO_IN0_IPP_IND_DE_SELECT_INPUT

Video Decoder Input Select Register
address_offset : 0x3A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VIDEO_IN0_IPP_IND_DE_SELECT_INPUT VIDEO_IN0_IPP_IND_DE_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#00 : 00

Selecting Pad: PTB5 for Mode: ALT5.

#01 : 01

Selecting Pad: PTB8 for Mode: ALT5.

#10 : 10

Selecting Pad: PTB10 for Mode: ALT5.

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 31 (30 bit)
access : read-write


VIDEO_IN0_IPP_IND_FID_SELECT_INPUT

Video IN0 Input Select Register
address_offset : 0x3A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VIDEO_IN0_IPP_IND_FID_SELECT_INPUT VIDEO_IN0_IPP_IND_FID_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTB4 for Mode: ALT5.

#1 : 1

Selecting Pad: PTB22 for Mode: ALT5.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


VIDEO_IN0_IPP_IND_PIX_CLK_SELECT_INPUT

Video PIXCLK Input Select Register
address_offset : 0x3AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VIDEO_IN0_IPP_IND_PIX_CLK_SELECT_INPUT VIDEO_IN0_IPP_IND_PIX_CLK_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY RESERVED

DAISY : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selecting Pad: PTB15 for Mode: ALT7.

#1 : 1

Selecting Pad: PTA7 for Mode: ALT1.

End of enumeration elements list.

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-write


PTA25

Software MUX Pad Control Register 15
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA25 PTA25 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[15] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TRACED[9] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: VBUS_OC of instance: usb.

#101 : 101

Select mux mode: ALT5 mux port: CMD of instance: esdhc1.

#110 : 110

Select mux mode: ALT6 mux port: TCON[5] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO15

Software MUX Pad Control Register 15
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO15 RGPIO15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO1

Software MUX Pad Control Register 1
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO1 RGPIO1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTA8

Software MUX Pad Control Register 1
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA8 PTA8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[1] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TCLK of instance: debug.

#100 : 100

Select mux mode: ALT4 mux port: DATA_OUT[18] of instance: tcon0.

#111 : 111

Select mux mode: ALT7 mux port: MLBCLK of instance: mlb_top.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO16

Software MUX Pad Control Register 16
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO16 RGPIO16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTA26

Software MUX Pad Control Register 16
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA26 PTA26 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[16] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TRACED[10] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: TX_BCLK of instance: sai3.

#101 : 101

Select mux mode: ALT5 mux port: DAT0 of instance: esdhc1.

#110 : 110

Select mux mode: ALT6 mux port: TCON[6] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO17

Software MUX Pad Control Register 17
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO17 RGPIO17 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTA27

Software MUX Pad Control Register 17
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA27 PTA27 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[17] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TRACED[11] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: RX_BCLK of instance: sai3.

#101 : 101

Select mux mode: ALT5 mux port: DAT1 of instance: esdhc1.

#110 : 110

Select mux mode: ALT6 mux port: TCON[7] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO18

Software MUX Pad Control Register 18
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO18 RGPIO18 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTA28

Software MUX Pad Control Register 18
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA28 PTA28 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[18] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TRACED[12] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: RX_DATA of instance: sai3.

#011 : 011

Select mux mode: ALT3 mux port: MAC1_TMR0 of instance: enet_swiahb.

#100 : 100

Select mux mode: ALT4 mux port: TX of instance: sci_flx4.

#101 : 101

Select mux mode: ALT5 mux port: DAT2 of instance: esdhc1.

#110 : 110

Select mux mode: ALT6 mux port: TCON[8] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTA29

Software MUX Pad Control Register 19
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA29 PTA29 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[19] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TRACED[13] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: TX_DATA of instance: sai3.

#011 : 011

Select mux mode: ALT3 mux port: MAC1_TMR1 of instance: enet_swiahb.

#100 : 100

Select mux mode: ALT4 mux port: RX of instance: sci_flx4.

#101 : 101

Select mux mode: ALT5 mux port: DAT3 of instance: esdhc1.

#110 : 110

Select mux mode: ALT6 mux port: TCON[9] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO19

Software MUX Pad Control Register 19
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO19 RGPIO19 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTA30

Software MUX Pad Control Register 20
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA30 PTA30 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[20] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TRACED[14] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: RX_SYNC of instance: sai3.

#011 : 011

Select mux mode: ALT3 mux port: MAC1_TMR2 of instance: enet_swiahb.

#100 : 100

Select mux mode: ALT4 mux port: RTS of instance: sci_flx4.

#101 : 101

Select mux mode: ALT5 mux port: SCL of instance: i2c3.

#111 : 111

Select mux mode: ALT7 mux port: TX of instance: sci_flx3.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO20

Software MUX Pad Control Register 20
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO20 RGPIO20 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO21

Software MUX Pad Control Register 21
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO21 RGPIO21 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTA31

Software MUX Pad Control Register 21
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA31 PTA31 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[21] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TRACED[15] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: TX_SYNC of instance: sai3.

#100 : 100

Select mux mode: ALT4 mux port: CTS of instance: sci_flx4.

#101 : 101

Select mux mode: ALT5 mux port: SDA of instance: i2c3.

#111 : 111

Select mux mode: ALT7 mux port: RX of instance: sci_flx3.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO22

Software MUX Pad Control Register 22
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO22 RGPIO22 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB0

Software MUX Pad Control Register 22
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB0 PTB0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[22] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: CH[0] of instance: flextimer0.

#010 : 010

Select mux mode: ALT2 mux port: ADC0SE2 of instance: adc0_da.

#011 : 011

Select mux mode: ALT3 mux port: TRACECTL of instance: platform.

#100 : 100

Select mux mode: ALT4 mux port: LCD34 of instance: lcd_64f6b.

#101 : 101

Select mux mode: ALT5 mux port: RX_BCLK of instance: sai2.

#110 : 110

Select mux mode: ALT6 mux port: DATA[18] of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: QPCS0_A of instance: quadspi1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO23

Software MUX Pad Control Register 23
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO23 RGPIO23 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB1

Software MUX Pad Control Register 23
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB1 PTB1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[23] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: CH[1] of instance: flextimer0.

#010 : 010

Select mux mode: ALT2 mux port: ADC0SE3 of instance: adc0_da.

#011 : 011

Select mux mode: ALT3 mux port: RCON30 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD35 of instance: lcd_64f6b.

#101 : 101

Select mux mode: ALT5 mux port: RX_DATA of instance: sai2.

#110 : 110

Select mux mode: ALT6 mux port: DATA[19] of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: QSPI_IO3_A of instance: quadspi1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO24

Software MUX Pad Control Register 24
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO24 RGPIO24 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB2

Software MUX Pad Control Register 24
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB2 PTB2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[24] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: CH[2] of instance: flextimer0.

#010 : 010

Select mux mode: ALT2 mux port: ADC1SE2 of instance: adc1_da.

#011 : 011

Select mux mode: ALT3 mux port: RCON31 of instance: src.

#100 : 100

Select mux mode: ALT4 mux port: LCD36 of instance: lcd_64f6b.

#101 : 101

Select mux mode: ALT5 mux port: RX_SYNC of instance: sai2.

#110 : 110

Select mux mode: ALT6 mux port: DATA[20] of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: QSPI_IO2_A of instance: quadspi1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO25

Software MUX Pad Control Register 25
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO25 RGPIO25 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB3

Software MUX Pad Control Register 25
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB3 PTB3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[25] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: CH[3] of instance: flextimer0.

#010 : 010

Select mux mode: ALT2 mux port: ADC1SE3 of instance: adc1_da.

#011 : 011

Select mux mode: ALT3 mux port: EXTRIG of instance: pdb.

#100 : 100

Select mux mode: ALT4 mux port: LCD37 of instance: lcd_64f6b.

#110 : 110

Select mux mode: ALT6 mux port: DATA[21] of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: QSPI_IO1_A of instance: quadspi1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO26

Software MUX Pad Control Register 26
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO26 RGPIO26 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB4

Software MUX Pad Control Register 26
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB4 PTB4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[26] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: CH[4] of instance: flextimer0.

#010 : 010

Select mux mode: ALT2 mux port: TX of instance: sci_flx1.

#011 : 011

Select mux mode: ALT3 mux port: ADC0SE4 of instance: adc0_da.

#100 : 100

Select mux mode: ALT4 mux port: LCD38 of instance: lcd_64f6b.

#101 : 101

Select mux mode: ALT5 mux port: VIU_FID of instance: video_in0.

#110 : 110

Select mux mode: ALT6 mux port: DATA[22] of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: QSPI_IO0_A of instance: quadspi1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO27

Software MUX Pad Control Register 27
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO27 RGPIO27 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB5

Software MUX Pad Control Register 27
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB5 PTB5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[27] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: CH[5] of instance: flextimer0.

#010 : 010

Select mux mode: ALT2 mux port: RX of instance: sci_flx1.

#011 : 011

Select mux mode: ALT3 mux port: ADC1SE4 of instance: adc1_da.

#100 : 100

Select mux mode: ALT4 mux port: LCD39 of instance: lcd_64f6b.

#101 : 101

Select mux mode: ALT5 mux port: VIU_DE of instance: video_in0.

#110 : 110

Reserved

#111 : 111

Select mux mode: ALT7 mux port: DQS_A of instance: quadspi1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB6

Software MUX Pad Control Register 28
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB6 PTB6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[28] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: CH[6] of instance: flextimer0.

#010 : 010

Select mux mode: ALT2 mux port: RTS of instance: sci_flx1.

#011 : 011

Select mux mode: ALT3 mux port: QPCS1_A of instance: quadspi0.

#100 : 100

Select mux mode: ALT4 mux port: LCD40 of instance: lcd_64f6b.

#101 : 101

Select mux mode: ALT5 mux port: FB_CLKOUT of instance: lpcg0.

#110 : 110

Select mux mode: ALT6 mux port: HSYNC of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: TX of instance: sci_flx2.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO28

Software MUX Pad Control Register 28
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO28 RGPIO28 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO29

Software MUX Pad Control Register 29
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO29 RGPIO29 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB7

Software MUX Pad Control Register 29
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB7 PTB7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[29] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: CH[7] of instance: flextimer0.

#010 : 010

Select mux mode: ALT2 mux port: CTS of instance: sci_flx1.

#011 : 011

Select mux mode: ALT3 mux port: QPCS1_B of instance: quadspi0.

#100 : 100

Select mux mode: ALT4 mux port: LCD41 of instance: lcd_64f6b.

#110 : 110

Select mux mode: ALT6 mux port: VSYNC of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: RX of instance: sci_flx2.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB8

Software MUX Pad Control Register 30
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB8 PTB8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[30] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: CH[0] of instance: flextimer1.

#011 : 011

Select mux mode: ALT3 mux port: QD_PHA of instance: flextimer1.

#101 : 101

Select mux mode: ALT5 mux port: VIU_DE of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[24] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO30

Software MUX Pad Control Register 30
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO30 RGPIO30 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO31

Software MUX Pad Control Register 31
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO31 RGPIO31 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB9

Software MUX Pad Control Register 31
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB9 PTB9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[31] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: CH[1] of instance: flextimer1.

#011 : 011

Select mux mode: ALT3 mux port: QD_PHB of instance: flextimer1.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[25] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO2

Software MUX Pad Control Register 2
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO2 RGPIO2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTA9

Software MUX Pad Control Register 2
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA9 PTA9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[2] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TDI of instance: debug.

#010 : 010

Select mux mode: ALT2 mux port: RMII_CLKOUT of instance: ccm.

#011 : 011

Select mux mode: ALT3 mux port: RMII_CLKIN of instance: ccm. Used as MAC0-TXCLK when MAC0-MII is enabled.

#100 : 100

Select mux mode: ALT4 mux port: DATA_OUT[19] of instance: tcon0.

#110 : 110

Select mux mode: ALT6 mux port: IPP_WDOG_CA5_CM4_B of instance: wdog_glue.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB10

Software MUX Pad Control Register 32
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB10 PTB10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[32] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TX of instance: sci_flx0.

#100 : 100

Select mux mode: ALT4 mux port: TCON[4] of instance: tcon0.

#101 : 101

Select mux mode: ALT5 mux port: VIU_DE of instance: video_in0.

#110 : 110

CKO1

#111 : 111

Select mux mode: ALT7 mux port: ENET_TS_CLKIN of instance: ccm.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO32

Software MUX Pad Control Register 32
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO32 RGPIO32 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB11

Software MUX Pad Control Register 33
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB11 PTB11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[33] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RX of instance: sci_flx0.

#100 : 100

Select mux mode: ALT4 mux port: TCON[5] of instance: tcon0.

#101 : 101

Select mux mode: ALT5 mux port: SNVS_ALARM_OUT_B of instance: snvs_lp_wrapper.

#110 : 110

CKO2

#111 : 111

Select mux mode: ALT7 mux port: MAC0_TMR0 of instance: enet_swiahb.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO33

Software MUX Pad Control Register 33
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO33 RGPIO33 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO34

Software MUX Pad Control Register 34
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO34 RGPIO34 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB12

Software MUX Pad Control Register 34
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB12 PTB12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[34] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RTS of instance: sci_flx0.

#011 : 011

Select mux mode: ALT3 mux port: CS5 of instance: dspi0.

#100 : 100

Select mux mode: ALT4 mux port: TCON[6] of instance: tcon0.

#101 : 101

Select mux mode: ALT5 mux port: FB_AD[1] of instance: platform.

#111 : 111

Select mux mode: ALT7 mux port: MAC0_TMR1 of instance: enet_swiahb.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB13

Software MUX Pad Control Register 35
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB13 PTB13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[35] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: CTS of instance: sci_flx0.

#011 : 011

Select mux mode: ALT3 mux port: CS4 of instance: dspi0.

#100 : 100

Select mux mode: ALT4 mux port: TCON[7] of instance: tcon0.

#101 : 101

Select mux mode: ALT5 mux port: FB_AD[0] of instance: platform.

#110 : 110

Select mux mode: ALT6 mux port: TRACECTL of instance: platform.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO35

Software MUX Pad Control Register 35
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO35 RGPIO35 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB14

Software MUX Pad Control Register 36
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB14 PTB14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[36] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RXD of instance: can0.

#010 : 010

Select mux mode: ALT2 mux port: SCL of instance: i2c0.

#100 : 100

Select mux mode: ALT4 mux port: TCON[8] of instance: tcon0.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[1] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO36

Software MUX Pad Control Register 36
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO36 RGPIO36 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO37

Software MUX Pad Control Register 37
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO37 RGPIO37 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB15

Software MUX Pad Control Register 37
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB15 PTB15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[37] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TXD of instance: can0.

#010 : 010

Select mux mode: ALT2 mux port: SDA of instance: i2c0.

#100 : 100

Select mux mode: ALT4 mux port: TCON[9] of instance: tcon0.

#111 : 111

Select mux mode: ALT7 mux port: PIX_CLK of instance: video_in0.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO38

Software MUX Pad Control Register 38
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO38 RGPIO38 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB16

Software MUX Pad Control Register 38
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB16 PTB16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[38] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RXD of instance: can1.

#010 : 010

Select mux mode: ALT2 mux port: SCL of instance: i2c1.

#100 : 100

Select mux mode: ALT4 mux port: TCON[10] of instance: tcon0.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO39

Software MUX Pad Control Register 39
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO39 RGPIO39 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB17

Software MUX Pad Control Register 39
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB17 PTB17 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[39] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TXD of instance: can1.

#010 : 010

Select mux mode: ALT2 mux port: SDA of instance: i2c1.

#100 : 100

Select mux mode: ALT4 mux port: TCON[11] of instance: tcon0.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB18

Software MUX Pad Control Register 40
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB18 PTB18 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[40] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: CS1 of instance: dspi0.

#010 : 010

Select mux mode: ALT2 mux port: EXT_AUDIO_MCLK of instance: ccm.

#100 : 100

CKO1

#110 : 110

Select mux mode: ALT6 mux port: DATA[9] of instance: video_in0.

#111 : 111

Reserved

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO40

Software MUX Pad Control Register 40
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO40 RGPIO40 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB19

Software MUX Pad Control Register 41
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB19 PTB19 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[41] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: CS0 of instance: dspi0.

#110 : 110

Select mux mode: ALT6 mux port: DATA[10] of instance: video_in0.

#111 : 111

Reserved

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO41

Software MUX Pad Control Register 41
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO41 RGPIO41 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB20

Software MUX Pad Control Register 42
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB20 PTB20 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[42] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: SIN of instance: dspi0.

#100 : 100

Select mux mode: ALT4 mux port: LCD42 of instance: lcd_64f6b.

#110 : 110

Select mux mode: ALT6 mux port: DATA[11] of instance: video_in0.

#111 : 111

Reserved

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO42

Software MUX Pad Control Register 42
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO42 RGPIO42 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB21

Software MUX Pad Control Register 43
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB21 PTB21 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[43] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: SOUT of instance: dspi0.

#100 : 100

Select mux mode: ALT4 mux port: LCD43 of instance: lcd_64f6b.

#110 : 110

Select mux mode: ALT6 mux port: DATA[12] of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[1] of instance: tcon1.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO43

Software MUX Pad Control Register 43
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO43 RGPIO43 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTB22

Software MUX Pad Control Register 44
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTB22 PTB22 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[44] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: SCK of instance: dspi0.

#101 : 101

Select mux mode: ALT5 mux port: VIU_FID of instance: video_in0.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO44

Software MUX Pad Control Register 44
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO44 RGPIO44 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC0

Software MUX Pad Control Register 45
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC0 PTC0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[45] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RMII0_MDC/MII0_MDC of instance: enet_swiahb.

#010 : 010

Select mux mode: ALT2 mux port: CH[0] of instance: flextimer1.

#011 : 011

Select mux mode: ALT3 mux port: CS3 of instance: dspi0.

#100 : 100

Select mux mode: ALT4 mux port: SCKT of instance: esai.

#101 : 101

Select mux mode: ALT5 mux port: CLK of instance: esdhc0.

#110 : 110

Select mux mode: ALT6 mux port: DATA[0] of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: RCON18 of instance: src.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO45

Software MUX Pad Control Register 45
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO45 RGPIO45 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC1

Software MUX Pad Control Register 46
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC1 PTC1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[46] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RMII0_MDIO/MII0_MDIO of instance: enet_swiahb.

#010 : 010

Select mux mode: ALT2 mux port: CH[1] of instance: flextimer1.

#011 : 011

Select mux mode: ALT3 mux port: CS2 of instance: dspi0.

#100 : 100

Select mux mode: ALT4 mux port: FST of instance: esai.

#101 : 101

Select mux mode: ALT5 mux port: CMD of instance: esdhc0.

#110 : 110

Select mux mode: ALT6 mux port: DATA[1] of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: RCON19 of instance: src.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO46

Software MUX Pad Control Register 46
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO46 RGPIO46 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO47

Software MUX Pad Control Register 47
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO47 RGPIO47 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC2

Software MUX Pad Control Register 47
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC2 PTC2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[47] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RMII0_RX_EN of instance: enet_swiahb.

#010 : 010

Select mux mode: ALT2 mux port: TX of instance: sci_flx1.

#100 : 100

Select mux mode: ALT4 mux port: SDO0 of instance: esai.

#101 : 101

Select mux mode: ALT5 mux port: DAT0 of instance: esdhc0.

#110 : 110

Select mux mode: ALT6 mux port: DATA[2] of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: RCON20 of instance: src.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTA10

Software MUX Pad Control Register 3
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTA10 PTA10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[3] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: TDO of instance: debug.

#010 : 010

Select mux mode: ALT2 mux port: EXT_AUDIO_MCLK of instance: ccm.

#100 : 100

Select mux mode: ALT4 mux port: DATA_OUT[10] of instance: tcon0.

#110 : 110

Select mux mode: ALT6 mux port: ENET_TS_CLKIN of instance: ccm.

#111 : 111

Select mux mode: ALT7 mux port: MLBSIGNAL of instance: mlb_top.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO3

Software MUX Pad Control Register 3
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO3 RGPIO3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO48

Software MUX Pad Control Register 48
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO48 RGPIO48 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC3

Software MUX Pad Control Register 48
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC3 PTC3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[48] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RMII0_RXD[1]//MII0_RXD[1] of instance: enet_swiahb.

#010 : 010

Select mux mode: ALT2 mux port: RX of instance: sci_flx1.

#100 : 100

Select mux mode: ALT4 mux port: SDO1 of instance: esai.

#101 : 101

Select mux mode: ALT5 mux port: DAT1 of instance: esdhc0.

#110 : 110

Select mux mode: ALT6 mux port: DATA[3] of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[18] of instance: tcon0.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC4

Software MUX Pad Control Register 49
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC4 PTC4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[49] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RMII0_RXD[0]/MII0_RXD[0] of instance: enet_swiahb.

#010 : 010

Select mux mode: ALT2 mux port: RTS of instance: sci_flx1.

#011 : 011

Select mux mode: ALT3 mux port: CS1 of instance: dspi1.

#100 : 100

Select mux mode: ALT4 mux port: SDO2 of instance: esai.

#101 : 101

Select mux mode: ALT5 mux port: DAT2 of instance: esdhc0.

#110 : 110

Select mux mode: ALT6 mux port: DATA[4] of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[19] of instance: tcon0.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO49

Software MUX Pad Control Register 49
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO49 RGPIO49 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO50

Software MUX Pad Control Register 50
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO50 RGPIO50 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC5

Software MUX Pad Control Register 50
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC5 PTC5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[50] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RMII0_RXER/MII0_RXER of instance: enet_swiahb.

#010 : 010

Select mux mode: ALT2 mux port: CTS of instance: sci_flx1.

#011 : 011

Select mux mode: ALT3 mux port: CS0 of instance: dspi1.

#100 : 100

Select mux mode: ALT4 mux port: SDO3 of instance: esai.

#101 : 101

Select mux mode: ALT5 mux port: DAT3 of instance: esdhc0.

#110 : 110

Select mux mode: ALT6 mux port: DATA[5] of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[10] of instance: tcon0.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO51

Software MUX Pad Control Register 51
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO51 RGPIO51 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC6

Software MUX Pad Control Register 51
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC6 PTC6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[51] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RMII0_TXD[1]/MII0_TXD[1] of instance: enet_swiahb.

#011 : 011

Select mux mode: ALT3 mux port: SIN of instance: dspi1.

#100 : 100

Select mux mode: ALT4 mux port: SDI0 of instance: esai.

#101 : 101

Select mux mode: ALT5 mux port: WP of instance: esdhc0.

#110 : 110

Select mux mode: ALT6 mux port: DATA[6] of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[11] of instance: tcon0.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO52

Software MUX Pad Control Register 52
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO52 RGPIO52 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC7

Software MUX Pad Control Register 52
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC7 PTC7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[52] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RMII0_TXD[0]/MII0_TXD[0] of instance: enet_swiahb.

#011 : 011

Select mux mode: ALT3 mux port: SOUT of instance: dspi1.

#100 : 100

Select mux mode: ALT4 mux port: SDI1 of instance: esai.

#110 : 110

Select mux mode: ALT6 mux port: DATA[7] of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[2] of instance: tcon0.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC8

Software MUX Pad Control Register 53
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC8 PTC8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[53] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RMII0_TXEN/MII0_TXEN of instance: enet_swiahb.

#011 : 011

Select mux mode: ALT3 mux port: SCK of instance: dspi1.

#110 : 110

Select mux mode: ALT6 mux port: DATA[8] of instance: video_in0.

#111 : 111

Select mux mode: ALT7 mux port: DATA_OUT[3] of instance: tcon0.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO53

Software MUX Pad Control Register 53
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO53 RGPIO53 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO54

Software MUX Pad Control Register 54
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO54 RGPIO54 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC9

Software MUX Pad Control Register 54
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC9 PTC9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[54] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RMII1_MDC of instance: enet_swiahb.

#011 : 011

Select mux mode: ALT3 mux port: SCKT of instance: esai.

#110 : 110

Select mux mode: ALT6 mux port: MLBCLK of instance: mlb_top.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[0] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO55

Software MUX Pad Control Register 55
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO55 RGPIO55 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC10

Software MUX Pad Control Register 55
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC10 PTC10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[55] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RMII1_MDIO of instance: enet_swiahb.

#011 : 011

Select mux mode: ALT3 mux port: FST of instance: esai.

#110 : 110

Select mux mode: ALT6 mux port: MLBSIGNAL of instance: mlb_top.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[1] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC11

Software MUX Pad Control Register 56
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC11 PTC11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[56] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RMII1_CRS_DV of instance: enet_swiahb.

#011 : 011

Select mux mode: ALT3 mux port: SDO0 of instance: esai.

#110 : 110

Select mux mode: ALT6 mux port: MLBDATA of instance: mlb_top.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[2] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO56

Software MUX Pad Control Register 56
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO56 RGPIO56 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO57

Software MUX Pad Control Register 57
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO57 RGPIO57 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC12

Software MUX Pad Control Register 57
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC12 PTC12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[57] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RMII1_RXD[1] of instance: enet_swiahb.

#011 : 011

Select mux mode: ALT3 mux port: SDO1 of instance: esai.

#101 : 101

Select mux mode: ALT5 mux port: TX_BCLK of instance: sai2.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[3] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO58

Software MUX Pad Control Register 58
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO58 RGPIO58 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC13

Software MUX Pad Control Register 58
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC13 PTC13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[58] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RMII1_RXD[0] of instance: enet_swiahb.

#011 : 011

Select mux mode: ALT3 mux port: SDO2 of instance: esai.

#101 : 101

Select mux mode: ALT5 mux port: RX_BCLK of instance: sai2.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[4] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO59

Software MUX Pad Control Register 59
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO59 RGPIO59 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC14

Software MUX Pad Control Register 59
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC14 PTC14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[59] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RMII1_RXER of instance: enet_swiahb.

#011 : 011

Select mux mode: ALT3 mux port: SDO3 of instance: esai.

#100 : 100

Select mux mode: ALT4 mux port: TX of instance: sci_flx5.

#101 : 101

Select mux mode: ALT5 mux port: RX_DATA of instance: sai2.

#110 : 110

Select mux mode: ALT6 mux port: ADC0SE6 of instance: adc0_da.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[5] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC15

Software MUX Pad Control Register 60
address_offset : 0xF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC15 PTC15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[60] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RMII1_TXD[1] of instance: enet_swiahb.

#011 : 011

Select mux mode: ALT3 mux port: SDI0 of instance: esai.

#100 : 100

Select mux mode: ALT4 mux port: RX of instance: sci_flx5.

#101 : 101

Select mux mode: ALT5 mux port: TX_DATA of instance: sai2.

#110 : 110

Select mux mode: ALT6 mux port: ADC0SE7 of instance: adc0_da.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[6] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO60

Software MUX Pad Control Register 60
address_offset : 0xF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO60 RGPIO60 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC16

Software MUX Pad Control Register 61
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC16 PTC16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[61] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RMII1_TXD[0] of instance: enet_swiahb.

#011 : 011

Select mux mode: ALT3 mux port: SDI1 of instance: esai.

#100 : 100

Select mux mode: ALT4 mux port: RTS of instance: sci_flx5.

#101 : 101

Select mux mode: ALT5 mux port: RX_SYNC of instance: sai2.

#110 : 110

Select mux mode: ALT6 mux port: ADC1SE6 of instance: adc1_da.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[7] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO61

Software MUX Pad Control Register 61
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO61 RGPIO61 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO62

Software MUX Pad Control Register 62
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO62 RGPIO62 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTC17

Software MUX Pad Control Register 62
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTC17 PTC17 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[62] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: RMII1_TXEN of instance: enet_swiahb.

#011 : 011

Select mux mode: ALT3 mux port: ADC1SE7 of instance: adc1_da.

#100 : 100

Select mux mode: ALT4 mux port: CTS of instance: sci_flx5.

#101 : 101

Select mux mode: ALT5 mux port: TX_SYNC of instance: sai2.

#110 : 110

Select mux mode: ALT6 mux port: USB1_SOF_PULSE of instance: usb.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[8] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


PTD31

Software MUX Pad Control Register 63
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

PTD31 PTD31 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Keeper enable

#1 : 1

Pull enable

End of enumeration elements list.

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull/Keeper Disabled

#1 : 1

Pull/Keeper Enabled

End of enumeration elements list.

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 00

100 kOhm Pull Down

#01 : 01

47 kOhm Pull Up

#10 : 10

100 kOhm Pull Up

#11 : 11

22 kOhm Pull Up

End of enumeration elements list.

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

Enumeration:

#000 : 000

output driver disabled;

#001 : 001

150 Ohm (240 Ohm if pad is DDR)

#010 : 010

75 Ohm (120 Ohm if pad is DDR)

#011 : 011

50 Ohm (80 Ohm if pad is DDR)

#100 : 100

37 Ohm (60 Ohm if pad is DDR)

#101 : 101

30 Ohm (48 Ohm if pad is DDR)

#110 : 110

25 Ohm

#111 : 111

20 Ohm (34 Ohm if pad is DDR)

End of enumeration elements list.

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

CMOS input

#1 : 1

Schmitt trigger input

End of enumeration elements list.

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Output is CMOS

#1 : 1

Output is open drain

End of enumeration elements list.

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Slow Slew Rate

#1 : 1

Fast Slew Rate

End of enumeration elements list.

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 00

Low (50 MHz)

#01 : 01

Medium (100 MHz)

#10 : 10

Medium (100 MHz)

#11 : 11

High (200 MHz)

End of enumeration elements list.

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

Enumeration:

#000 : 000

Select mux mode: ALT0 mux port: GPIO[63] of instance: rgpioc.

#001 : 001

Select mux mode: ALT1 mux port: FB_AD[31] of instance: platform.

#010 : 010

Select mux mode: ALT2 mux port: NF_IO[15] of instance: nfc_mlc.

#100 : 100

Select mux mode: ALT4 mux port: CH[0] of instance: flextimer3.

#101 : 101

Select mux mode: ALT5 mux port: CS1 of instance: dspi2.

#111 : 111

Select mux mode: ALT7 mux port: debug_out[9] of instance: viu_mux.

End of enumeration elements list.

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write


RGPIO63

Software MUX Pad Control Register 63
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : IOMUXC
reset_Mask : 0x0

RGPIO63 RGPIO63 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBE OBE PUE PKE PUS DSE HYS ODE SRE SPEED RESERVED MUX_MODE RESERVED

IBE : no description available
bits : 0 - 0 (1 bit)
access : read-write

OBE : no description available
bits : 1 - 1 (1 bit)
access : read-write

PUE : no description available
bits : 2 - 2 (1 bit)
access : read-write

PKE : no description available
bits : 3 - 3 (1 bit)
access : read-write

PUS : no description available
bits : 4 - 5 (2 bit)
access : read-write

DSE : no description available
bits : 6 - 8 (3 bit)
access : read-write

HYS : no description available
bits : 9 - 9 (1 bit)
access : read-write

ODE : no description available
bits : 10 - 10 (1 bit)
access : read-write

SRE : no description available
bits : 11 - 11 (1 bit)
access : read-write

SPEED : no description available
bits : 12 - 13 (2 bit)
access : read-write

RESERVED : no description available
bits : 14 - 19 (6 bit)
access : read-write

MUX_MODE : no description available
bits : 20 - 22 (3 bit)
access : read-write

RESERVED : no description available
bits : 23 - 31 (9 bit)
access : read-write



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