\n

MSCM

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x960 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CPxTYPE

IRSPRC28

CP0CFG3

IRSPRC29

IRSPRC0

IRSPRC30

IRSPRC31

IRSPRC32

IRSPRC33

IRSPRC34

IRSPRC35

IRSPRC36

CP1CFG2

IRSPRC37

IRSPRC38

IRSPRC39

IRSPRC40

IRSPRC41

IRSPRC42

IRSPRC43

IRSPRC44

IRSPRC45

IRSPRC1

IRSPRC46

CP1CFG3

IRSPRC47

IRSPRC48

IRSPRC49

IRSPRC50

IRSPRC51

IRSPRC52

IRSPRC53

IRSPRC54

IRSPRC55

IRSPRC56

CPxCFG0

CP0TYPE

IRSPRC57

IRSPRC58

IRSPRC59

IRSPRC60

IRSPRC2

IRSPRC61

IRSPRC62

IRSPRC63

CP0NUM

IRSPRC64

IRSPRC65

IRSPRC66

IRSPRC67

IRSPRC68

IRSPRC69

IRSPRC70

CP0MASTER

IRSPRC71

IRSPRC72

IRSPRC73

IRSPRC74

IRSPRC75

IRSPRC3

IRSPRC76

IRSPRC77

CP0COUNT

IRSPRC78

IRSPRC79

IRSPRC80

IRSPRC81

IRSPRC82

IRSPRC83

IRSPRC84

IRSPRC85

IRSPRC86

IRSPRC87

IRSPRC88

IRSPRC89

IRSPRC90

IRSPRC4

IRSPRC91

CPxCFG1

IRSPRC92

IRSPRC93

IRSPRC94

IRSPRC95

IRSPRC96

IRSPRC97

IRSPRC98

IRSPRC99

IRSPRC100

IRSPRC101

IRSPRC102

IRSPRC103

IRSPRC104

IRSPRC105

IRSPRC5

IRSPRC106

IRSPRC107

IRSPRC108

IRSPRC109

IRSPRC110

IRSPRC111

CPxNUM

CP1TYPE

CP1NUM

IRSPRC6

CP1MASTER

CPxCFG2

CP1COUNT

IRSPRC7

IRSPRC8

IRSPRC9

CP0CFG0

IRSPRC10

CPxCFG3

IRSPRC11

IRSPRC12

CPxMASTER

IRCP0IR

IRSPRC13

IRCP1IR

IRCPGIR

IRSPRC14

IRSPRC15

CP0CFG1

IRSPRC16

CP1CFG0

IRSPRC17

IRSPRC18

IRSPRC19

IRSPRC20

CPxCOUNT

IRSPRC21

CP0CFG2

IRSPRC22

IRSPRC23

IRSPRC24

IRSPRC25

IRSPRC26

CP1CFG1

IRSPRC27


CPxTYPE

Processor X Type Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CPxTYPE CPxTYPE read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 rYpZ Personality

rYpZ : Processor x Revision
bits : 0 - 7 (8 bit)
access : read-only

Personality : Processor x Personality
bits : 8 - 31 (24 bit)
access : read-only


IRSPRC28

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1022C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC28 IRSPRC28 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


CP0CFG3

Processor 0 Configuration Register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CP0CFG3 CP0CFG3 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCWY DCSZ ICWY ICSZ

DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only

DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only

ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only

ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only


IRSPRC29

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x10AE6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC29 IRSPRC29 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC0

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1100 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC0 IRSPRC0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC30

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x113A2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC30 IRSPRC30 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC31

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x11C60 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC31 IRSPRC31 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC32

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x12520 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC32 IRSPRC32 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC33

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x12DE2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC33 IRSPRC33 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC34

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x136A6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC34 IRSPRC34 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC35

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x13F6C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC35 IRSPRC35 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC36

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x14834 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC36 IRSPRC36 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


CP1CFG2

Processor 1 Configuration Register
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CP1CFG2 CP1CFG2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCWY DCSZ ICWY ICSZ

DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only

DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only

ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only

ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only


IRSPRC37

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x150FE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC37 IRSPRC37 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC38

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x159CA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC38 IRSPRC38 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC39

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x16298 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC39 IRSPRC39 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC40

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x16B68 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC40 IRSPRC40 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC41

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1743A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC41 IRSPRC41 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC42

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x17D0E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC42 IRSPRC42 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC43

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x185E4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC43 IRSPRC43 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC44

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x18EBC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC44 IRSPRC44 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC45

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x19796 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC45 IRSPRC45 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC1

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1982 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC1 IRSPRC1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC46

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1A072 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC46 IRSPRC46 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


CP1CFG3

Processor 1 Configuration Register
address_offset : 0x1A8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CP1CFG3 CP1CFG3 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCWY DCSZ ICWY ICSZ

DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only

DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only

ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only

ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only


IRSPRC47

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1A950 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC47 IRSPRC47 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC48

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1B230 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC48 IRSPRC48 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC49

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1BB12 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC49 IRSPRC49 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC50

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1C3F6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC50 IRSPRC50 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC51

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1CCDC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC51 IRSPRC51 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC52

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1D5C4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC52 IRSPRC52 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC53

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1DEAE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC53 IRSPRC53 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC54

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1E79A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC54 IRSPRC54 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC55

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1F088 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC55 IRSPRC55 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC56

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x1F978 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC56 IRSPRC56 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


CPxCFG0

Processor X Configuration Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CPxCFG0 CPxCFG0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCWY DCSZ ICWY ICSZ

DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only

DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only

ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only

ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only


CP0TYPE

Processor 0 Type Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CP0TYPE CP0TYPE read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 rYpZ Personality

rYpZ : Processor x Revision
bits : 0 - 7 (8 bit)
access : read-only

Personality : Processor x Personality
bits : 8 - 31 (24 bit)
access : read-only


IRSPRC57

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2026A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC57 IRSPRC57 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC58

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x20B5E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC58 IRSPRC58 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC59

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x21454 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC59 IRSPRC59 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC60

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x21D4C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC60 IRSPRC60 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC2

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2206 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC2 IRSPRC2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC61

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x22646 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC61 IRSPRC61 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC62

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x22F42 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC62 IRSPRC62 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC63

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x23840 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC63 IRSPRC63 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


CP0NUM

Processor 0 Number Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CP0NUM CP0NUM read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CPN RESERVED

CPN : Processor x Number
bits : 0 - 0 (1 bit)
access : read-only

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-only


IRSPRC64

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x24140 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC64 IRSPRC64 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC65

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x24A42 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC65 IRSPRC65 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC66

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x25346 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC66 IRSPRC66 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC67

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x25C4C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC67 IRSPRC67 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC68

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x26554 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC68 IRSPRC68 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC69

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x26E5E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC69 IRSPRC69 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC70

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2776A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC70 IRSPRC70 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


CP0MASTER

Processor 0 Master Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CP0MASTER CP0MASTER read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PPN RESERVED

PPN : Processor x Physical Port Number
bits : 0 - 4 (5 bit)
access : read-only

RESERVED : no description available
bits : 5 - 31 (27 bit)
access : read-only


IRSPRC71

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x28078 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC71 IRSPRC71 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC72

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x28988 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC72 IRSPRC72 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC73

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2929A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC73 IRSPRC73 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC74

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x29BAE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC74 IRSPRC74 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC75

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2A4C4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC75 IRSPRC75 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC3

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2A8C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC3 IRSPRC3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC76

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2ADDC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC76 IRSPRC76 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC77

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2B6F6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC77 IRSPRC77 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


CP0COUNT

Processor 0 Count Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CP0COUNT CP0COUNT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PCNT RESERVED

PCNT : Processor Count
bits : 0 - 0 (1 bit)
access : read-only

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-only


IRSPRC78

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2C012 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC78 IRSPRC78 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC79

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2C930 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC79 IRSPRC79 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC80

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2D250 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC80 IRSPRC80 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC81

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2DB72 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC81 IRSPRC81 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC82

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2E496 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC82 IRSPRC82 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC83

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2EDBC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC83 IRSPRC83 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC84

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x2F6E4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC84 IRSPRC84 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC85

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3000E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC85 IRSPRC85 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC86

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3093A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC86 IRSPRC86 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC87

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x31268 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC87 IRSPRC87 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC88

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x31B98 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC88 IRSPRC88 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC89

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x324CA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC89 IRSPRC89 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC90

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x32DFE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC90 IRSPRC90 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC4

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3314 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC4 IRSPRC4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC91

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x33734 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC91 IRSPRC91 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


CPxCFG1

Processor X Configuration Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CPxCFG1 CPxCFG1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCWY DCSZ ICWY ICSZ

DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only

DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only

ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only

ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only


IRSPRC92

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3406C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC92 IRSPRC92 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC93

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x349A6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC93 IRSPRC93 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC94

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x352E2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC94 IRSPRC94 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC95

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x35C20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC95 IRSPRC95 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC96

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x36560 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC96 IRSPRC96 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC97

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x36EA2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC97 IRSPRC97 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC98

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x377E6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC98 IRSPRC98 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC99

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3812C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC99 IRSPRC99 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC100

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x38A74 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC100 IRSPRC100 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC101

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x393BE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC101 IRSPRC101 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC102

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x39D0A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC102 IRSPRC102 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC103

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3A658 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC103 IRSPRC103 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC104

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3AFA8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC104 IRSPRC104 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC105

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3B8FA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC105 IRSPRC105 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC5

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3B9E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC5 IRSPRC5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC106

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3C24E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC106 IRSPRC106 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC107

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3CBA4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC107 IRSPRC107 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC108

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3D4FC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC108 IRSPRC108 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC109

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3DE56 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC109 IRSPRC109 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC110

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3E7B2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC110 IRSPRC110 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC111

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x3F110 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC111 IRSPRC111 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


CPxNUM

Processor X Number Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CPxNUM CPxNUM read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CPN RESERVED

CPN : Processor x Number
bits : 0 - 0 (1 bit)
access : read-only

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-only


CP1TYPE

Processor 1 Type Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CP1TYPE CP1TYPE read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 rYpZ Personality

rYpZ : Processor x Revision
bits : 0 - 7 (8 bit)
access : read-only

Personality : Processor x Personality
bits : 8 - 31 (24 bit)
access : read-only


CP1NUM

Processor 1 Number Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CP1NUM CP1NUM read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CPN RESERVED

CPN : Processor x Number
bits : 0 - 0 (1 bit)
access : read-only

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-only


IRSPRC6

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x442A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC6 IRSPRC6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


CP1MASTER

Processor 1 Master Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CP1MASTER CP1MASTER read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PPN RESERVED

PPN : Processor x Physical Port Number
bits : 0 - 4 (5 bit)
access : read-only

RESERVED : no description available
bits : 5 - 31 (27 bit)
access : read-only


CPxCFG2

Processor X Configuration Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CPxCFG2 CPxCFG2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCWY DCSZ ICWY ICSZ

DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only

DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only

ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only

ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only


CP1COUNT

Processor 1 Count Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CP1COUNT CP1COUNT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PCNT RESERVED

PCNT : Processor Count
bits : 0 - 0 (1 bit)
access : read-only

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-only


IRSPRC7

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x4CB8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC7 IRSPRC7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC8

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x5548 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC8 IRSPRC8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC9

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x5DDA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC9 IRSPRC9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


CP0CFG0

Processor 0 Configuration Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CP0CFG0 CP0CFG0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCWY DCSZ ICWY ICSZ

DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only

DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only

ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only

ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only


IRSPRC10

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x666E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC10 IRSPRC10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


CPxCFG3

Processor X Configuration Register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CPxCFG3 CPxCFG3 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCWY DCSZ ICWY ICSZ

DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only

DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only

ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only

ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only


IRSPRC11

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x6F04 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC11 IRSPRC11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC12

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x779C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC12 IRSPRC12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


CPxMASTER

Processor X Master Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CPxMASTER CPxMASTER read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PPN RESERVED

PPN : Processor x Physical Port Number
bits : 0 - 4 (5 bit)
access : read-only

RESERVED : no description available
bits : 5 - 31 (27 bit)
access : read-only


IRCP0IR

Interrupt Router CP0 Interrupt Register
address_offset : 0x800 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRCP0IR IRCP0IR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT0 INT1 INT2 INT3 RESERVED

INT0 : Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

No interrupt is asserted

#1 : 1

Interrupt 0 to CP0 is asserted

End of enumeration elements list.

INT1 : Interrupt 1
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

No interrupt is asserted

#1 : 1

Interrupt 1 to CP0 is asserted

End of enumeration elements list.

INT2 : Interrupt 2
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

No interrupt is asserted

#1 : 1

Interrupt 2 to CP0 is asserted

End of enumeration elements list.

INT3 : Interrupt 3
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

No interrupt is asserted

#1 : 1

Interrupt 3 to CP0 is asserted

End of enumeration elements list.

RESERVED : no description available
bits : 4 - 31 (28 bit)
access : read-only


IRSPRC13

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x8036 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC13 IRSPRC13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRCP1IR

Interrupt Router CP1 Interrupt Register
address_offset : 0x804 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRCP1IR IRCP1IR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT0 INT1 INT2 INT3 RESERVED

INT0 : Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

No interrupt is asserted

#1 : 1

Interrupt 0 to CP1 is asserted

End of enumeration elements list.

INT1 : Interrupt 1
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

No interrupt is asserted

#1 : 1

Interrupt 1 to CP1 is asserted

End of enumeration elements list.

INT2 : Interrupt 2
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

No interrupt is asserted

#1 : 1

Interrupt 2 to CP1 is asserted

End of enumeration elements list.

INT3 : Interrupt 3
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

No interrupt is asserted

#1 : 1

Interrupt 3 to CP1 is asserted

End of enumeration elements list.

RESERVED : no description available
bits : 4 - 31 (28 bit)
access : read-only


IRCPGIR

Interrupt Router CPU Generate Interrupt Register
address_offset : 0x820 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IRCPGIR IRCPGIR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INTID RESERVED CPUTL RESERVED TLF RESERVED

INTID : Interrupt ID
bits : 0 - 1 (2 bit)
access : write-only

Enumeration:

#00 : 00

MSCM_IRCPnIR[0] loaded as defined by TLF and CPUTL

#01 : 01

MSCM_IRCPnIR[1] loaded as defined by TLF and CPUTL

#10 : 10

MSCM_IRCPnIR[2] loaded as defined by TLF and CPUTL

#11 : 11

MSCM_IRCPnIR[3] loaded as defined by TLF and CPUTL

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 15 (14 bit)
access : write-only

CPUTL : CPU Target List
bits : 16 - 17 (2 bit)
access : write-only

RESERVED : no description available
bits : 18 - 23 (6 bit)
access : write-only

TLF : Target List Field
bits : 24 - 25 (2 bit)
access : write-only

Enumeration:

#00 : 00

Use the CPUTL (CPU Target List) field to assert directed CPU interrupt(s)

#01 : 01

Assert directed CPU interrupts for all processors except the requesting core

#10 : 10

Assert the directed CPU interrupt for only the requesting core

#11 : 11

Reserved

End of enumeration elements list.

RESERVED : no description available
bits : 26 - 31 (6 bit)
access : write-only


IRSPRC14

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x88D2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC14 IRSPRC14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC15

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x9170 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC15 IRSPRC15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


CP0CFG1

Processor 0 Configuration Register
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CP0CFG1 CP0CFG1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCWY DCSZ ICWY ICSZ

DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only

DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only

ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only

ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only


IRSPRC16

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0x9A10 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC16 IRSPRC16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


CP1CFG0

Processor 1 Configuration Register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CP1CFG0 CP1CFG0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCWY DCSZ ICWY ICSZ

DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only

DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only

ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only

ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only


IRSPRC17

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xA2B2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC17 IRSPRC17 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC18

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xAB56 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC18 IRSPRC18 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC19

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xB3FC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC19 IRSPRC19 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC20

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xBCA4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC20 IRSPRC20 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


CPxCOUNT

Processor X Count Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CPxCOUNT CPxCOUNT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PCNT RESERVED

PCNT : Processor Count
bits : 0 - 0 (1 bit)
access : read-only

RESERVED : no description available
bits : 1 - 31 (31 bit)
access : read-only


IRSPRC21

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xC54E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC21 IRSPRC21 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


CP0CFG2

Processor 0 Configuration Register
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CP0CFG2 CP0CFG2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCWY DCSZ ICWY ICSZ

DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only

DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only

ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only

ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only


IRSPRC22

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xCDFA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC22 IRSPRC22 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC23

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xD6A8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC23 IRSPRC23 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC24

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xDF58 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC24 IRSPRC24 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC25

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xE80A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC25 IRSPRC25 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


IRSPRC26

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xF0BE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC26 IRSPRC26 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.


CP1CFG1

Processor 1 Configuration Register
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CP1CFG1 CP1CFG1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCWY DCSZ ICWY ICSZ

DCWY : Level 1 Data Cache Ways
bits : 0 - 7 (8 bit)
access : read-only

DCSZ : Level 1 Data Cache Size
bits : 8 - 15 (8 bit)
access : read-only

ICWY : Level 1 Instruction Cache Ways
bits : 16 - 23 (8 bit)
access : read-only

ICSZ : Level 1 Instruction Cache Size
bits : 24 - 31 (8 bit)
access : read-only


IRSPRC27

Interrupt Router Shared Peripheral Routing Control Register n
address_offset : 0xF974 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IRSPRC27 IRSPRC27 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CP0En CP1En RESERVED RO

CP0En : Enable CP0 Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP0 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP0 for the corresponding interrupt request is enabled

End of enumeration elements list.

CP1En : Enable CP1 Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Routing to CP1 for the corresponding interrupt request is disabled

#1 : 1

Routing to CP1 for the corresponding interrupt request is enabled

End of enumeration elements list.

RESERVED : no description available
bits : 2 - 14 (13 bit)
access : read-only

RO : Read-Only
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

Writes to the MSCM_IRSPRCn are allowed

#1 : 1

Writes to the MSCM_IRSPRCn are ignored

End of enumeration elements list.



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